JPS6237940U - - Google Patents

Info

Publication number
JPS6237940U
JPS6237940U JP13064785U JP13064785U JPS6237940U JP S6237940 U JPS6237940 U JP S6237940U JP 13064785 U JP13064785 U JP 13064785U JP 13064785 U JP13064785 U JP 13064785U JP S6237940 U JPS6237940 U JP S6237940U
Authority
JP
Japan
Prior art keywords
circuit
board
flat package
external terminals
hybrid circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13064785U
Other languages
English (en)
Other versions
JPH0447971Y2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1985130647U priority Critical patent/JPH0447971Y2/ja
Priority to US06/893,141 priority patent/US4722027A/en
Publication of JPS6237940U publication Critical patent/JPS6237940U/ja
Application granted granted Critical
Publication of JPH0447971Y2 publication Critical patent/JPH0447971Y2/ja
Expired legal-status Critical Current

Links

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Description

【図面の簡単な説明】
第1図は本考案の混成回路の実施例を示す組立
説明図、第2図は分解斜視図、第3図aと第3図
bは外部端子とフラツトパツケージの端子の接続
部分を示す平面図、第4図はパツフアードデイレ
ーラインの回路図、第5図は従来の混成回路の説
明図である。 30:フフラツトパツケージ、31:基板、3
2,34:孔、33:溝、35,36:端子、3
7A〜37H:外部端子、38,39:先端、4
0:底面、43:凹部、44:屈曲部。

Claims (1)

    【実用新案登録請求の範囲】
  1. コイルを含む回路が構成されている基板と、該
    基板より平面積の狭い集積回路のフラツトパツケ
    ージを重ね合せてあり、両方の回路の接続をフラ
    ツトパツケージの端子を介して行い、いずれかの
    回路に接続する外部端子を露呈させた状態で全体
    を樹脂封止してある混成回路であり、端に位置す
    る外部端子の先端が少くとも基板の四隅の部分に
    固定されていることを特徴とする混成回路。
JP1985130647U 1985-08-09 1985-08-27 Expired JPH0447971Y2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP1985130647U JPH0447971Y2 (ja) 1985-08-27 1985-08-27
US06/893,141 US4722027A (en) 1985-08-09 1986-08-05 Hybrid circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1985130647U JPH0447971Y2 (ja) 1985-08-27 1985-08-27

Publications (2)

Publication Number Publication Date
JPS6237940U true JPS6237940U (ja) 1987-03-06
JPH0447971Y2 JPH0447971Y2 (ja) 1992-11-12

Family

ID=31028345

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1985130647U Expired JPH0447971Y2 (ja) 1985-08-09 1985-08-27

Country Status (1)

Country Link
JP (1) JPH0447971Y2 (ja)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5780836U (ja) * 1980-10-31 1982-05-19

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5780836U (ja) * 1980-10-31 1982-05-19

Also Published As

Publication number Publication date
JPH0447971Y2 (ja) 1992-11-12

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