JPS6237949A - Electronic-part mounting package - Google Patents

Electronic-part mounting package

Info

Publication number
JPS6237949A
JPS6237949A JP60177162A JP17716285A JPS6237949A JP S6237949 A JPS6237949 A JP S6237949A JP 60177162 A JP60177162 A JP 60177162A JP 17716285 A JP17716285 A JP 17716285A JP S6237949 A JPS6237949 A JP S6237949A
Authority
JP
Japan
Prior art keywords
main body
package
lid
cap
mounting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60177162A
Other languages
Japanese (ja)
Inventor
Koji Nose
幸之 野世
Hitoo Iwasa
仁雄 岩佐
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP60177162A priority Critical patent/JPS6237949A/en
Publication of JPS6237949A publication Critical patent/JPS6237949A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/18Circuits for erasing optically
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/884Die-attach connectors and bond wires

Landscapes

  • Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)

Abstract

PURPOSE:To enhance airtight property, by using a cap made of a flat plate, and providing a structure, in which the bonding part of a main body and the cap is formed by coupling a groove and a protruded part. CONSTITUTION:A cap 3 is formed with a visible-light transmitting transparent resin. The cap 3 is formed in a flat plate shape having the same size as a flange shaped part 11. The bonding parts of a main body 2 and the cap 3 are made to face each other. A protruded wall 13 at the periphery of the cap 3 is coupled to a flange groove 12. When ultrasonic vibration is applied from the side of the cap 3, the protruded wall 13 is fused and welded to the flange groove 12 of the main body 2. Thus, airtight property is enhanced.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、電子部品、半導体装置を塔載する電子部品塔
載用パッケージの構造に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to the structure of a package for mounting electronic components on which electronic components and semiconductor devices are mounted.

従来の技術 たとえば、情報消去可能型半導体記憶素子を塔載するた
めのプラスチック型パッケージでは、本体側は半導体記
憶素子が搭載しうる大きさの空洞を設けて、空洞部の底
面には、半導体記憶素子を接合するダイパッド部とパッ
ケージ外部と半導体記憶素子の間での電気信号の伝達を
行うだめのリード線接続用インナーリード先端部を露出
させている。この場合、ダイパッド部とインナーリード
先端部の表面は、金や銀の薄いメッキ層またはアルミニ
ウムのクラッド層が施されておシ、ダイパッド部に銀ペ
ーストや鉛〜錫ハンダ等で半導体記憶素子が塔載され、
半導体記憶素子の入出力信号端子とインナーリード先端
のメッキ部は、金やア3 ベー/ ルミニウムやパラジウムからなる細線で接続さね。
Conventional technology For example, in a plastic package for mounting an erasable semiconductor memory element, a cavity large enough to accommodate the semiconductor memory element is provided on the main body side, and the semiconductor memory is placed on the bottom of the cavity. The die pad portion for bonding the elements and the tip portions of inner leads for connecting lead wires for transmitting electrical signals between the outside of the package and the semiconductor memory element are exposed. In this case, the surfaces of the die pad part and the tips of the inner leads are coated with a thin gold or silver plating layer or an aluminum cladding layer, and the semiconductor memory element is mounted on the die pad part with silver paste or lead-tin solder. published,
The input/output signal terminals of semiconductor memory devices and the plated parts at the tips of the inner leads are connected with thin wires made of gold, aluminum, aluminum, or palladium.

ている。この状態で、空洞部の蓋に用いる石英ガラスも
しくはプラスチックと熱膨張率が近いアルミナガラスが
空洞部にはめ適寸れ、空洞部側壁プラスチック面とガラ
ス側壁面とが接着剤で接着される。そして接着剤が、加
熱または光照射°等によって硬化し、空洞部の気密が得
られる。このようにして従来の中空型プラスチックパッ
ケージが達成される。
ing. In this state, alumina glass having a coefficient of thermal expansion similar to that of quartz glass or plastic used for the lid of the cavity is fit into the cavity, and the plastic side wall surface of the cavity and the glass side wall surface are bonded with an adhesive. Then, the adhesive is cured by heating or light irradiation, thereby making the cavity airtight. In this way, a conventional hollow plastic package is achieved.

発明が解決しようとする問題点 従来構造のプラスチック型パッケージは、空洞部の蓋に
石英やアルミナ等の高価なガラス材ネ」を必要とし、ま
たそれらの接着にはパッケージを構成している本体や蓋
のプラスチックやガラスと異る接着剤を用いており、そ
の接着部での熱膨張係数の差から耐熱サイクル疲労性や
耐湿性等の信頼性に問題があった。
Problems to be Solved by the Invention Plastic packages with conventional structures require an expensive glass material such as quartz or alumina for the lid of the cavity, and bonding them requires the use of the main body of the package or The lid uses a different adhesive than the plastic or glass, and the difference in coefficient of thermal expansion at the bonded area has led to problems with reliability such as heat cycle fatigue resistance and moisture resistance.

問題点を解決するだめの手段 本発明では、前面の問題を解決すべく、パッケージの本
体と蓋をプラスチックで構成し、プラスチックには熱可
塑性プラスチックを用い、蓋側にはポリカーボネートや
アクリル等の耐熱々可塑性透明プラスチックを用いる。
Means to Solve the Problem In the present invention, in order to solve the problem on the front, the main body and lid of the package are made of plastic, the plastic is thermoplastic, and the lid is made of heat-resistant material such as polycarbonate or acrylic. A flexible transparent plastic is used.

さらに、ノ々ツケージの本体と蓋は、接合部を超音波溶
融接着法で接着する。こわ2により」−記問題は解決で
きる。
Furthermore, the main body and lid of the Nonotsu cage are bonded together using an ultrasonic melt bonding method. By using 2, the problem can be solved.

作用 パッケージを構成する本体及び蓋に熱可塑性プラスチッ
クを用いることで、機械的振動による接合部の溶融化接
着が可能となる。さらに接着のだめのプラスチック発熱
は部分的で、・くツケージ内、部に塔載した半導体素子
に殆んど熱を伝えることなく、本構造が達成できる。
By using thermoplastics for the main body and lid that constitute the working package, it is possible to melt and bond the joints by mechanical vibration. Furthermore, the heat generated by the plastic in the bonding container is localized, and the present structure can be achieved without transmitting almost any heat to the semiconductor element mounted on the inside of the shoe cage.

実施例 以下に本発明の実施例を撮像半導体素子1用中空型プラ
スチツクパツケージの構造を例にとって第1図と第2図
を参照し々から説明する。
Embodiments Below, embodiments of the present invention will be described with reference to FIGS. 1 and 2, taking the structure of a hollow plastic package for an imaging semiconductor device 1 as an example.

中空型パッケージは、本体2と蓋3から構成されており
、本体2はポリフェニルサルファーからなる熱可塑性プ
ラスチック(以下PPS樹脂と記す)で、蓋3はポリカ
ーボネート(以下、PCC50ページ 脂と記す)やアクリル(以−j、hL樹脂と記す)等の
ような可視光透過性の熱可塑性プラスチックを用いる。
The hollow package consists of a main body 2 and a lid 3. The main body 2 is made of thermoplastic plastic made of polyphenylsulfur (hereinafter referred to as PPS resin), and the lid 3 is made of polycarbonate (hereinafter referred to as PCC50 resin) or A thermoplastic plastic that transmits visible light, such as acrylic (hereinafter referred to as hL resin), is used.

中空パッケージの本体2は半導体素子1が塔載でき、さ
らに本体2中に埋め込まれたリードフレーム4のインナ
ーリード5と半導体素子1との間を金属細線6で接続す
る作業が出来る程度の大きさの矩形の窪み穴7を設ける
。この窪み穴7の底面は、半導体素子塔載部8とインナ
ーリード5の先端部表面が、pps樹脂と同一平面に露
出している。ここで使用するリードフレーム4の材質は
、鉄−ニッケル合金(42アロイ)やコバールや銅合金
を用いる。
The main body 2 of the hollow package is large enough to accommodate the semiconductor element 1 and to connect the inner leads 5 of the lead frame 4 embedded in the main body 2 and the semiconductor element 1 with thin metal wires 6. A rectangular hollow hole 7 is provided. On the bottom surface of this recessed hole 7, the semiconductor element mounting portion 8 and the tip surfaces of the inner leads 5 are exposed on the same plane as the pps resin. The material of the lead frame 4 used here is iron-nickel alloy (42 alloy), Kovar, or copper alloy.

そして、リードフレーム4が窪み穴7の底面に露出する
部分の表面(インナーリード5の表面)は、0.5〜3
μm程度の厚みの金や銀のメッキもしくはアルミニウム
箔をクラッドした表面加工層9を形成する。半導体素子
1の入出力信号端子部である主としてアルミニウムから
なるポンディングパッド1oと表面加工層9との電気的
接続は、アルミニウム、金あるいはパラジウムからなる
金6 ページ 属細線6を用いて、超音波ボンディングや熱圧着ボンデ
ィングによって行う。
The surface of the portion of the lead frame 4 exposed at the bottom of the hollow hole 7 (the surface of the inner lead 5) is 0.5 to 3.
A surface treatment layer 9 is formed by plating gold or silver or cladding with aluminum foil to a thickness of approximately μm. Electrical connection between the bonding pad 1o, which is the input/output signal terminal portion of the semiconductor element 1 and which is mainly made of aluminum, and the surface treatment layer 9 is made by ultrasonic wave using a gold metal wire 6 made of aluminum, gold, or palladium. This is done by bonding or thermocompression bonding.

さらに、中空型パッケージの窪み穴7の全周囲には適当
な幅と厚みのフランジ型形状部11を設け、その上面全
周はV+Uや角型の溝12を50〜200μmの深さに
形成する。
Furthermore, a flange-shaped part 11 of appropriate width and thickness is provided around the entire circumference of the hollow hole 7 of the hollow package, and a V+U or square-shaped groove 12 is formed at a depth of 50 to 200 μm around the entire upper surface of the flange-shaped part 11. .

つぎに、蓋3は先に述べたAL樹脂やpc樹脂のような
可視光透過性の透明樹脂で、本体2のフランジ型形状部
11と同一寸法に射出や押し出し法で平板状に成形する
。そして蓋3の接合部全周には、本体2のフランジ地形
状部11表面の溝12と一致する位置に、■形、U形な
いしは角型の凸形壁13を、1oO〜30oItmの高
さに形成する。
Next, the lid 3 is made of a transparent resin that transmits visible light, such as the above-mentioned AL resin or PC resin, and is molded into a flat plate having the same dimensions as the flange-shaped portion 11 of the main body 2 by injection or extrusion. Then, around the entire circumference of the joint of the lid 3, a ■-shaped, U-shaped, or square-shaped convex wall 13 is installed at a position that matches the groove 12 on the surface of the flange-shaped portion 11 of the main body 2, with a height of 1oO to 30oItm. to form.

そして本体2と蓋3との互いの接合部を対向させ、平板
周囲の凸形壁13がフランジ溝12にはまり込むように
する。
Then, the joint portions of the main body 2 and the lid 3 are made to face each other so that the convex wall 13 around the flat plate fits into the flange groove 12.

この状態で、本体2を固定して蓋3側から超音波振動や
高周波誘導を加えて、平板周囲の凸形壁13を溶隔させ
、本体2フランジ溝12に溶着す7 ベー/ ることで、透明窓を有する中空型プラスチックパッケー
ジの気密封止を行う。
In this state, the main body 2 is fixed and ultrasonic vibration or high frequency induction is applied from the lid 3 side to weld the convex wall 13 around the flat plate and weld it to the flange groove 12 of the main body 2. , hermetically sealing a hollow plastic package with a transparent window.

発明の効果 本発明によれば、次のような効果がある。Effect of the invention According to the present invention, there are the following effects.

(1)  パッケージ構成部品が安価である。(1) Package components are inexpensive.

(2)パッケージが軽量である。(2) The package is lightweight.

(3)本体と蓋の接続が溶着法であるため、気密性が高
い。
(3) Since the main body and lid are connected by welding, airtightness is high.

(4)半導体EFROMや撮像素子など広い用途で適用
しうる。
(4) It can be applied to a wide range of applications such as semiconductor EFROM and image pickup devices.

(5)部分加熱を用いるため、半導体素子への熱的影響
が少ない。
(5) Since partial heating is used, there is little thermal influence on semiconductor elements.

【図面の簡単な説明】[Brief explanation of the drawing]

1・・・・・・半導体素子、2・・・・・・本体、3・
・・・・・蓋、4・・・・・・リードフレーム、5・・
・・・・インナーリード、6・・・・・・金属細線、7
・・・・・・窪み穴、8・・・・・半導体素子塔載部、
9・・・・・・表面加工層、1o・・・・・・ボンディ
ングパッド、11・・・・・・フランジ、12・・・・
・・フランジ溝、13・・・・・平板凸形壁。
1...Semiconductor element, 2...Main body, 3.
...Lid, 4...Lead frame, 5...
...Inner lead, 6...Metal thin wire, 7
. . . Hole, 8 . . . Semiconductor element mounting part,
9... Surface treatment layer, 1o... Bonding pad, 11... Flange, 12...
...Flange groove, 13...Flat convex wall.

Claims (5)

【特許請求の範囲】[Claims] (1)本体及び蓋からなり、その蓋が平板からなること
を特徴とする電子部品塔載用パッケージ。
(1) A package for mounting electronic components, comprising a main body and a lid, the lid being a flat plate.
(2)本体および蓋の接合部がV形、U形、直角を含む
多角形の1つ以上の溝および突起による嵌合構造を有す
ることを特徴とする特許請求の範囲第1項記載の電子部
品塔載用パッケージ。
(2) The electronic device according to claim 1, wherein the joint between the main body and the lid has a fitting structure with one or more polygonal grooves and protrusions including V-shapes, U-shapes, and right angles. Package for mounting parts.
(3)パッケージの本体はフランジ型形状を有し、且つ
本体と蓋の接合部が互に平行を維持していることを特徴
とする特許請求の範囲第1項または第2項記載の電子部
品塔載用パッケージ。
(3) The electronic component according to claim 1 or 2, wherein the main body of the package has a flange shape, and the joint between the main body and the lid remains parallel to each other. Tower mounting package.
(4)パッケージの本体または蓋のどちらか一方または
両者に予め金属製リードを挿入することを特徴とする特
許請求の範囲第1項、第2項または第3項記載の電子部
品塔載用パッケージ。
(4) A package for mounting electronic components according to claim 1, 2, or 3, characterized in that a metal lead is inserted in advance into either or both of the main body and the lid of the package. .
(5)本体と蓋が、熱可塑性または熱硬化性樹脂からな
ることを特徴とする特許請求の範囲第1項、第2項また
は第3項記載の電子部品塔載用パッケージ。
(5) The electronic component mounting package according to claim 1, 2, or 3, wherein the main body and the lid are made of thermoplastic or thermosetting resin.
JP60177162A 1985-08-12 1985-08-12 Electronic-part mounting package Pending JPS6237949A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60177162A JPS6237949A (en) 1985-08-12 1985-08-12 Electronic-part mounting package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60177162A JPS6237949A (en) 1985-08-12 1985-08-12 Electronic-part mounting package

Publications (1)

Publication Number Publication Date
JPS6237949A true JPS6237949A (en) 1987-02-18

Family

ID=16026262

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60177162A Pending JPS6237949A (en) 1985-08-12 1985-08-12 Electronic-part mounting package

Country Status (1)

Country Link
JP (1) JPS6237949A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09237901A (en) * 1996-02-28 1997-09-09 S I I R D Center:Kk Semiconductor device
US5977628A (en) * 1992-12-18 1999-11-02 Mitsubishi Denki Kabushiki Kaisha Semiconductor device mounted in resin sealed container
JP2016100484A (en) * 2014-11-21 2016-05-30 株式会社 後島精工 Semiconductor element container for storing semiconductor element

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5977628A (en) * 1992-12-18 1999-11-02 Mitsubishi Denki Kabushiki Kaisha Semiconductor device mounted in resin sealed container
JPH09237901A (en) * 1996-02-28 1997-09-09 S I I R D Center:Kk Semiconductor device
JP2016100484A (en) * 2014-11-21 2016-05-30 株式会社 後島精工 Semiconductor element container for storing semiconductor element

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