JPS6238366Y2 - - Google Patents

Description

[Detailed description of the invention] The present invention relates to a blend circuit for a stereo receiver, and in particular avoids noise generation when the switch of the blend circuit is turned on or off, and enables appropriate on/off control with a single control voltage system. This is how it was done.

A stereo receiver having a blending circuit is constructed as shown in FIG. To explain this simply,
1 is an antenna, 2 is a front end circuit, 3 is an intermediate frequency amplification circuit, 4 is a detection circuit, 5 is a stereo demodulation circuit, 6L and 6R are transmission lines for left and right signals, and 7L and 7R are in these transmission lines, respectively. 8L and 8R are amplifier circuits, and 9L and 9R are speakers, respectively. Again 1
0 is a control circuit, which in this column is composed of a so-called micro (personal) computer. Generally, the control signal for the microcomputer 10 is, for example, a signal S ₁ with a positive polarity potential of +5V.
and a signal S ₂ at ground potential are used. 11 is a phase locked loop, and computer 1
The tuning frequency within the front end circuit 2 is determined by a command from 0. Reference numeral 12 denotes a so-called blend circuit, which is also operated by instructions from the computer 10. This blending circuit 12 generally includes a switching element 13.
and a blending element 14 are connected in series, and when the switching element 13 is turned on, the left signal and the right signal are mixed with characteristics determined by the blending element 14. Therefore, when there is a relatively large amount of noise during stereo reception, by mixing mainly high-frequency components, it is possible to achieve relatively good stereo reception of SN while retaining the stereo feeling.

As the blending circuit 12, a circuit shown in FIG. 2 is conventionally known. That is, the switching element 13
By connecting the PNP transistor 13a and the NPN transistor 13b in series and applying a negative polarity voltage of, for example, -5V and a positive polarity voltage of +5V to their respective bases from the terminals 15a and 15b, both 13a and 13b are turned on. That is, by blending the left signal and the right signal with predetermined characteristics and applying voltages of +5V and -5V to the bases of the above-mentioned transistors 13a and 13b,
Both 13a and 13b are turned off to separate the left and right signals. Blend element 14
In this example, the capacitor 14a and the resistor 14b are connected in parallel.

When blending the left and right signals in this way, the transmission lines 6L and 6R of the left and right signals are set to 0V DC.
The above-mentioned blending circuit 12 is connected at a certain point at the level of . This is switching element 1
This is to avoid noise occurring due to the change in the DC level of the left or right transmission line or both transmission lines due to turning on or off of the switch 3.

However, in the circuit shown in FIG. 2, when the transistors 13a and 13b are turned on, the current supplied to their bases flows into the transmission path 6L or 6R, or both, which may change the DC level of these transmission paths. That is, there is a possibility that noise may be generated due to turning on or off of the switching element 13. Furthermore, there is a drawback that two systems of control voltages, +5V and -5V, are required.

The present invention avoids such drawbacks, and the blending circuit of the stereo receiver according to the present invention will be explained below with reference to FIG. Incidentally, parts corresponding to those in FIG. 2 are given the same reference numerals and their explanations will be omitted.

In the present invention, a field effect transistor (hereinafter referred to as FET) is used as the switching element 13, and a PNP transistor 16 is further provided to control the FET 13. That is, 17 is an input terminal for a control signal,
This is connected to PNP through diode 18-resistor 19.
It is connected to the base of a transistor 16, whose emitter is grounded, and whose collector is connected to, for example, a -5V negative polarity power supply 21 (shown as a power supply line in the figure) through a resistor 20, and a resistor 23. It is connected to the gate of FET13 through. Also, the base of the transistor 16 is connected to the negative power supply line 2 through the resistor 22.
Connected to 1. Note that the -5V negative polarity power line 21 comes from the power supply of the radio receiver itself, while the +5V control voltage comes from the power supply normally used as the control voltage in a micro (personal) computer. It is. It is assumed that the computer ground and the radio receiver ground are electrically connected to each other.

The operation of such a configuration will be explained. Now, when +5V control voltage is applied from the computer to terminal 17, diode 18 - resistor 19 - 2
A current flows through PNP transistor 16, and the potential at the base of PNP transistor 16 rises to be higher than its emitter potential (ground potential). As a result, the transistor 16 is turned off (non-conductive), and its collector potential becomes -5V, which is applied to the gate of the FET 13. Therefore, this FET 13 is turned off, and the left and right signal transmission lines 6L and 6R are electrically separated.

Next, when a control voltage of 0V is applied to the terminal 17 (usually grounded), the base potential of the transistor 16 is lowered compared to the above case, that is, it is lower than the emitter potential (ground potential), and this transistor 16
is on (conducting). Based on this, the gate of the FET 13 is set to the ground potential and is turned on, that is, both transmission lines 6L and 6R are electrically connected through the blending element 14, that is, the left and right signals are blended.

As explained above, according to the present invention, the desired purpose can be achieved by applying a +5V potential to the terminal 17 or by grounding it, that is, by applying a switching signal. One system of power supply is sufficient, and since it can be controlled with a positive polarity voltage such as +5V, it has the feature that it can be easily controlled by a microcomputer as described above. or
Since the switching is performed using the FET 13, it is possible to completely eliminate the noise that is likely to occur when the FET 13 is turned on or off. In particular, FET13 is
Since the gate is turned on at 0V, there is no risk of current flowing into the transmission line 6L or 6R from the control voltage source at this time, that is, the generation of noise can be reliably avoided. Furthermore, since FETs are voltage-controlled to the gate (current is controlled by base current in transistors), they have characteristics such as very little change in distortion factor.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an example of a radio receiver that can use the blending circuit according to the present invention, FIG. 2 is a connection diagram showing an example of a conventional blending circuit, and FIG.
The figure is a connection diagram showing a blending circuit according to the present invention. 6L and 6R are left and right signal transmission lines, 13 is a field effect transistor, 14 is a blend element, and 16 is a
A PNP transistor 17 is an input terminal for a switching signal.

Claims (1)

[Scope of utility model registration request] A field effect transistor and a blending element are connected in series between the left signal and right signal transmission paths from the stereo demodulation circuit, and the field effect transistor is turned on or off by supplying a switching signal to its gate. In the blend circuit of the stereo receiver, a switching signal input terminal to which a positive polarity potential or a ground potential is applied as a control voltage from a microcomputer;
It has a PNP transistor whose base is connected to the input terminal, the emitter of the transistor is grounded, the collector is connected to the gate of the field effect transistor, and it is connected to the negative power supply of the receiver through a resistor. Then, the base of the above PNP transistor is connected to the negative polarity power supply of the above receiver through a resistor to form a stereo receiver blend circuit.