JPS6239546B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a transistor structure operated at a high current density, and more particularly to the shape of an emitter region arranged in the form of an island within a base region.

It is generally known that when a transistor is operated at a high current density, the current flowing through the emitter region is concentrated around the emitter-base junction plane due to a voltage drop due to internal resistance in the lateral direction of the base just below the emitter region. ing. Therefore, when the current increases, the temperature of the emitter-base junction surface rises, which may lead to breakdown, and there is a drawback that the breakdown strength is low. Conventionally, in order to make the peripheral length as long as possible relative to the area of the emitter, the shape of the emitter was made into a stripe shape, or each part was formed into a separate island shape, and each emitter region was connected to an electrode. It was connected. For the effect of increasing the peripheral length, it is clearly better to form the emitter vines into an island shape.

FIG. 1 is a plan view showing a part of a conventional transistor pattern in which the emitter region is formed into an island shape.

In FIG. 1, 1 is a semiconductor substrate of a first conductivity type, for example, an n-type silicon semiconductor. Reference numeral 2 denotes a base region formed by diffusing impurities imparting a second conductivity type different from that of the semiconductor substrate 1, for example P type, from the main surface of the semiconductor substrate 1, and 3 denotes the base region 2.
A mesh base contact region 4 is formed by diffusion from the main surface of the semiconductor substrate 1 so as to give a high impurity concentration of the same conductivity type within the semiconductor substrate 1; These emitter regions are each formed by diffusion within the base region 2 surrounded by the mesh of the base contact region 3. A plurality of emitter regions 4 are formed independently in the shape of islands in the base region 2, and each emitter region 4 has a square shape. An emitter contact 5 is formed in the center of each emitter region 4, and each emitter region 4 has a square shape. 4 are connected via comb-shaped electrodes 6. On the other hand, a plurality of base contacts 7 are formed in the base contact region 3 and connected by electrodes 8. According to such a transistor structure, the peripheral length of the emitter region 4 becomes significantly longer, and the h _FE and saturation voltage when a large current is passed are greatly improved, and the breakdown strength is improved. If the temperature rises locally in this state, current concentration may occur in that area and cause damage.

The present invention has been made in view of the above-mentioned points, and provides a transistor structure with further improved breakdown strength than the conventional transistor shown in FIG. The present invention will be described in detail below with reference to the drawings.

First, before explaining the present invention, the causes of destruction in conventional transistors will be clarified.

FIG. 2 shows one island of the emitter region 4 and the base contact region 3 surrounding it. In Fig. 2, R _SE is the internal resistance between AB in the emitter region 4, R _SE ' is the internal resistance between AC in the emitter region 4,
R _BB is the internal resistance between AB in the base region 2, and R _BB ' is the internal resistance between AC in the base region 2. Now let I _E be the horizontal current flowing between AB and I E ' be the horizontal current flowing between AC, then I _E and I _{E '} are I _E ∝expq/KT(V _BE −R _SE I _E − R _BB ×I _E /h _F
E )…… (1) I _E ′∝expq/KT (V _BE −R _SE ′I _E ′−R _BB ′×I _E ′/h _FE )
...(2) It is expressed as. q is charge, k is Boltzmann constant,
T is the temperature, V _BE is the base-emitter voltage, and h _FE is the current ratio.

In the above equation, since I _E and I _E ' are small when the current is low, the second and third terms are negligible, and a substantially equal current flows through the entire emitter region 4. Next, when a large current begins to flow in the emitter region 4, the value of V _BE increases and at the same time I _E and I _E '
is increasing. That is, the second and third terms of equations (1) and (2)
terms can no longer be ignored. And the distance between AB is
Since it is longer than the distance between AC, the internal resistance of emitter region 4 is R _SE > R _SE ′, and
Although the difference in the distance is small, the internal resistance of
Since the specific resistance of base region 2 is high, R _BB > R _BB '
It is becoming. Therefore, at the beginning of current flow, I _E <
I _E ', the temperature of the junction between AC rises higher than the temperature of the junction between AB, and this temperature difference causes more emitter current IE to flow due to the emitter-base junction characteristics, and the temperature of the junction between AB increases. Increase the current I _E and I
Since the difference in _E ' becomes larger and larger, the emitter current concentrates between AC and eventually leads to destruction.

Therefore, the present invention attempts to equalize the currents I _E and I _E ' when a large current flows.
If I _E 〓I _E ', then the following equation is obtained from equations (1) and (2).

R _SE +R _BB /h _FE 〓R _SE ′+R _BB ′/h _FE …
…(3) That is, h _FE R _SE +R _BB 〓h _FE R _SE ′+R _BB ′…(4) Now, when the maximum allowable current flows, suppose h _FE drops to “2”. , Equation (4) becomes 2R _SE +R _BB 〓2R _SE ′+R _BB ′...(5). Therefore, in this case, it is only necessary to design the shape of the emitter region 4 so that equation (5) holds true.

FIG. 3 is a partial plan view of a transistor structure embodying the present invention.

In FIG. 3, 9 is a semiconductor substrate of a first conductivity type, for example, an n-type semiconductor silicon. 10
11 is a base region formed by diffusing an impurity giving a second conductivity type different from that of the semiconductor substrate 9, for example, P type, from the main surface of the semiconductor substrate 9; A network base contact region 12 is formed by diffusion from the main surface of the semiconductor substrate 9 to give impurities having the same conductivity type as the semiconductor substrate 9 from the main surface through the network of the base contact region 11. The emitter regions are each diffused and formed within the surrounded base region 10. This emitter region 12 is the most characteristic feature of the present invention, and its shape is a square with each side having a recess 13 in the shape of a notch toward the center of the emitter region 12. An emitter contact 14 is formed in the center, and each emitter region 12 is connected by a comb-shaped electrode 15.
A plurality of base contacts 16 are formed in the base contact region 11 and are connected to each other by electrodes 17.

In order to explain the emitter region 12 in more detail, FIG. 4 shows one emitter region 12 and a part of its surroundings. The emitter region 12 has a square shape with recesses 13 provided on each side, and the recesses 13 are provided in a semicircular shape. With the emitter region 12 having such a shape, the lateral internal resistance R _{SE ' in the emitter region 12 decreases in the direction of the shortest distance from the center of the emitter region 12 to the base contact region 11, and the lateral internal resistance R SE} ' in the base region 10 decreases. This results in an increase in the lateral internal resistance R _BB '.

FIG. 5 is a graph showing the depth of the recess that satisfies equation (5) when h _FE decreases to "2". Fifth
In the figure, the horizontal axis is the distance between ACs, and the vertical axis is the resistance. Straight line A is the internal resistance h _FE “2” with respect to the distance from point A in the emitter region 12.
times, that is, 2R _SE ′, and the straight line B is the base area 1
Internal resistance R _B with respect to distance from point C at 0
_B ′ is shown, and the straight line C is relative to the position of the joint surface.
(5), that is, 2R _SE ′+R _BB ′.
Assuming that the position of the bonding surface in the emitter shape shown in Fig. 2 is point D in Fig. 5,
The sum of the value of straight line A at point D and the value of straight line B at point D, that is, the value of straight line C, is (2R _SE '+R _B
B ') D. On the other hand, R _SE >R _SE ′, R _BB
>R _BB ′, so naturally 2R _SE + between AC
Assume that the value of R _BB is larger than (2R _SE ′+R _BB ′)D, for example, at point F. Therefore, in order to establish equation (5) depending on the formation of the recess 13, if we find the point on the horizontal axis corresponding to the straight line C, which is the value of the lower point, and let this be the point E, then DE The distance △l′ is the recess 1
The depth will be 3. By recessing by Δl', the internal resistance of the emitter region 12 decreases by ΔR _SE ', while the internal resistance of the base region 10 increases by ΔR _BB ', then 2R _SE +R _BB 〓2(R _SE ′−△R _SE ′) +(R _BB ′+△R _BB ′) ...Equation (6) is established, and Equation (5) is satisfied.

In this way, when a large current with h _FE of "2" flows, equation (5) holds true, so the voltage between AB and AC
The currents I _E and I _E ' flowing between them become equal, and destruction due to current concentration is prevented.

In the embodiments of the present invention, the case where h _FE decreases to "2" has been explained, but in general, h FE is set so that equation (4) holds true, that is, h _FE when a permissible large current flows.
The depth of the recess should be determined so that equation (4) holds true for the value of . Further, the recessed portion is not limited to a semicircular shape, but may be formed in the direction of the shortest distance from the center of the emitter region 12 to the base contact region 11.
What is necessary is to form the recess 13 in such a shape that _FE R _SE ′+R _BB ′ increases. Furthermore, the same effect can be obtained in the case where the base contact region 11 is not formed and the base contact is based on an electrode.

As described above, according to the present invention, by forming the emitter region into a shape in which a concave portion is formed toward the center of the emitter region, it is possible to make the current distribution uniform when a large current is passed, and to prevent current concentration from occurring. Therefore, h _FE and saturation voltage at large currents can be significantly improved, and the breakdown strength can be further improved.

[Brief explanation of the drawing]

FIG. 1 is a partial plan view of a transistor showing a conventional example, FIG. 2 is a plan view showing one of the emitter regions of the transistor shown in FIG. 1, and FIG. 3 is a partial plan view showing an embodiment of the present invention. FIG. 4 is a plan view showing one of the emitter regions of the embodiment shown in FIG. 3, and FIG. 5 is a graph for determining the depth of the recess when h _FE is set to "2". 9...Semiconductor substrate, 10...Base region, 11
... base contact region, 12 ... emitter region, 13 ... recess, 14 ... emitter contact, 15 ... electrode, 16 ... base contact,
17...It is an electrode.

Claims (1)

[Scope of Claims] 1. A semiconductor substrate of a first conductivity type, a base region of a second conductivity type provided on the main surface of the semiconductor substrate, and a second conductivity type formed in a mesh shape within the base region. A transistor structure having a base contact region or a base contact having a high impurity concentration and a first conductivity type emitter region formed in the base region surrounded by the base contact region or the base contact and having a first conductivity type and a high impurity concentration. The emitter region has resistances (RSE and
RSE′) and the resistance in the base region (RBB and
RBB′) satisfies hFE×RSE+RBB≒hFE×RSE′+RBB′ (hFE is the current ratio when the maximum allowable current flows.) Form a recess in the center of each side. Characteristic transistor structure.