JPS6239812B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a pattern inspection method, and more particularly to a pattern inspection method used for inspecting a photo mask, a semiconductor substrate, etc. in which a plurality of patterns of the same type are formed in alignment.

A photo mask, or working mask, is a master mask formed by reducing and projecting a reticle drawn based on design data using a pattern generator using a step-and-repeat method. Formed by transfer. In the conventional photo mask manufacturing process, inspection to see whether the pattern is formed according to the design data involves comparing the microscopic inspection information of the reticle with the design data while the reticle is in the state. In this way, a master mask or a working mask is inspected by comparing microscopic inspection information of a plurality of patterns formed on these masks. Therefore, in the conventional process described above, when forming a master mask by reduction projection, if foreign matter adheres to the reticle or defects occur in the reticle pattern, all chips on the master mask are Since similar abnormalities occur on the region, these abnormalities are not determined to be defective during mask inspection and are used as they are in the manufacturing process of the semiconductor device, resulting in a reduction in the manufacturing yield of the semiconductor device. To prevent such inconveniences, attempts have been made to check the pattern of all chip areas against design data during mask inspection, but this method has not been put into practical use because it requires a long inspection time. do not have.

The present invention eliminates the above-mentioned problems and aims to improve the inspection accuracy and inspection efficiency of photo masks or semiconductor substrates by comparing and inspecting the pattern of a specific chip area formed on a substrate with design data. After that, the present invention provides a method of pattern inspection on a photo mask or semiconductor substrate, in which the patterns of each chip area are compared and inspected based on the inspection information.

That is, the present invention provides a pattern inspection method for inspecting a plurality of patterns of the same shape formed on the same substrate, in which pattern design data and microscopic inspection information of the first pattern are compared to determine the first pattern. , the information on the test results is stored in a memory, and the information on the test results stored in the memory is added to the first pattern of microscopic examination information and compared with the second pattern of microscopic examination information. to inspect the second pattern, store the information of the inspection result in the memory, and then sequentially include the information of the inspection result of the inspected pattern of the memory stored in the microscopic inspection information of the inspected pattern in the memory. The present invention is characterized in that the uninspected pattern is inspected by comparing it with the microscopic inspection information of the uninspected pattern in consideration of the above.

The following describes one embodiment of the present invention, which is a schematic structural diagram of a photo mask automatic defect detection apparatus shown in FIG.
This will be explained in detail using the schematic configuration diagram of the pattern inspection apparatus shown in FIG. 2 and the process sectional views shown in FIGS. 3a to 3d.

For pattern inspection of a photo mask according to the method of the present invention, for example, an automatic photo mask defect detection apparatus whose schematic structure is shown in FIG. 1 is used. In the figure, 1a and 1b are objective mirrors, 2 is a visual field interval adjustment mechanism, 3 is an XY stage, 4 is a light projection window, 5a,
5b is a mirror, 6 is a beam interval adjustment mechanism, 7 is a beam splitting prism, and 8 is a light source. Then, the photo mask 9 to be inspected is placed on the XY stage 3 of the automatic defect detection device as shown in the figure, and the distance between the objective mirrors 1a and 1b is adjusted by the field interval adjustment mechanism 2 and the beam interval adjustment mechanism. 6 causes mirrors 5a, 5
The distance between b is adjusted to the pitch of the chip patterns aligned and formed on the photo mask 9, and the optical images of the chip patterns captured by the objective mirrors 1a and 1b are converted into electrical signals and compared. It is done by hand.

Further, in the pattern inspection apparatus used in one embodiment of the method of the present invention, for example, as shown in FIG.
3 and monitors/televisions 14a, 14b, 14c, and the microscopic inspection information of the pattern is sent to the information processing device 13 via the interface 12.
is supplied to And in the information processing device,
The pattern design data 15 inserted by a magnetic tape (MT) or the like is compared with the pattern microscopic inspection data, and the pattern microscopic inspection data are compared with each other, and the defective chip position memory 16 in the chip, the defective chip position memory 17, and the data memory are compared. 18 etc. are pooled, and if necessary, inspection information 19 and defect map 2 are
0, inspection data, list 21, etc. are output. A standard pattern image serving as a reference during inspection is displayed on the monitor/television 14a, an image of the pattern to be inspected is displayed on 14b, and a superimposed image of these images is displayed on 14c.

Next, the pattern inspection method of the present invention will be explained. First, as shown in FIG. 3a, a plurality of chip patterns 22a, 22b, 22c, 22d, etc. are arranged in rows at a predetermined pitch, and a photo is formed by arranging a plurality of such chip rows.・Mask 9,
XY of the photo mask automatic defect detection device mentioned above
The chip is placed on the stage 3, and the distance between the objective mirrors 1a and 1b and the mirror (not shown) of the illumination mechanism are adjusted to the pitch of the chip, and then the objective mirrors 1a and 1b are placed on the stage 3.
are positioned directly above the chip patterns 22a and 22b, respectively, to adjust the focus. In this state, the microscopic examination information of the chip pattern 22a observed through the objective mirror 1a is compared with the pattern design data (FIG. 2, 15) inserted through the MT, and the chip pattern 22a is stored in the information processing device. At the same time, the test result of the chip pattern 22a is stored. Next, as shown in FIG. 3b, the chip patterns 22a and 2 are observed through the objective mirrors 1a and 1b, respectively, with the photo mask 9 kept in the same position.
The microscopic examination information of 2b is transferred to the chip pattern 22a.
The internal chip defective position memory of the chip pattern 22b is taken into account and collated in the information processing device, and the internal chip defective position memory of the chip pattern 22b is formed in the information processing device, and at the same time, the inspection results of the chip pattern 22b are stored. . At this point, the intra-chip defective position memory of the chip pattern 22a is erased. Then, as shown in Figure 3c, XY stage 3
is moved 1 [pitch] in the direction of the arrow, the chip patterns 21b and 21c are observed through the objective mirrors 1a and 1b, respectively, and the respective microscopic examination information is transferred into the chip of the chip pattern 22b in the information processing device. The chip pattern 22c is compared with the defective position memory to form an in-chip defective position memory of the chip pattern 22c in the information processing device.
The test results for pattern 22c are stored. At this point, the intra-chip defective position memory of the chip pattern 22b is erased. Next, as shown in Figure 3d, move the XY stage 3 one more time in the direction of the arrow.
[Pitch] Move and chip patterns 22c and 2
2d is observed through the objective mirrors 1a and 1b, and the information of each microscope is transmitted to the information processing device.
The intra-chip defective position memory of the chip pattern 22c is also taken into account for comparison, and an intra-chip defective position memory of the chip pattern 22d is formed in the information processing apparatus, and at the same time, the inspection results of the chip pattern 22d are stored. At this point, the intra-chip defective position memory of the chip pattern 22c is erased. Thereafter, the inspected chip patterns and uninspected chip patterns are sequentially compared and inspected in the same manner, and when the inspection of the chip patterns formed in 1 [column] is completed, the XY stage is moved to 1 [stage].
Then, the same chip pattern is sequentially inspected as described above. When the inspection is completed, the inspection information, defect map, inspection data list, etc. of the photo mask are exported from the information processing device.
put.

In the above embodiment, the case where the chip pattern fits within the field of view of the objective mirror was explained, but if the chip pattern is larger than the field of view, the chip pattern is divided into desired observation areas and a photo mask is used. Inspection is carried out in the same manner as in the above embodiment while moving intermittently or continuously. It is also possible to inspect while moving the photo mask back and forth. The method of the present invention can also be applied to inspecting a photo mask transferred from a multi-chip reticle or to inspecting a pattern transferred onto a semiconductor substrate.

As explained above, in the method of the present invention, all chip patterns formed on a photo mask or a semiconductor substrate are based on chip patterns inspected by comparing them with pattern design data. will be inspected. Therefore, it is equivalent to inspecting all chip patterns by comparing them with the pattern design data, and the inspection accuracy is extremely high.In addition, the inspection time is significantly reduced compared to comparing all the patterns with the pattern design data. Ru.

[Brief explanation of the drawing]

FIG. 1 is a schematic structural diagram of a photo mask automatic defect detection device used in an embodiment of the present invention, FIG. 2 is a schematic structural diagram of a pattern inspection device, and FIG.
9 to d are process cross-sectional views in one embodiment of the present invention. In the figure, 1a and 1b are objective mirrors, 3 is an XY stage, 9 is a photo mask, 22a, 22b, 2
2c and 22d indicate chip patterns.

Claims (1)

[Claims] 1 In a pattern inspection method when inspecting multiple patterns of the same type formed on the same substrate,
The first pattern is inspected by comparing the pattern design data and the microscopic inspection information of the first pattern, and the inspection result information is stored in a memory, and then the microscopic inspection information of the first pattern is stored in the memory. The second pattern is inspected by comparing the inspection result information with the second pattern microscopic inspection information, and the inspection result information is stored in the memory, and then the microscopic inspection information of the inspected pattern is A pattern inspection method characterized in that the uninspected pattern is inspected by adding inspection result information of the inspected pattern of the memory stored in the memory to the inspection information and comparing it with microscopic inspection information of the uninspected pattern. .