JPS6242519B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an automatic accompaniment device for an electronic musical instrument, and more particularly to an automatic accompaniment device for performing a sequential sound performance such as an arpeggio performance.

Generally, an arpeggio playing device is capable of selectively realizing several sequential sounding modes, such as an up mode or a turn mode. Previously, in order to select the desired sequential sound mode, it was necessary to operate a selection switch provided on the panel of the electronic musical instrument, making it difficult to change the sequential sound mode while playing the keyboard. . Therefore,
The automatic arpeggio performance tended to become monotonous.

Japanese Unexamined Patent Publication No. 57895/1989 discloses that in one-finger mode, the number of one-finger accompaniment keys pressed is detected, and the arpeggio sound pattern is switched in accordance with the number of pressed keys. However, there was no relationship between the keys pressed for the arpeggio pattern and the arpeggio sounds that were generated, and only the sounds that were automatically formed in the one-finger mode were arpeggio-pronounced. Therefore, there is a problem that there are restrictions on the sounds that can be produced.

An example of a system in which there is a relationship between sounds that are automatically generated in sequence and keys that are pressed is disclosed in Japanese Patent Application Laid-open No. 103721/1983. However, the one disclosed here is for obtaining a portamento effect, and the effect is completely different from that of an arpegillo. Also, if the key is changed from a low note to a high note, the pronunciation mode will always change sequentially from low to high note.
It is not possible to freely select a pronunciation pattern like the pronunciation change pattern from high to low. A similar method is disclosed in Japanese Patent Application Laid-Open No. 55-35376. Here we are trying to achieve a glissando effect. Similar to the portamento effect, this effect simply means that if the key is pressed from a low note to a high note, the pitch will change from low to high.

Therefore, the above-mentioned prior art does not solve the problem of making it possible to freely change the arpeggio performance pattern during keyboard performance when automatically arpeggio-playing notes that are pressed freely. , nothing was effectively suggested.

In view of this point, it is an object of the present invention to provide an automatic accompaniment device for an electronic musical instrument that can easily sequentially switch and control the sound generation mode even during keyboard performance. The purpose of this is to determine the order in which the keys are pressed for an accompaniment performance such as an arpegillo (time lag order in which the keys are pressed), and to play the notes corresponding to each pressed key in a manner that corresponds to this order. This is achieved by pronouncing them sequentially. As an example, when multiple keys to be played with an arpeggio are pressed in order from the low note side with some time shifts, the sounds corresponding to these pressed keys are sounded sequentially from the low note side to the treble side. ``Up mode'' is automatically selected. In addition, if multiple keys to be played with an arpeggio are pressed in order from the treble side with some time shifts, the notes corresponding to these pressed keys are repeatedly sounded from the treble side to the bass side. mode” will be selected automatically.
In addition, if multiple keys to be played with an arpeggio are pressed almost simultaneously, the notes corresponding to these pressed keys should be sounded in sequence from the bass side to the treble side, and then sequentially from the treble side to the bass side. ``Turn mode'' is automatically selected.
In the preferred embodiment, the order of presses is not determined for all keys pressed, but for the first and second keys pressed.
The key pressing order is determined regarding the th pressed key. This is because in order to distinguish between the above three modes (up, down, turn), it is sufficient to examine the height relationship between the first and second pressed keys.

Hereinafter, one embodiment of the present invention will be described in detail with reference to the accompanying drawings.

In FIG. 1, a keyboard section 10 includes an upper keyboard, a lower keyboard, and a pedal keyboard, of which the lower keyboard is used for playing arpeggios. key coder 1
1 detects a key being pressed on the keyboard section 10, and outputs a key code KC indicating the pressed key and signals U, L, and P indicating the keyboard to which the pressed key belongs (upper, lower, or pedal keyboard). do. The channel processor 12 performs a process of assigning the key code KC given from the key coder 11 to one of a plurality of sounding channels. Tone generator section 13
is the key code assigned to each pronunciation channel.
Accepts KC* from channel processor 12,
A musical tone signal with a pitch corresponding to these key codes KC* is generated.

The arpegillo device 14 is for repeatedly producing the notes corresponding to the keys pressed on the lower keyboard in a desired manner in order to play the arpeggio.
As a result, automatic arpeggio performance is executed. The key pressing order determining circuit 15 determines the pressing order of the keys pressed on the lower keyboard for an arpeggio performance, and automatically controls the mode of sequential sound generation in the arpegillo device 14 based on this determination. As an example,
"Up mode" (UP), which repeatedly sounds the notes corresponding to multiple keys to be played in an arpeggio from the bass side to the treble side, or the notes corresponding to the multiple keys from the treble side to the bass side. "Down mode" that repeats sequential pronunciation
(DOWN), or "Turn mode" (TURN), in which the notes corresponding to the multiple keys are sounded sequentially from the bass to the treble, and then sequentially from the treble to the bass. One of these is instructed to the arpeggio device 14 according to the determined key pressing order. The arpeggio device 14 sequentially executes tone generation control in a manner corresponding to the mode instructed by the key press order determining circuit 15.

A specific method of playing the keyboard to select the up mode (UP) is to press down on the lower keyboard the desired keys to be played in the arpeggio, starting from the low note side and shifting them slightly in time. In this case, when the key corresponding to the highest note is pressed down, all of the desired keys are pressed at the same time. A specific method of playing the keyboard to select the down mode (DOWN) is to press down the desired keys on the lower keyboard in order from the treble side with some time shifts. In this case, when the key corresponding to the lowest note is pressed down, all desired keys are pressed at the same time. That is, in the case of up mode or down mode, the timing at which desired keys are pressed is shifted sequentially from the bass end or from the treble end. A specific method of playing the keyboard to select the turn mode (TURN) is to press down multiple desired keys on the lower keyboard almost simultaneously. Note that even if the keys are pressed at the same time, when viewed microscopically, there is usually a slight time lag in the timing at which each key starts being pressed. In order to absorb such a slight time difference, an appropriate waiting time setting means is provided in the key press order determining circuit 15, so that keys pressed within the set waiting time are considered to have been pressed at the same time. I have to.

Next, detailed examples of each part in FIG. 1 will be explained.

As the key coder 11, for example,
It can be constructed in accordance with the technical idea disclosed in Publication No. 23324. In that case, key switches corresponding to each key of the keyboard section 10 are arranged at the intersections of matrix wiring from a plurality of note wirings NL corresponding to each note name and a plurality of block wirings BL corresponding to an octave of each keyboard. A pressed key is detected by transmitting and receiving signals between the note wiring NL and the block wiring BL through each key switch. The key coder 11 performs pressed key detection processing according to the procedure shown in FIG. In Figure 2,
One cycle of pressed key detection processing consists of four states (states S0, S1, S2, and S3).

State S0 is a standby state, and at this time all memory contents in the key coder 11 are cleared. Transition is made from state S0 to S1 in accordance with a predetermined key scan clock pulse _φA .

In state S1, a signal "1" is applied from the key coder 11 to each key switch via the note wiring NL. As a result, a signal "1" appears on the block wiring BL to which the on-key switch belongs via the on-key switch. The key coder 11 stores the block wiring BL on which the signal "1" appears. Through the processing in state S1, all octave ranges in which pressed keys exist are detected. Any one of block wiring BL
If “1” appears at any time, “AB=
“1”? ” (AB means any block) is YES, and the state moves to state S2 in accordance with the timing of generation of clock pulse _φA . “AB＝
“1”? If " is NO, it means that there is no pressed key, and the arpeggio processing signal ARP is formed according to the generation timing of the clock pulse φ _A , and then the process returns to state S0.

In state S2, one of the block wires BL stored in state S1 is selected, and a signal "1" is applied to each key switch belonging to it via that one block wire BL. As a result, "1" is output from the note wiring NL (one or more) corresponding to the on key switch via the one or more keyswitches that are on among the keyswitches belonging to that single block wiring BL. be done. “1” in key coder 11
Memorizes the note wiring NL where appears. In state S2, an octave code OC is encoded corresponding to the single selected block wiring BL, and it is determined whether the block wiring BL belongs to the upper keyboard, lower keyboard, or pedal keyboard. A keyboard signal U or L or P is formed accordingly.

Thus, in state S2, the note name of the on key switch among the key switches belonging to the selected single block wiring is detected. If “1” appears in any one of the note wiring NL, the judgment “AN=“1”?” (AN means any note) is YES, and according to the generation timing of clock pulse φ _A. Move to state S3. If “AN=“1”?” is NO, “AB=
“1”? Return to ``.

In state S3, one of the note wirings NL (one or more) stored in state S2 is selected and a note code NC indicating the note name thereof is encoded. And this note code NC is
The key code KC is output from the key coder 11 together with the octave code OC encoded in the previous state S2. At the same time, state S2
The keyboard signal U, L, or P formed at this time is output from the key coder 11.

One set of key codes KC and keyboard signals U, L, or P are generated during one period of clock pulse φ _A , and the process returns to the determination of ``AN="1"?'' at the timing of generation of the next clock pulse φ _A. If YES, the process in state S3 is performed again, and this time a different note wiring NL from the previous one is selected. This state S3
By repeating this, the note wiring NL (one or more) stored in state S2 is sequentially selected, and a key code consisting of a combination of a note code NC indicating the note name and an octave code OC (i.e., a key code indicating the key to be pressed) is selected. ) KC and the corresponding keyboard signals U, L or P are sequentially output.

Note wiring NL stored in state S2
are all selected by repeating the above state S3, “AN=“1”?” becomes NO, and “AB
= “1”? Return to ``. If a block wiring different from the block wiring BL selected in the previous state S2 was stored in the previous state S1, "AB="1"?" is still YES, and the process moves to state S2. In this state S2, a block wiring BL different from the one selected earlier is selected. After that, the state continues until “AN="1"? becomes NO.
Step S3 is repeated to sequentially output the key code KC of the pressed key belonging to the currently selected block wiring BL and its keyboard signal U, L or P. In this way, “AB
= “1”? '' is NO, repeat the processing in states S2 and S3. The key codes KC of all pressed keys in the keyboard section 10 (and their keyboard signals U, L,
After outputting P) in sequence, “AB=
“1”? ” becomes NO, and the arpeggio processing signal
After outputting ARP, return to state S0.

For example, if the C4 key is pressed on the upper keyboard, the G3, C4, and E4 keys are pressed on the lower keyboard, and the G2 key is pressed on the pedal keyboard, the state
S0 to S3 change as shown in FIG. 3, and accordingly, the key code KC, keyboard signals U, L, P, and arpeggio processing signal ARP are output as shown in the same figure. It is assumed that the upper keyboard, lower keyboard, and pedal keyboard are scanned in the order of high notes, and that E4 and C4 are in the same block, and G3 is in a different block. The period from state S0 to immediately before the next state S0 is one cycle of pressed key detection processing, and the cycle time varies depending on the number of pressed keys.

In FIG. 1, the tone generator section 13 is
It has 16 musical sound generation channels. These include 7 channels dedicated to upper keyboard sounds, 7 channels dedicated to lower keyboard sounds, 1 channel dedicated to pedal keyboard sounds, and 1 channel dedicated to automatic arpeggio sounds. Channel processor 12
is the key code given from the key coder 11
KC is assigned to any one of the upper keyboard sound dedicated channel group, the lower keyboard sound dedicated channel group, or the pedal keyboard sound dedicated channel according to the contents of the keyboard signals U, L, and P given together with the key code KC. Furthermore, when the arpeggio processing signal ARP is being output from the key coder 11, the key code AKC indicating the arpeggio sound output from the arpeggio device 14 is assigned to the automatic arpeggio sound dedicated channel.

In this example, the arpeggio device 14 is a known device as disclosed in Japanese Patent Laid-Open No. 54-39621. That is, the arpeggio device 14 includes a pattern generator 16 that generates arpeggio pattern data AP1 to AP4 consisting of 4-bit data indicating the manner in which automatic arpeggio sounds are sequentially produced, and a pattern generator 16 that generates arpeggio pattern data AP1 to AP4.
The keyboard includes an automatic arpeggio circuit 17 that sequentially generates tones corresponding to the keys pressed on the lower keyboard in accordance with AP4. The automatic arpeggio circuit 17 receives the key codes KC* already assigned to each channel output from the channel processor 12, and selects the key code KC* assigned to the channel dedicated to the lower keyboard sound. For this purpose, the key code KC* assigned to the channel dedicated to the lower keyboard sound.
is output from the channel processor 12, and if the key corresponding to the key code KC* is being pressed, a lower keyboard key-on signal LKO (“1”) is given from the channel processor 12 to the automatic arpeggio circuit 17. It will be done. Then, the automatic arpeggio circuit 17 selects only the key code KC* given in synchronization with the lower keyboard key-on signal LKO as the key code of the pressed key of the lower keyboard. Furthermore, the automatic arpeggio circuit 17 selects one key code of the order specified by the arpeggio pattern data AP1 to AP4 from among the key codes KC* of the pressed keys of the lower keyboard selected as described above, The pattern data for that note code part (NC)
An octave chord (OC) determined based on AP1 to AP4 is added to create one arpeggio key chord.
Create AKC. Arpeggio pattern data
AP1 to AP4 are 4-bit binary data indicating the order of notes to be produced as an arpeggio sound, and are generated at the timing when an arpeggio sound is to be produced. For example, among the keys pressed on the lower keyboard (multiple keys to play an arpeggio), the lowest note is played at the first beat, the second lowest note is played at the third beat, and the third lowest note is played at the 4th beat. If you want to sound at the beat timing, use the arpeggio pattern data.
“0001” at the first beat timing as AP1 to AP4
(decimal 1) is generated, “0010” (decimal 2) is generated at the third beat, and “0011” (decimal 3) is generated at the fourth beat. By arbitrarily setting the generation timing and value of the arpeggio pattern data AP1 to AP4, an arbitrary arpeggio pattern (sequential sounding mode) can be constructed. The pattern generator 16 can selectively generate a plurality of arpeggio patterns, one of which is selected as described below, and pattern data AP1 to AP4 constituting that pattern are output at a predetermined timing. . The arpeggio sound key code AKC created in automatic arpeggio circuit 17 is key coder 1.
It is output from the circuit 17 when the arpeggio processing signal ARP from 1 to 1 is applied. Then, in the channel processor 12, this arpeggio sound key code AKC is assigned to a channel dedicated to automatic arpeggio sounds. Tone generator section 13
Now, a musical tone signal with a pitch corresponding to the key code KC* (AKC) assigned to the automatic arpeggio sound channel is generated with an appropriate tone set for arpeggio performance.

The key pressing order determining circuit 15 determines the pressing order of the keys pressed for an arpeggio performance.
Key code KC, lower keyboard signal L and state S0
A signal ST0 indicating this is received from the key coder 11.
In the key press order determination circuit 15 whose details are shown in FIG. 4, the key code given from the key coder 11 is
KC is input to the gate 18, and the lower keyboard signal L is applied to the control input (EN) of the gate 18. At this gate 18, the key code KC when the lower keyboard signal L is "1", that is, the key code LKKC of the pressed key of the lower keyboard, is selected. Based on the key code LKKC of the pressed keys on the lower keyboard, the order detection circuit 19 detects the order of the pressed keys on the lower keyboard. The direction determining circuit 20 determines the key pressing direction based on the order detected by the order detecting circuit 19, and sequentially selects up mode (UP) or down mode (DOWN) as the sound generation mode corresponding to the key pressing direction.
Or instruct turn mode (TURN).

The key pressing order here refers to the order in which the keys are first pressed. Therefore, in order to detect the state before the start of pressing a key, that is, the state in which no keys are pressed on the lower keyboard, the lower keyboard all key-off detection circuit 21
is provided. A signal ST0 indicating state S0 in the key coder 11 (FIG. 1) is input to the differentiation circuit 22 of the lower keyboard all key-off detection circuit 21. The differentiating circuit 22 uses a system clock pulse φ that is faster than the key scanning clock pulse φ _A.
The rising edge of the signal ST0 is differentiated according to this, and a short pulse ST0' having the same time width as one period of the pulse φ (this is called one bit time) is outputted from the circuit 22 in response to the rising edge of the signal ST0. The output (ST0') of the differentiating circuit 22 is delayed by one bit time in the delay flip-flop 23 and then applied to the reset input (R) of the flip-flop 24. The set input (S) of the flip-flop 24 receives the lower keyboard any key on signal from the OR circuit 25.
LKAKO is entered. The output (LKKC) of the gate 18 is input to the OR circuit 25. The gate 1
Key code where 8 indicates a key to be pressed on the lower keyboard
When LKKC is selected, the output (LKAKO) of the OR circuit 25 becomes "1". That is, when any pressed key on the lower keyboard is detected, the lower keyboard any key-on signal LKAKO becomes "1". this signal
LKAKO is also applied to the set input (S) of flip-flop 26. The output of the AND circuit 27 is applied to the reset input (R) of the flip-flop 26. The output (ST0') of the differentiating circuit 22 and the inverted output of the flip-flop 24 are applied to the AND circuit 27.

If any key is pressed on the lower keyboard,
During one cycle of pressed key detection processing in the key coder 11 (FIG. 1) (from state S0 to the next state S0), the lower keyboard any key-on signal LKAKO becomes "1" at least once, and as a result, the flip-flop 24 and 26 is set. Therefore, when a pulse ST0' with a 1-bit time width is output at the rise of the signal ST0 indicating the state S0, the inverted output of the flip-flop 24 is "0", and the condition of the AND circuit 27 is not satisfied. After one bit time, the flip-flop 24 is reset by the output of the delay flip-flop 23, and its inverted output becomes "1", but at that time, the output pulse of the differentiating circuit 22
Since ST0' disappears, the condition of the AND circuit 27 does not hold. Therefore, flip-flop 26 is always kept in the set state without being reset. The inverted output of the flip-flop 26 is used as the lower keyboard all key-off signal LKOFF. In the set state, the inverted output is "0" and therefore the signal LKOFF is "0". This indicates that some key is being pressed on the lower keyboard.

If no key is pressed on the lower keyboard, the lower keyboard any-key-on signal LKAKO is not generated even once during one cycle of pressed key detection processing in the key coder 11 (FIG. 1). At the timing of the pulse STO' immediately after all the keys on the lower keyboard are released, the flip-flop 24 is still in the set state, and the condition of the AND circuit 27 does not hold. After one bit time, flip-flop 24 is reset. Since the lower keyboard any key-on signal LKAKO is not generated even once during one cycle of the pressed key detection process, the flip-flop 24 remains in the reset state until the next state S0 is reached. This time, since the flip-flop 24 is in the reset state at the timing of the pulse ST0', the condition of the AND circuit 27 is satisfied,
The flip-flop 26 is reset by the output "1" of the AND circuit 27. As a result, the lower keyboard all key-off signal LKOFF rises to "1". This indicates that no key is pressed on the lower keyboard.

The lower keyboard all key-off signal LKOFF is the reset input R of the latch circuits 28 and 29 in the order detection circuit 19, and the reset input R of the key press number counter 30, wait time setting counter 31, and latch circuit 32 in the direction determination circuit 20. are added to each. The latch circuits 28 and 29 are circuits for sequentially storing the key codes LKKC of the pressed keys of the lower keyboard applied via the gate 18 in accordance with the key pressing order. The pressed key number counter 30 is for counting the number of pressed keys on the lower keyboard in order from the keys pressed first. The waiting time setting counter 31 is
This is to measure the short time (wait time) that is considered to be simultaneous key presses. The latch circuit 32 is a circuit for latching an up mode signal UP, a down mode signal DOWN, or a turn mode signal TURN obtained as a result of determining the key depression order.

A signal when no key is pressed on the lower keyboard.
By LKOFF, the above latch circuits 28, 29, 3
2. All counters 30 and 31 have been reset. When the first key is pressed on the lower keyboard, the key code KC corresponding to that pressed key is key coder 1.
1 (Figure 1) and its key code
KC is selectively outputted at the gate 18 as the lower keyboard pressed key code LKKC. As a result, the lower keyboard any key-on signal LKAKO output from the OR circuit 25 becomes "1", and the flip-flop 2
6 is set and the lower keyboard all key off signal is set.
LKOFF falls to “0”. Therefore, when the key depression state of the lower keyboard changes from a state where no key is pressed to a state where some key is pressed, that is, when the first key is pressed, each latch circuit 28, 29, 32 and the counters 30 and 31 are released from reset and become operational.

The key code LKKC of the pressed key of the lower keyboard outputted from the gate 18 is inputted to the latch circuit 28 and also inputted to one input A of the comparators 33 and 34. The outputs of latch circuits 28 and 29 are applied to other inputs B of comparators 33 and 34, respectively. Comparators 33 and 34 output "1" as outputs 1 and 2 when the data of the two inputs A and B do not match, and output "0" when they match. When the first key code LKKC appears, the outputs of both latch circuits 28 and 29 are 0 due to the reset just before, and the outputs 1 and 2 of both comparators 33 and 34 are 0.
Both 2 become "1". These outputs 1 and 2 are input to an AND circuit 35. The lower keyboard any key-on signal LKAKO is input from the OR circuit 25 to the other input of the AND circuit 35. Therefore, when the first key code LKKC is output from the gate 18, the condition of the AND circuit 35 is satisfied, and the AND circuit 35 outputs "1". The differentiating circuit 36 becomes 1 when the output of the AND circuit 35 rises to "1".
Outputs pulse LS1 with bit time width. This pulse LS1 is applied to the load control inputs LD of the latch circuits 28 and 29, and is also applied to the count input T of the key press number counter 30 via the AND circuit 37. The latch circuit 29 receives the output data of the latch circuit 28 at the rising timing of the pulse LS1, and the latch circuit 28 receives the output key code LKKC of the gate 18 at the falling timing of the pulse LS1.
shall be incorporated.

The pressed key counter 30 is a 2-bit binary counter, and the inverted output 1 of the 1st bit and the output Q2 of the 2nd bit are input to the AND circuit 38. The AND circuit 38 is “1” when the count values Q2 and Q1 of the counter 30 are “10” (2 in decimal).
is output, and “0” is output otherwise.
The output of the AND circuit 38 is inverted by an inverter 39 and applied to the other input of the AND circuit 37. When the pulse LS1 corresponding to the first key code LKKC is output from the differentiating circuit 36, the count value of the counter 30 is 0, the output of the AND circuit 38 is "0", and the output of the inverter 39 is "1". This enables the AND circuit 37 to operate.
In response to the pulse LS1, the counter 30 is incremented by one.

As shown in Figure 5a, keys C2, E2,
Assume that three keys are pressed in the order of G2 and shifted at different times. An example of the operation of the circuit of FIG. 4 in this case is shown in FIG. 5b. First key code LKKC
The operation of the circuit of FIG. 4 is as described above when . At time t1 in FIG. 5b,
If the key code indicating key C2 is output from the gate 18 for the first time as the lower keyboard pressed key key code LKKC, then the lower keyboard all keys off signal is generated as described above.
LKOFF immediately falls to “0”. Then, as described above, "1" is outputted from the AND circuit 35 in response to the rising edge of the key code LKKC of the key C2, and in response thereto, the pulse LS1 is outputted from the differentiating circuit 36. In response to the rise of pulse LS1, the output of latch circuit 28 (0 in this case) is taken into latch circuit 29. Immediately after that, in response to the falling edge of pulse LS1, the key code of the lower keyboard pressed key C2 is
LKKC is taken into the latch circuit 28. Further, the key press number counter 30 is incremented by 1 by the pulse LS1, and the content of the count becomes "1" in decimal notation. Hereinafter, the explanation of the circuit shown in FIG. 4 will be continued assuming that the key is pressed as shown in FIG. 5a.

If the key press is sustained, key coder 1
1 (FIG. 1), the key code KC of the pressed key is repeatedly output for each pressed key detection processing cycle. Therefore, the key code of the above-mentioned first pressed key C2
KC is also repeatedly output from the key coder 11, and the key code of key C2 appears repeatedly as the lower keyboard pressed key key code LKKC. However, the order detection circuit 19 and direction determination circuit 20 in FIG.
It responds as described above only when the key code LKKC of No. 2 appears for the first time (at time t1 in FIG. 5b), but does not respond from the second time onwards. This is because, as shown at time t2 in FIG. 5B, when the key code LKKC of the pressed key C2 appears for the second time or later, the key code of the pressed key C2 has already been latched in the latch circuit 28. Therefore, comparator 33
Both inputs A and B match, and the mismatch output 1 becomes "0", so the condition of the AND circuit 35 is not satisfied. Therefore, the states of latch circuits 28 and 29 and counter 30 do not change.

Key code LKKC of the second pressed key E2
When first appears at time t3 in FIG. 5B, the latch circuit 28 outputs the key code of the first pressed key C2, and the latch circuit 29 outputs 0. Therefore, the outputs EQ1 and EQ2 of the comparators 33 and 34 are both "1", and the condition of the AND circuit 35 is satisfied. AND circuit 35
A pulse is generated from the differentiating circuit 36 based on the output “1” of
LS1 is output. Based on this pulse LS1, the latch circuit 29 receives the key code of the first pressed key C2 outputted from the latch circuit 28, and the latch circuit 28 receives the key code of the second pressed key E2 outputted from the gate 18. The key code will be imported. Further, the key press number counter 30 is further counted up by one, and the count value becomes "2" in decimal notation.

In the direction determining circuit 20, the comparator 40 is used to determine whether the keys are pressed in order from low tones to high tones or from high to low tones. The output of the latch circuit 28 is added to the A input of this comparator 40, and the B
The output of the latch circuit 29 is applied to the input. The comparator 40 compares the magnitude of the data (key code) applied to the A input and the B input, and outputs "1" to the AND circuit 41 when A>B, and outputs "1" to the AND circuit 42 when A<B. outputs “1”. The key code of the first pressed key (C2 in the example of FIG. 5) is latched in the latch circuit 29, and the key code of the second pressed key (E2 in the example of FIG. 5) is latched in the latch circuit 28. At this time, the comparator 40 satisfies either A>B or A<B depending on the magnitude of both key codes (that is, the pitches of both pressed keys). In this embodiment, in the key coder 11 shown in FIG.
It is assumed that the KC is encoded into a larger value. Therefore, when the second pressed key is higher than the first pressed key, "A>B" is established in the comparator 40, and when it is lower than the first pressed key, "A<B" is established.

The output of the NAND circuit 44 inverted by an inverter 43 is applied to other inputs of the AND circuits 41 and 42. All n-bit outputs Q1 to Qn of the wait time setting counter 31 are input to the NAND circuit 44. A clock pulse φ is input to the count input T of the counter 31 via an AND circuit 45. When the first key is pressed, the lower keyboard all-key-off signal LKOFF falls to "0" as described above, thereby canceling the reset of the counter 31, and from that point on, the clock pulse φ
Start counting. All bits of counter 31
When Q1 to Qn become "1", the output of the NAND circuit 44 becomes "0", the AND circuit 45 becomes inoperable, and the counter 31 stops counting. Therefore, the NAND circuit operates from the time when the first key is pressed until just before all bits Q1 to Qn of the counter 31 become "1" (a time corresponding to the product of the period of the clock pulse φ and 2 ⁿ -1). The output of 44 is "1" and thereafter becomes "0". From the moment the first key is pressed, the output of the NAND circuit 44 is “0”
The time just before falling is called the "waiting time".
If the second key is pressed during this waiting time, it is assumed that the first and second keys are pressed at the same time. Therefore, this waiting time is a time that is perceived as almost simultaneous by humans (for example, several times).
10ms).

The outputs of AND circuits 41 and 42 and the output of NAND circuit 44 are input to latch circuit 32. When the count value of the key press number counter 30 reaches "2" in decimal notation, the condition of the AND circuit 38 is satisfied, and "1" is added from the AND circuit 38 to the differentiation circuit 46. The differentiating circuit 46 operates when the output of the AND circuit 38 rises to "1", that is, when the key press number counter 3
At the moment the count value of 0 changes to decimal number "2", a pulse with a width of 1 bit time is output. This pulse is delayed by several bit times in the delay circuit 47 and then supplied to the load control input LD of the latch circuit 32. Therefore, the key code of the second pressed key
Several bit times after LKKC is first output from gate 18, load pulse LS2 is applied from delay circuit 47 to latch circuit 32. In the example of FIG. 5b, at time t3, the key press number counter 30
It is shown that the load pulse LS2 is generated several bit times after the count value rises to "2". The reason for delaying the generation timing of the load pulse LS2 by several bit times by the delay circuit 47 is to wait for the data rewriting operation in the latch circuits 28 and 29 to be surely completed, and This is to latch the accurate comparison result of the keys in the latch circuit 32.

The latch circuit 32 has a 3-bit latch position, and the data latched at the output of the AND circuit 41 is used as the up mode signal UP, and
The data latched from the output of 2 is the down mode signal.
DOWN and data obtained by latching the output of the NAND circuit 44 are respectively sent to the arpeggio device 14 as a turn mode signal TURN.

In the example of FIG. 5b, the waiting time counting by the waiting time setting counter 31 ends before the third press key E2 is pressed, and the output of the NAND circuit 44 becomes "0" at time t3. (Figure 5b
(See Nando 44 column). When the load pulse LS2 is applied to the latch circuit 32, the latch circuit 28
The key code of the second pressed key E2 is latched, and the latch circuit 29 has the key code of the first pressed key C
Since the key code No. 2 is latched, A>B holds true in the comparator 40. Therefore, at the timing of the load pulse LS2, the output signal "1" of the AND circuit 41, the output signal "0" of the AND circuit 42, and the output signal "0" of the NAND circuit 44 are output to the latch circuit 32.
are incorporated into each. As a result, the rat circuit 32
The up mode signal UP output from the UP becomes "1", the down mode signal DOWN becomes "0", and the turn mode signal TURN becomes "0", and the arpeggio device 14
UP mode is instructed to the pattern generator 16 inside. When the count value of the key press number counter 30 reaches "2" in decimal notation, the AND circuit 3
Since the output of the inverter 8 becomes "1" and the output of the inverter 39 becomes "0", the AND circuit 37 becomes inoperable, and the counter 30 sets the count value to "2".
Stop the counting operation while holding the position. Therefore, no matter how the pulse LS1 is generated from the differentiating circuit 36 or the latch circuit 28,
No matter how the contents of the latches and 29 change, the load pulse LS2 is not generated and the contents UP, DOWN and TURN of the latch circuit 32 do not change. In this way, once one sequential sounding mode (UP, DOWN, TURN) is determined based on the first and second pressed keys, it will continue until all keys are released (by the lower keyboard all key off signal LKOFF). This state is maintained until the latch circuit 32 or the like is reset.

As shown in Figure 6a, the key G is
When keys 2, E2, and C2 are pressed, the key codes latched by the latch circuits 28 and 29 change as shown in FIG. 6b. When the load pulse LS2 is applied to the latch circuit 32 based on the second pressed key E2, the key code of the second pressed key E2 is latched in the latch circuit 28, and the key code of the second pressed key E2 is latched in the latch circuit 29. The key code for key G2 is latched. Therefore, in the comparator 40, A<B
holds true. At this time, assuming that the waiting time has already ended, the output A>B of the AND circuit 41 is "0", the output A<B of the AND circuit 42 is "1", and the output of the NAND circuit 44 is "0". , these are latched by the latch circuit 32. Therefore, the output of the latch circuit 32 is when the up mode signal UP is "0",
The down mode signal DOWN becomes “1” and the turn mode signal TURN becomes “0”, and the down mode is activated.
Instruct DOWN.

If the first pressed key and the second pressed key are pressed at almost the same time, when the load pulse LS2 is applied to the latch circuit 32 in response to the second pressed key, the waiting time setting counter 31 is still waiting. The time measurement has not yet been completed, and the NAND circuit 44 is outputting "1". Therefore, inverter 43
The output of the comparator 40 is “0”, and the output A>B of the comparator 40
And A<B is blocked by AND circuits 41 and 42. As a result, the output signal "0" of the AND circuit 41, the output signal "0" of the AND circuit 42, and the output signal "1" of the NAND circuit 44 are respectively latched in the latch circuit 32, and the up mode signal UP is "0",
The down mode signal DOWN becomes “0”, the turn mode signal TURN becomes “1”, and the turn mode TURN is activated.
Instruct.

As an example, the pattern generator 16 may
As shown in the figure, it includes an arpeggio pattern memory 48. A plurality of arpeggio patterns are stored in advance in the arpeggio pattern memory 48. The rhythm selection switch 49 is used to select the rhythm type of the song to be played, and in conjunction with the rhythm selection by this switch 49, a predetermined arpeggio pattern corresponding to the rhythm is selected in the arpeggio pattern memory 48. be done.
The arpeggio pattern selected by the rhythm selection switch 49 consists of three patterns corresponding to three types of variation modes: up mode UP, down mode DOWN, and turn mode TURN. One of the patterns is further selected according to the signals UP, DOWN, and TURN. A tempo counter 50 counts tempo clock pulses given from a variable tempo clock oscillator 51,
Arpeggio pattern data AP1~ from arpeggio pattern memory 48 according to the count contents.
Read AP4. That is, a set of arpeggio pattern data AP1 to AP4 constituting one arpeggio pattern selected by the rhythm selection switch 49 and the mode signals UP, DOWN, and TURN is stored in the memory 4 based on the output of the tempo counter 50.
8. One arpeggio pattern contains arpeggio pattern data corresponding to each sound timing in one phrase of an arpeggio performance.
AP1 to AP4 are provided respectively, and when a certain sound generation timing is specified by the tempo counter 50, one data AP1 to AP4 corresponding to that timing is provided.
AP4 is read from memory 48.

An example of an arpeggio pattern (data AP1 to AP4) that realizes a relatively simple arpeggio performance is shown in section 7.
As shown in the figure. FIG. 7 shows an example in which one repeated phrase of an arpeggio performance corresponds to one measure of a three-quarter time (or six-eighth time) rhythm. It is assumed that each sound generation timing Ta1 to Ta6 corresponds to the length of an eighth note. Figure 7b UP,
The numbers 1 to 6 shown in the DOWN and TURN columns are
A set of data AP1 to AP4 constituting the patterns of up mode UP, down mode DOWN, and turn mode TURN are each expressed in decimal numbers. For example, in the case of up mode UP, data AP1 to AP4 corresponding to decimal number "1" are generated at the first sound generation timing Ta1, and at subsequent sound generation timings Ta2, Ta3...Ta6, decimal number "2",
FIG. 7 shows that data AP1 to AP4 corresponding to "3" to "6" are sequentially generated. According to this, down mode DOWN and turn mode
The manner in which data AP1 to AP4 are generated in TURN can also be easily understood from FIG.

In the automatic arpeggio circuit 17 (Fig. 1), when the data AP1 to AP4 reach some value other than 0 (that is, when the arpeggio generation timing arrives), the number of note names (1 to 1) corresponding to the pressed key on the lower keyboard is determined. (plurality) are counted in order from the lowest note, and when the number reaches the same value as data AP1 to AP4, the note name of the pressed key of the lower keyboard is selected as the note name of the arpeggio note to be sounded this time. If the number of note names corresponding to the pressed keys on the lower keyboard is less than the values of data AP1 to AP4, after counting the number of note names of the pressed keys once, return to the note name of the lowest note and continue counting. , repeat counting until the counted value matches the value of data AP1 to AP4. As a general rule, the octave range of the arpeggio note to be produced is the lowest octave of the specified arpeggio (for example, C2 to B2), and the number of notes of the pressed key is 1.
It is assumed that the number increases by one octave each time the count is completed. A key code consisting of an octave code indicating the octave range thus determined and a note code indicating the note name selected as described above is outputted from the automatic arpeggio circuit 17 as an arpeggio sound key code AKC.

In Figure 7c, the note names of the keys pressed on the lower keyboard are C, E,
The arpeggio sounds that are produced in accordance with the pattern b in the same figure when playing G are shown for each mode: UP, DOWN, and TURN. If the value of data AP1 to AP4 is less than or equal to the number of notes of the pressed key (3 in this case), each arpeggio note C will be played in the specified lowest octave.
2, E2, and G2 are generated. Data AP1~AP4
If the value is "4", "5" or "6", each arpeggio note C3,
E3 and G3 are generated. As is clear from Fig. 7c, in the UP mode, the sounds corresponding to the keys pressed on the lower keyboard are C2, E2, G2, C3, E3, G.
3 is pronounced sequentially from low to high. In addition, when the down mode is DOWN, the sounds corresponding to the keys pressed on the lower keyboard are G3, E3, C3, G2, E2, C.
2 are pronounced sequentially from high to low. In addition, when the turn mode is TURN, the sounds corresponding to the keys pressed on the lower keyboard are C2, E2, G2, C3, G2, E2.
is pronounced sequentially from low to high, then from high to low.

In addition, in the above, the arpeggio device 14 is
Although the present invention has been described as using an automatic arpeggio device such as that shown in Japanese Patent No. 54-39621, the present invention can be applied to electronic musical instruments that use any other type of automatic arpeggio device. That is, the present invention can be implemented by providing a circuit corresponding to the key press order determining circuit 15 in place of the sequential sound mode selection switch conventionally provided in connection with the automatic arpeggio device.

Further, in the above embodiment, the key press order determining circuit 1
5 is designed to determine the key press order based on the output of the key coder 11 as shown in Japanese Patent Application Laid-Open No. 52-23324, but the present invention is not limited to this, and any other type of key press detection circuit may be used. The present invention can also be applied to electronic musical instruments. In that case, it goes without saying that the key press order determining circuit is subject to necessary design changes depending on the format of the key press information output from the key press detecting circuit.

Furthermore, the present invention is applicable not only to the arpeggio device 14 but also to devices that automatically perform sequential sound performance such as glisando.

Also, in the above example, when a key is pressed from the bass side to the treble side, the up mode UP, which goes from the bass side to the treble side, is selected, and when the key is pressed in the opposite direction, the down mode DOWN is selected, and almost simultaneously. If the key is pressed, turn mode TURN is selected,
The relationship between the key depression direction and the sequential sound generation mode is not limited to this, and can be arbitrarily determined. Furthermore, the types of modes that can be selected by key press operations are not limited to the above three types, and can be arbitrarily determined.

As explained above, according to the present invention, it is possible to sequentially switch the sound generation mode by appropriately changing the manner in which multiple keys to be sounded are pressed in sequence, so it is possible to control the sequential switching of the sound generation modes extremely easily even during keyboard performance. It has the advantage of being able to do

[Brief explanation of the drawing]

FIG. 1 is a block diagram schematically showing the overall configuration of an electronic musical instrument to which an embodiment of the present invention is applied, FIG. 2 is a flowchart showing an example of a pressed key detection processing procedure in the key coder of FIG. 1, and FIG. is a timing chart showing a specific example of the pressed key detection operation executed in the key coder according to the procedure shown in FIG.
FIG. 4 is a block diagram showing an embodiment of the key press order determination circuit and pattern generator of FIG. 1;
Figure a is a timing chart showing an example of the key pressing method when selecting the up mode, and Figure 5b is a timing chart of the same key pressing method when selecting the up mode.
FIG. 4 is a timing chart showing an example of the operation of each circuit when a key is pressed as shown in FIG. Figure 4 is a timing chart showing an example of the operation of the main circuit when a key is pressed as shown in Figure a, Figure 7a is a diagram showing an example of the timing at which an automatic arpeggio sound is generated, and Figure b is a diagram showing the timing at which the automatic arpeggio sound is generated. A diagram showing examples of correspondingly generated arpeggio pattern data for each of up mode, down mode, and turn mode. Figure c shows that the note names of keys pressed for arpeggio performance are C, E, and G. FIG. 6 is a diagram showing an example of an arpeggio sound produced based on the pattern data of FIG. 10...Keyboard section, 11...Key coder, 12...
...Channel processor, 13...Tone generator section, 14...Arpeggio device (sequential sound generation device), 15...Key press order determination circuit, 16...Pattern generator, 17...Auto arpeggio circuit, 19... Order detection circuit, 20... Direction discrimination circuit, 21... Lower keyboard all key-off detection circuit, 3
0...Key press number counter, 31...Waiting time setting counter, 33, 34, 40...Comparator, 48...
...Arpeggio pattern memory.

Claims (1)

[Scope of Claims] 1. Includes a pattern generation means capable of generating a plurality of types of patterns indicating the order of sound production, and generates sounds corresponding to a plurality of pressed keys according to the pattern generated by the pattern generation means. an arpeggio device that repeatedly sounds in order; an order detection means that detects the order in which the pressed keys are pressed; and, based on this detection, whether the keys are pressed in the order of the lowest notes or the order of the higher notes; It is determined which of at least two types of modes correspond to the three types of modes of being pressed almost simultaneously, and one of the plurality of patterns is selected as a pattern to be generated from the pattern generation means according to the result of this discrimination. An automatic accompaniment device for an electronic musical instrument, comprising: a discriminating means for specifying one. 2. The determining means specifies an up mode pattern in which when keys are pressed in the order of low tones, the sound is repeated in the order from low to high notes, and a down mode in which the sounds are repeated in order from the high to low notes in the case the keys are pressed in the order of the high notes. The electronic musical instrument according to claim 1, wherein when pressed almost simultaneously, a turn mode pattern is specified in which the sound is repeated sequentially from the low note to the high note and then from the high note to the low note. Automatic accompaniment device. 3. The order detecting means detects which of the currently pressed keys is the first pressed key and the second pressed key, respectively, and the discriminating means detects the first and second pressed keys. A first circuit that compares the height of a pressed key and specifies an up mode or down mode pattern according to the comparison result, and a difference in pressing start time between the first and second pressed keys is within a predetermined short time. When the first
3. The automatic accompaniment device for an electronic musical instrument according to claim 2, further comprising a second circuit for prohibiting pattern designation by the circuit and designating a turn mode pattern. 4. The automatic accompaniment device for an electronic musical instrument according to claim 1, wherein the pattern generating means includes a memory in which a plurality of patterns are stored in advance.