JPS6242544A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To reduce the resistance of wiring layers, the prevent disconnections due to migration and to improve the reliability of a device by scaling up the wiring layers while the pitches of the wiring layers are kept at a predetermined value. CONSTITUTION:Wiring layers 12 are formed on a substrate 11 through patterning, and a conductive material is deposited on the whole surface in an extent that the wirings 12 are buried to shape a conductive material layer 13. The conductive material layer 13 is etched through anisotropic etching until both sides of the wiring layers 12 are isolated mutually. The conductive layer 13 is etched uniformly from the planes of the conductive layer 13 on the etching of the conductive layer 13, the thickness of the side surfaces of the wiring layers 12 is made thicker than that on the surfaces of the wiring layers 12, and conductive materials 13a and left on both sides of the wiring layers 12. The wiring layers 12 are scaled up while the prescribed pitches of the wiring layers 12 are kept, thus reducing the resistance of the wiring layers 12, then preventing disconnections due to migration.

Description

[Detailed Description of the Invention] [Summary] A7! on the side wall of a wiring layer such as aluminum (Aβ). This is a method of thickening the wiring layer by depositing a conductive material such as.

[Industrial application field]

The present invention relates to a method for manufacturing a semiconductor device. More specifically, the present invention relates to a method for manufacturing a semiconductor device, and more specifically, the pitch of the wiring layer is set as specified, while the wiring layer is made thicker to reduce resistance and become resistant to migration. Concerning the method of forming.

[Conventional technology]

To form a wiring layer on a semiconductor substrate or an insulating layer (hereinafter referred to as a base), as shown in FIG. 3, for example, AN is deposited on a base 21 by sputtering or vapor deposition, and then A resist pattern 23 is formed by patterning the resist film, and the wiring layer 2 is etched using the pattern 23 as a mask.
form 2.

[Problem that the invention seeks to solve]

In the patterning of the resist film described above, if the width of the wiring layer is 2 μm, the width @W in the left and right direction as seen in FIG. 3 is approximately 1 μm due to the resolution of the resist.
Further, the limit for the distance between the wiring layers 22 is about 1 μm. Generally, it is desired that the wiring layer be made as thick as possible in order to reduce resistance and resist migration.

Here, migration refers to a phenomenon in which electrons and Aβ atoms move in opposite directions when a current flows in one direction in the A6 wiring layer, and as the current density increases, the movement of Aβ atoms due to migration results in The AA' wiring layer may be disconnected. In semiconductor memory devices, the pitch of the wiring layer is set to a certain value at the design stage, so the wiring layer is made thicker while maintaining this pinch, thereby reducing the resistance of the wiring layer and making it resistant to migration. It is desired to obtain a wiring layer.

The present invention was created in view of these points, and an object of the present invention is to provide a method for increasing the thickness of a wiring layer when the pitch of the wiring layer is given.

Means for Solving Problem C] FIG. 1 (al to C) is an analytical view of an embodiment of the present invention.

In FIG. 1, a substrate 11 (semiconductor substrate or insulating layer)
After forming interconnection layers 12 separated from each other on top, a conductive material is deposited to form a conductive material layer 13.
Next, anisotropic etching with a predominance in the vertical direction, such as reactive ion etching (RIE), is applied to the same figure (Fig.
Etching is performed until the sides of the wiring layer 12 are separated from each other as shown in bl. Alternatively, the sides of the wiring layer 12 may be separated from each other and etched to such an extent that the conductive material remains on the surface of the wiring layer 12 as well.

[Effect]

In 111E, the material to be etched is etched uniformly from the surface, but since the thickness of the conductive material is larger in the two parts 11 of the wiring layer 12 than in other parts, only that part is etched. It remains unetched, and the wiring layer becomes thicker by the same amount as the two layers.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

Referring again to FIG. 1, a substrate 11 (which may be a semiconductor substrate or an insulating layer on top of another wiring FB)
For example, 8l is deposited on top of the wiring layer 12 by patterning it in the same manner as in the conventional example, and the conductive material is applied over the entire surface to the extent that the wiring layer 12 is buried. conductive material layer 1
Make 3. This conductive material may be the same as or different from the material of the wiring layer 12. Also,
The wiring layer may be formed of a material other than i.

Then, as shown in FIG. 1(b), I? conductive material layer 1 until the sides of wiring layer 12 are separated from each other by IH.
Etch 3. [In E, conductive material J? 8i
]3, but the conductive material is etched uniformly from the surface of 3.
The thickness of the side portion of the wiring layer 12 (indicated by the arrow ■ in FIG. 1(a)) is different from the thickness on the surface of the wiring layer 120 (indicated by the arrow I in FIG. 1(a)).
), so there is a symbol 1 on both sides of the wiring layer.
A conductive material layer labeled 3a remains.

According to the inventor's confirmation, when the wiring layer is formed to have a pitch of 2 μm and a width of 1 μm, each thick part of the wiring layer has a width of 0.3 μm, and the width of the wiring layer is only 1 μm. The original thickness has increased to 1.6 μm.

Instead of etching until the surface of the wiring layer 12 is exposed by RIE as described above, as shown in FIG. 1(C),
After the conductive material on the flat portion of the substrate 11 is removed and the thick wiring layers are separated from each other, the conductive material may be left on the wiring layer 12 and etched by RIE.

In this case, the wiring layer is thicker than the case shown in FIG. 1(b) because the conductive material is attached not only to the original both sides but also to the surface.

In another embodiment of the invention, A7! After depositing on the substrate, silicon (Si) or silicon dioxide (5iO2) is deposited on the surface of the Al. From now on, Fig. 1(a)
, (b) and (C) are carried out as shown in FIG. As shown in FIG. 1, it serves as a stopper when the surface of the wiring layer 12 is etched by RIE, and prevents the wiring layer 12 from being etched from the surface and becoming smaller.

〔Effect of the invention〕

As described above, according to the present invention, it is possible to increase the thickness of the wiring layer while maintaining the pitch of the wiring layer at a predetermined value.
Since the resistance of the wiring layer can be reduced and disconnection due to migration can be prevented, it is effective in improving the reliability of semiconductor devices.

[Brief explanation of the drawing]

Figure 1 (al or C1 is a sectional view of the embodiment of the present invention,
Figures fa) to C) are cross-sectional views of other embodiments of the present invention, and Figure 3 is a cross-sectional view of a conventional example. 1 and 2, 11 is a base, 12 is a wiring layer, 13 is a conductive material layer, and 13a is a conductive material remaining on both sides of the wiring layer. 2. This is 1 sugar.

Claims (1)

[Claims] A step of depositing a conductive material on a substrate (11) and patterning it to form a wiring layer (12) separated from each other, depositing the conductive material to such an extent that the wiring layer (12) is buried. forming a conductive material layer (13), and a wiring layer (12).
A method for manufacturing a semiconductor device, comprising the step of etching the conductive material layer (13) by anisotropic etching until both sides of the conductive material layer (13) are separated from each other.