JPS62501736A - Ｅ↑２ｐｒｏｍｓのための効率的なペ−ジモ−ド書込回路 - Google Patents

Ｅ↑２ｐｒｏｍｓのための効率的なペ−ジモ−ド書込回路

Info

Publication number
JPS62501736A
JPS62501736A JP61501096A JP50109686A JPS62501736A JP S62501736 A JPS62501736 A JP S62501736A JP 61501096 A JP61501096 A JP 61501096A JP 50109686 A JP50109686 A JP 50109686A JP S62501736 A JPS62501736 A JP S62501736A
Authority
JP
Japan
Prior art keywords
line
byte
bit line
data
bytes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61501096A
Other languages
English (en)
Japanese (ja)
Inventor
ブリナー，マイケル・エス
ビル，コリン・エス
スーチウ，ポール
ライナースン，ダレル
Original Assignee
アドバンスト・マイクロ・ディバイシズ・インコ−ポレ−テッド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by アドバンスト・マイクロ・ディバイシズ・インコ−ポレ−テッド filed Critical アドバンスト・マイクロ・ディバイシズ・インコ−ポレ−テッド
Publication of JPS62501736A publication Critical patent/JPS62501736A/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2216/00—Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
    • G11C2216/12—Reading and writing aspects of erasable programmable read-only memories
    • G11C2216/14—Circuits or methods to write a page or sector of information simultaneously into a nonvolatile memory, typically a complete row or word line in flash memory

Landscapes

  • Read Only Memory (AREA)
JP61501096A 1985-02-11 1986-01-30 Ｅ↑２ｐｒｏｍｓのための効率的なペ−ジモ−ド書込回路 Pending JPS62501736A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US70035485A 1985-02-11 1985-02-11
US700354 1985-02-11

Publications (1)

Publication Number Publication Date
JPS62501736A true JPS62501736A (ja) 1987-07-09

Family

ID=24813183

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61501096A Pending JPS62501736A (ja) 1985-02-11 1986-01-30 Ｅ↑２ｐｒｏｍｓのための効率的なペ−ジモ−ド書込回路

Country Status (3)

Country Link
EP (1) EP0211069A4 (fr)
JP (1) JPS62501736A (fr)
WO (1) WO1986004727A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02126497A (ja) * 1987-10-19 1990-05-15 Sgs Thomson Microelectron Sa メモリのメモリセルをプログラムする方法と、この方法を実施するための回路

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63271679A (ja) * 1987-04-30 1988-11-09 Toshiba Corp デ−タ書込み方式
JP2534733B2 (ja) * 1987-10-09 1996-09-18 日本電気株式会社 不揮発性半導体記憶装置
EP1501100B1 (fr) * 2003-07-22 2018-11-28 Samsung Electronics Co., Ltd. Dispositif de mémoire non volatile, système de mémoire et procédé de fonctionnement
JP4936271B2 (ja) 2006-01-20 2012-05-23 株式会社メガチップス 半導体記憶装置

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US266283A (en) * 1882-10-24 Sole-leveling machine

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52130536A (en) * 1976-04-26 1977-11-01 Toshiba Corp Semiconductor memory unit
US4110842A (en) * 1976-11-15 1978-08-29 Advanced Micro Devices, Inc. Random access memory with memory status for improved access and cycle times
US4266283A (en) * 1979-02-16 1981-05-05 Intel Corporation Electrically alterable read-mostly memory
US4380804A (en) * 1980-12-29 1983-04-19 Ncr Corporation Earom cell matrix and logic arrays with common memory gate
US4566080A (en) * 1983-07-11 1986-01-21 Signetics Corporation Byte wide EEPROM with individual write circuits

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US266283A (en) * 1882-10-24 Sole-leveling machine

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02126497A (ja) * 1987-10-19 1990-05-15 Sgs Thomson Microelectron Sa メモリのメモリセルをプログラムする方法と、この方法を実施するための回路

Also Published As

Publication number Publication date
EP0211069A1 (fr) 1987-02-25
WO1986004727A1 (fr) 1986-08-14
EP0211069A4 (fr) 1990-06-27

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