JPS6251462U - - Google Patents
Info
- Publication number
- JPS6251462U JPS6251462U JP14202385U JP14202385U JPS6251462U JP S6251462 U JPS6251462 U JP S6251462U JP 14202385 U JP14202385 U JP 14202385U JP 14202385 U JP14202385 U JP 14202385U JP S6251462 U JPS6251462 U JP S6251462U
- Authority
- JP
- Japan
- Prior art keywords
- coin
- pulse
- output
- circuit
- counter device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims 2
- 230000003111 delayed effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Control Of Vending Devices And Auxiliary Devices For Vending Devices (AREA)
Description
第１図は本考案にかかるコインカウンター装置
の一実施例を示す回路図、第２図は第１図の回路
の動作を説明するタイミングチヤート、第３図は
本考案に用いたコインセンサーの配列状態を示す
説明図、第４図は従来のコインカウンタ装置の一
例を示す回路図、第５図は不正使用に用いられる
悪戯板の平面図である。
４，５，６……フオトカプラー、１１，１３，
１５……アンド回路、１２……ワンシヨツトマル
チバイブレータ、１４……コインカウント処理回
路。
Figure 1 is a circuit diagram showing one embodiment of the coin counter device according to the present invention, Figure 2 is a timing chart explaining the operation of the circuit in Figure 1, and Figure 3 is the arrangement of coin sensors used in the present invention. FIG. 4 is a circuit diagram showing an example of a conventional coin counter device, and FIG. 5 is a plan view of a prank board used for fraudulent use. 4,5,6...photocoupler, 11,13,
15...AND circuit, 12...One-shot multivibrator, 14...Coin count processing circuit.
Claims (1)
の移動方向に沿つて所定の間隔で複数のコインセ
ンサーを配列し、これらのコインセンサーからの
検知出力をアンド回路に入力し、このアンド回路
の出力パルスに基いて正規のコインが投入された
ことを判定してカウント動作するコインカウンタ
装置において、 前記アンド回路の出力パルスより時間的に遅れ
たパルスを発生する第１の手段と、 この第１の手段からのパルスと、正規に投入さ
れたコインを最初に検知するコインセンサーから
の出力とが供給され、コイン逆流時に不正検出パ
ルスを出力してこの出力でコインカウントクリア
ーを行う第２の手段とを具備して成るコインカウ
ンタ装置。[Scope of claim for utility model registration] A plurality of coin sensors are arranged at predetermined intervals along the movement direction of a coin inserted from a coin slot, and the detection outputs from these coin sensors are sent to an AND circuit. In a coin counter device that performs a counting operation based on the output pulse of the AND circuit and determines that a legitimate coin has been inserted based on the output pulse of the AND circuit, the first coin counter device generates a pulse that is delayed in time from the output pulse of the AND circuit. A pulse from the first means and an output from a coin sensor that first detects a coin that has been legally inserted are supplied, and when coins flow backward, a fraud detection pulse is output and this output is used to count coins. A coin counter device comprising a second means for clearing.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14202385U JPS6251462U (en) | 1985-09-19 | 1985-09-19 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14202385U JPS6251462U (en) | 1985-09-19 | 1985-09-19 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6251462U true JPS6251462U (en) | 1987-03-31 |
Family
ID=31050356
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14202385U Pending JPS6251462U (en) | 1985-09-19 | 1985-09-19 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6251462U (en) |
-
1985
- 1985-09-19 JP JP14202385U patent/JPS6251462U/ja active Pending
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