JPS6251497B2 - - Google Patents

Info

Publication number
JPS6251497B2
JPS6251497B2 JP56207580A JP20758081A JPS6251497B2 JP S6251497 B2 JPS6251497 B2 JP S6251497B2 JP 56207580 A JP56207580 A JP 56207580A JP 20758081 A JP20758081 A JP 20758081A JP S6251497 B2 JPS6251497 B2 JP S6251497B2
Authority
JP
Japan
Prior art keywords
layer
copper
silver
gold
metal part
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56207580A
Other languages
Japanese (ja)
Other versions
JPS58107656A (en
Inventor
Masami Terasawa
Yoshihiro Hosoi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP56207580A priority Critical patent/JPS58107656A/en
Publication of JPS58107656A publication Critical patent/JPS58107656A/en
Publication of JPS6251497B2 publication Critical patent/JPS6251497B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01Manufacture or treatment
    • H10W70/05Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/098Applying pastes or inks, e.g. screen printing

Landscapes

  • Contacts (AREA)
  • Chemically Coating (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Other Surface Treatments For Metallic Materials (AREA)
  • Details Of Resistors (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Description

【発明の詳細な説明】[Detailed description of the invention]

本発明は銀を含む金属部上に金の層を有する電
子部品の改良に関するものである。 金はその優れた物理的性質により各種の電子部
品に広く利用されている。例えば半導体収納用セ
ラミツクパツケージに於いては、半導体チツプを
取着するダイアタツチ部、半導体チツプの電極と
外部リードとを接続するためのワイヤを取着する
ワイヤボンデイング部あるいは外部リード等があ
る。これらはセラミツクにメタライズを施こすこ
とにより形成された金属部上に、あるいは該メタ
ライズ金属上にロウ材を介し取着された外部リー
ドの表面にメツキ、蒸着、スパッタリング等によ
り金の層が形成されている。この金の層を形成す
る理由としては(i)高導電性、(ii)耐酸化性が良いこ
と、(iii)耐変色性(退腿色性)が高いこと、(iv)半導
体チツプのシリコン(Si)と容易に合金化しAu
−Si共晶合金を作つて堅固な接合強度を発揮する
こと等の金の特性が評価されているからである
が、下地の金属部に銀が含まれている場合、該銀
が金の層内を拡散して外表面に折出し、これが大
気中に含まれる硫化物と反応して灰黒色の硫化銀
を形成してしまい、その結果、金の層の表面が灰
黒色に変色するという欠点を有していた。 本発明者等は上記欠点に鑑み種々実験した結
果、銀が銅と容易に固溶体を形成することを利用
し、金の導電層の下地として銅を主成分とする層
を形成し、該銅に拡散する銀を反応させて固溶体
を形成させることにより、銀が金の層中に拡散す
ることを防止し、その結果、金の層表面における
変色が有効に防止されることを知見した。 本発明は上記知見に基づき金の層に変色が生じ
ず、金の層の輝かしい美感が損われない電子部品
を提供することをその目的とするものである。 本発明は銀を含む金属部上に金の層を有する電
子部品において、該金属部上に金の不地層として
銅を主成分とする金属層を形成したことを特徴と
するものである。 本発明は銀を含む金属部上に金の層を有する電
子部品であればいずれにも適用でき、例えばセラ
ミツク基板上に銀を含むメタライズ層が形成さ
れ、その上に金の層が形成されるような電子部
品、あるいは金属板表面に銀メツキ層が施され、
その上に金の層が形成されるような電子部品にも
適用できる。具体的にはハイブリツドIC用配線
基板、ICパツケージ基板、LED用基板、コンデ
ンサ、抵抗、マイクロスイツチ、コネクタープラ
グ等種々のものが挙げられる。 銀を含む金属部としては、銀層、銀−パラジウ
ム等の合金層があり、従来周知の薄膜手法、厚膜
手法、メツキ法を適宜選択して形成されている。 本発明においては、前記銀を含む金属部上に銅
を主成分とする下地層を形成することが重要であ
る。 銅を主成分とする下地層の形成方法としては、
銅の電解もしくは無電解メツキ法、銅、銅−スズ
合金、銅−亜鉛等の銅合金の厚膜手法或いは薄膜
手法が用いられるが、銀の金層への拡散防止の充
分な効果を期待するには銅合金よりも銅単独の下
地層の方が好ましい。 本発明の電子部品は前記下地層の上に金の層が
形成されることにより完成する。この形成方法は
従来品と同様に例えば金メツキであればよい。 次に本発明を実施例に基づき詳細に説明する。 実施例 未ずアルミナ粉末に適当な溶媒を添加してセラ
ミツクグリーン(生)シートを形成し、これを約
1500℃の温度にて焼成してセラミツク基板を得、
該セラミツク基板上面にスクリーン印刷法により
銀−パラジウム合金(Ag:90wt%、pd:10wt
%)を印刷塗布し、酸化雰囲気中約850℃の温度
にて焼付け、銀を含む金属部を形成した。 次に前記焼付金属部上に銅の無電解メツキを施
こし、約1.0μの厚みの銅の金属層を形成し、更
に該銅の金属層上に金の無電解メツキを施こし、
約1.5μの厚みの金の層を形成して試料Aを得
た。 この試料Aを360個製作し、これらを濃度が
3PPMの硫化水素ガス中に投入し、投入後6時
間、28時間及び187時間を夫々経過した試料につ
いてその金の層表面を観察し、変色の発生度数及
びその発生率を測定した。その結果を表−1に示
す。 尚、試料Bは本発明の作用効果を比較するため
の試料であり、上述の製法において銅の金属層を
形成していないものである。
The present invention relates to improvements in electronic components having a gold layer on a silver-containing metal part. Gold is widely used in various electronic components due to its excellent physical properties. For example, a ceramic package for storing a semiconductor includes a die attach section for attaching a semiconductor chip, a wire bonding section or an external lead for attaching a wire for connecting an electrode of the semiconductor chip to an external lead, and the like. In these methods, a gold layer is formed by plating, vapor deposition, sputtering, etc. on a metal part formed by metallizing ceramic, or on the surface of an external lead attached to the metallized metal via a brazing material. ing. The reasons for forming this gold layer are (i) high conductivity, (ii) good oxidation resistance, (iii) high discoloration resistance (fading), and (iv) silicon of semiconductor chips. Au easily alloys with (Si)
This is because gold is highly evaluated for its properties such as creating a Si eutectic alloy and exhibiting strong bonding strength, but if the underlying metal part contains silver, the silver The disadvantage is that it diffuses inside and precipitates out to the outer surface, and this reacts with sulfides in the atmosphere to form gray-black silver sulfide, resulting in the surface of the gold layer turning gray-black. It had As a result of various experiments in view of the above-mentioned drawbacks, the present inventors utilized the fact that silver easily forms a solid solution with copper to form a layer containing copper as the main component as a base for a gold conductive layer. It has been found that by reacting the diffusing silver to form a solid solution, it is possible to prevent the silver from diffusing into the gold layer, thereby effectively preventing discoloration on the surface of the gold layer. Based on the above findings, the present invention aims to provide an electronic component in which the gold layer does not discolor and the brilliant beauty of the gold layer is not impaired. The present invention is an electronic component having a gold layer on a metal part containing silver, characterized in that a metal layer containing copper as a main component is formed as a gold base layer on the metal part. The present invention can be applied to any electronic component that has a gold layer on a metal part containing silver. For example, a metallized layer containing silver is formed on a ceramic substrate, and a gold layer is formed on it. A silver plating layer is applied to the surface of electronic parts such as or metal plates,
It can also be applied to electronic components on which a gold layer is formed. Specifically, there are various products such as hybrid IC wiring boards, IC package boards, LED boards, capacitors, resistors, micro switches, and connector plugs. The metal part containing silver includes a silver layer and an alloy layer of silver-palladium, etc., and is formed by appropriately selecting a conventionally well-known thin film method, thick film method, or plating method. In the present invention, it is important to form a base layer containing copper as a main component on the metal portion containing silver. The method for forming the base layer containing copper as the main component is as follows:
Electrolytic or electroless plating of copper, thick film method or thin film method of copper alloys such as copper, copper-tin alloy, copper-zinc etc. are used, but it is expected that they will be sufficiently effective in preventing diffusion of silver into the gold layer. For this reason, a base layer made of copper alone is preferable to a copper alloy. The electronic component of the present invention is completed by forming a gold layer on the base layer. This forming method may be, for example, gold plating, as in the case of conventional products. Next, the present invention will be explained in detail based on examples. Example First, a suitable solvent is added to alumina powder to form a ceramic green (raw) sheet, and this is
A ceramic substrate is obtained by firing at a temperature of 1500℃.
A silver-palladium alloy (Ag: 90wt%, PD: 10wt%) was deposited on the top surface of the ceramic substrate by screen printing.
%) was printed and baked at a temperature of about 850°C in an oxidizing atmosphere to form a metal part containing silver. Next, perform electroless plating of copper on the baked metal part to form a copper metal layer with a thickness of about 1.0 μm, and further perform electroless plating of gold on the copper metal layer,
Sample A was obtained by forming a gold layer with a thickness of about 1.5 microns. We made 360 samples of this sample A and tested them with different concentrations.
The gold layer surface of each sample was observed after 6 hours, 28 hours, and 187 hours had passed after the sample was placed in 3 PPM hydrogen sulfide gas, and the frequency and incidence of discoloration were measured. The results are shown in Table-1. Note that sample B is a sample for comparing the effects of the present invention, and a copper metal layer was not formed in the above manufacturing method.

【表】 上記測定結果からも判るように、本発明の電子
部品によれば、その変色率が187時間経過後でも
3.6%と極めて低く、従来品に比して変色発生率
が大幅に低下している。 尚、本発明は上記実施例に限定されるものでは
なく、本発明の要旨を逸脱しない範囲であれば
種々の変更は可能である。
[Table] As can be seen from the above measurement results, according to the electronic component of the present invention, the discoloration rate remains even after 187 hours.
The rate of discoloration is extremely low at 3.6%, and the rate of discoloration is significantly lower than that of conventional products. Note that the present invention is not limited to the above embodiments, and various changes can be made without departing from the gist of the present invention.

Claims (1)

【特許請求の範囲】[Claims] 1 銀を含む金属部上に金の層を有する電子部品
において、該金属部上に金の下地層として銅を主
成分とする金属層を形成したことを特徴とする金
の層を有する電子部品。
1. An electronic component having a gold layer on a metal part containing silver, characterized in that a metal layer mainly composed of copper is formed as a gold base layer on the metal part. .
JP56207580A 1981-12-21 1981-12-21 Electronic part having gold layer Granted JPS58107656A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56207580A JPS58107656A (en) 1981-12-21 1981-12-21 Electronic part having gold layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56207580A JPS58107656A (en) 1981-12-21 1981-12-21 Electronic part having gold layer

Publications (2)

Publication Number Publication Date
JPS58107656A JPS58107656A (en) 1983-06-27
JPS6251497B2 true JPS6251497B2 (en) 1987-10-30

Family

ID=16542104

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56207580A Granted JPS58107656A (en) 1981-12-21 1981-12-21 Electronic part having gold layer

Country Status (1)

Country Link
JP (1) JPS58107656A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60136241U (en) * 1984-02-22 1985-09-10 豊田合成株式会社 steering wheel
JP3423855B2 (en) * 1996-04-26 2003-07-07 株式会社デンソー Electronic component mounting structure and electronic component mounting method
JP5367319B2 (en) * 2008-07-10 2013-12-11 日本メクトロン株式会社 Capacitor and manufacturing method thereof

Also Published As

Publication number Publication date
JPS58107656A (en) 1983-06-27

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