JPS6257323A - Squelch circuit - Google Patents

Squelch circuit

Info

Publication number
JPS6257323A
JPS6257323A JP19822285A JP19822285A JPS6257323A JP S6257323 A JPS6257323 A JP S6257323A JP 19822285 A JP19822285 A JP 19822285A JP 19822285 A JP19822285 A JP 19822285A JP S6257323 A JPS6257323 A JP S6257323A
Authority
JP
Japan
Prior art keywords
level
signal
filter
reference level
squelch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19822285A
Other languages
Japanese (ja)
Inventor
Toshikazu Kawakami
川上 俊和
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP19822285A priority Critical patent/JPS6257323A/en
Publication of JPS6257323A publication Critical patent/JPS6257323A/en
Pending legal-status Critical Current

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  • Noise Elimination (AREA)

Abstract

PURPOSE:To eliminate the readjustment of squelch by impressing a reference level most suited to a detection noise output of a signal passing through a selected filter to a comparator circuit in response to a switching signal of IF filters so as to change automatically the reference level to the optimum value. CONSTITUTION:A reception IF signal given to an input terminal 1 is subject to pass band width limit by either a narrow band pass filter 4 or a broad band filter 5 selected switchingly by a switch 3 controlled by a control signal from a terminal 13 and demodulated into an audible signal by a demodulator 6. A part of the demodulation signal passes through a variable resistor 7, sent to a noise detector 8, where the noise component is detected and the result is fed to one input terminal of a comparator circuit 9. On the other hand, the control signal from the terminal 13 is fed to a storage section 16, a reference voltage having a level corresponding to the data is generated, it is fed to the other input terminal of the comparator circuit 9, compared with the reference level and the squelch gate 11 is switched from the result.

Description

【発明の詳細な説明】 [産業上の利用分野] この発明は帯域幅の異なる複数の中間周波フィルタを選
択切換えて受信する受信装置のスケルチ回路に関するも
のである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a squelch circuit for a receiving device that receives signals by selectively switching a plurality of intermediate frequency filters having different bandwidths.

[従来の技術] 第2図は従来のこの種スケルチ回路を示すブロック線図
である。図において(1)は到来受信信号の中間周波(
以下IFという)信号入力端子、(2)はフィルタ切換
信号入力端子、(3)はこの端子(2)からのフィルタ
切換信号によって制御されるスイッ   チ、(4)は
狭帯域IFフィルタ、(5月よ広帯域IFフィルタ、(
6)は復調器、(7)はスケルチ作動点を調整する可変
抵抗、(8)は復調信号をフィルタにより信号成分と雑
音成分に分離し、雑音成分のみを検波する雑音検波器、
(9)は比較回路、(10)は基準レベル入力端子、(
11)は、比較回路(9)からの出力に応じ制御され、
復調器(6)からの復調信号(可聴信号)出力を出力端
子(12)へ通過させたり、阻止したりするスケルチゲ
ートである。
[Prior Art] FIG. 2 is a block diagram showing a conventional squelch circuit of this type. In the figure (1) is the intermediate frequency (
(hereinafter referred to as IF) signal input terminal, (2) is a filter switching signal input terminal, (3) is a switch controlled by the filter switching signal from this terminal (2), (4) is a narrow band IF filter, (5) Moon, wideband IF filter, (
6) is a demodulator; (7) is a variable resistor that adjusts the squelch operating point; (8) is a noise detector that uses a filter to separate the demodulated signal into a signal component and a noise component, and detects only the noise component;
(9) is a comparison circuit, (10) is a reference level input terminal, (
11) is controlled according to the output from the comparator circuit (9),
This is a squelch gate that passes the demodulated signal (audible signal) output from the demodulator (6) to the output terminal (12) or blocks it.

次に動作について説明−する。IF信号入力端子(1)
への受信IF信号は、入力端子(2)へのフィルタ切換
信号によって制御されるスイッチ(3)により、狭帯域
IFフィルタ(4)又は広帯域IFフィルタ(5)の何
れかのフィルタにより通過帯域が制限された後、復調器
(6)で可聴信号に復調される。
Next, the operation will be explained. IF signal input terminal (1)
The received IF signal to the input terminal (2) is controlled by a switch (3) controlled by a filter switching signal to the input terminal (2), so that the passband is changed by either the narrowband IF filter (4) or the wideband IF filter (5). After being limited, it is demodulated into an audible signal by a demodulator (6).

復調され信号の一部は可変抵抗(7)を通り雑音検波器
(8)に送られ、ここで雑音成分が分離され検波され、
その検出雑音レベル電圧が比較回路(9)の一方の入力
端子に印加される。比較回路(9)の他方の入力端子(
10)には所定の基準レベル電圧が印加されており1両
入力端子のレベルが比較され、その結果によってスケル
チゲート(11)を開閉する。
A part of the demodulated signal passes through a variable resistor (7) and is sent to a noise detector (8), where the noise component is separated and detected.
The detected noise level voltage is applied to one input terminal of the comparison circuit (9). The other input terminal of the comparison circuit (9) (
A predetermined reference level voltage is applied to 10), and the levels of both input terminals are compared, and the squelch gate (11) is opened or closed depending on the result.

即ち検出雑音レベルが基準レベル以上の時はスケルチゲ
ート(11)は閉じられ、復調器(6)からの復調信号
の出力端子(12)への通過は阻止され、検出雑音レベ
ルが基準レベル以下の時はスケルチゲート(11)は開
かれ、出力端子(12)に復調信号が出力される。
That is, when the detection noise level is above the reference level, the squelch gate (11) is closed and the passage of the demodulated signal from the demodulator (6) to the output terminal (12) is blocked, and when the detection noise level is below the reference level, the squelch gate (11) is closed. At this time, the squelch gate (11) is opened and a demodulated signal is output to the output terminal (12).

第3図は入力端子(1)へのIF入力信号レベルと雑音
検波器(8)からの検出雑音レベルとの関係を示す特性
図で、今フィルタ切換え信号が広帯域IPフィルチ(5
)を選択する場合は、端子(10)への基準レベルがA
点のレベルにある時IF入力信号レベルが○から6点ま
ではスケルチゲート(11)が閉とすり、0点以上では
開となる。この状態で狭帯域フィルタ(4)を選択する
と、雑音検波器(8)の検出雑音レベルはIF入力信号
の全範囲にわたってA点を下まわるためスケルチゲート
(11)は開になったままで、復調した雑音が聞こえ耳
障りとなる。それで使用者は可変抵抗器(7)で雑音検
波器(8)の出力レベルを上げ、広帯域フィルタ(5)
で得られる検波器出力に再設定し、6点以下のIF入力
レベルの時はスケルチゲート(11)を閉じ雑音を聞こ
えないようにしている。
Figure 3 is a characteristic diagram showing the relationship between the IF input signal level to the input terminal (1) and the detection noise level from the noise detector (8).
), the reference level to terminal (10) is A.
When the IF input signal level is at the level of 0 to 6 points, the squelch gate (11) is closed, and when it is 0 or more, it is open. If the narrowband filter (4) is selected in this state, the detected noise level of the noise detector (8) will be below point A over the entire range of the IF input signal, so the squelch gate (11) will remain open and the demodulation The noise can be heard and become annoying. Therefore, the user increases the output level of the noise detector (8) with the variable resistor (7), and uses the broadband filter (5) to increase the output level of the noise detector (8).
When the IF input level is below 6 points, the squelch gate (11) is closed to prevent noise from being heard.

[発明が解決しようとする問題点] 従来のスケルチ回路は以上のように構成されているので
、複数のIFフィルタを切換え使用するものでは、フィ
ルタの切換え毎に、通過帯域幅の差によって生ずる雑音
成分の検波出力レベルの変動を補正し、スケルチ機能の
作動点が最適になるようその都度可変抵抗を調整しなけ
ればならない煩わしさがあり、又可変調整できない構造
のものではスケルチ機能の最適作動点を得るには、使用
するIFフィルタを1つに定める必要があり機能的に問
題があった。
[Problems to be Solved by the Invention] Since the conventional squelch circuit is configured as described above, in the case where a plurality of IF filters are switched and used, each time the filters are switched, the noise caused by the difference in passband width is reduced. There is the hassle of having to adjust the variable resistor each time to compensate for fluctuations in the detection output level of the component and to optimize the squelch function's operating point, and if the structure does not allow variable adjustment, the squelch function's optimal operating point may not be adjusted properly. In order to obtain this, it is necessary to use only one IF filter, which poses a functional problem.

この発明は上記のような問題点を解消するためになされ
たもので、複数の帯域幅の異なるフィルタを切換え使用
するもので、どのフィルタに切換えても常に最適の動作
を行なうスケルチ回路を得ることを目的とする。
This invention was made to solve the above-mentioned problems, and aims to obtain a squelch circuit that always performs optimal operation by switching between a plurality of filters with different bandwidths, and which filter is switched to. With the goal.

[問題点を解決するための手段] この発明にかかるスケルチ回路は、複数のIFフィルタ
にそれぞれ対応して複数の基準レベルを記憶し、IFフ
ィルタを選択する制御信号に応じ。
[Means for Solving the Problems] The squelch circuit according to the present invention stores a plurality of reference levels corresponding to a plurality of IF filters, respectively, and selects an IF filter according to a control signal.

上記記憶された複数の基準レベルから選択されたフィル
タに対応した基準レベルを検出雑音レベルと比較する基
準レベルとして取出す基準レベル発生手段を設けたもの
である。
A reference level generating means is provided for extracting a reference level corresponding to a filter selected from the plurality of stored reference levels as a reference level to be compared with the detection noise level.

[作 用コ この発明においては、IFフィルタの切換え信号に応じ
て、その選択されたフィルタを通過した信号の検出雑音
出力に対し最も適した基準レベルを比較回路に印加する
。このようにしてIFフィルタの切換え毎に自動的に基
準レベルを最適な値に変更し、スケルチ再調整を不要と
すると共に、最適なスケルチ設定点が確保される。
[Function] In this invention, in response to the switching signal of the IF filter, the reference level most suitable for the detection noise output of the signal passing through the selected filter is applied to the comparison circuit. In this way, the reference level is automatically changed to the optimum value each time the IF filter is switched, eliminating the need for squelch readjustment and ensuring an optimum squelch setting point.

[実施例コ 以下この発明の一実施例を図について説明する。[Example code] An embodiment of the present invention will be described below with reference to the drawings.

第1図はこの発明の一実施例を示すブロック線図で、図
において(1) (3)〜(9) (11) (12)
は上記第2図に示す従来装置と同様のものである。(1
3)はフィルタ切換え情報を含んだ制御信号入力端子、
(14)は入力端子(13)への制御信号をうけ、それ
の基準レベル情報からそれに対応するアドレス信号を出
力する制御器、(15)は、予め所定アドレスに各フ・
ルタ(4) (5)に対応する基準レベルデータを記憶
し、制御器(14)からのアドレス信号によってその基
準レベルデータを出力する記憶部(16)と、この記憶
部(16)からのデータにより、このデータに対応する
基準レベル電圧を発生する基P!電圧発生部(17)と
からなる基準レベル発生手段である。
FIG. 1 is a block diagram showing one embodiment of the present invention. In the figure, (1) (3) to (9) (11) (12)
is similar to the conventional device shown in FIG. 2 above. (1
3) is a control signal input terminal containing filter switching information;
(14) is a controller that receives a control signal to the input terminal (13) and outputs an address signal corresponding to the reference level information thereof;
A storage unit (16) that stores reference level data corresponding to the routers (4) and (5) and outputs the reference level data in response to an address signal from the controller (14), and data from this storage unit (16). The base P! generates a reference level voltage corresponding to this data. This is a reference level generating means consisting of a voltage generating section (17).

次にその動作について説明する。入力端子(1)に与え
られた受信IF信号は、端子(13)からの制御信号に
よって制御されるスイッチ(3)により切換え選択され
た狭帯域フィルタ(4)又は広帯域フィルタ(5)の何
れかにより通過帯域幅の制限を受けた後、復調器(6)
により可聴信号に復調される。
Next, its operation will be explained. The received IF signal applied to the input terminal (1) is passed through either a narrow band filter (4) or a wide band filter (5) which is switched and selected by a switch (3) controlled by a control signal from a terminal (13). After the passband width is limited by
demodulated into an audible signal.

復調された信号はスケルチゲート(11)が開の時これ
を通り出力端子(12)に送出される。復調信号の一部
は可変抵抗(7)を通り雑音検波器(8)に送られここ
で雑音成分が検波され、その検出雑音レベルが比較回路
(9)の1入力端子に印加される。−右端子(13)か
らの制御信号は制御器(14)にも印加され、ここで切
換え選択されたスイッチに対応する・ 所定のアドレス
信号が基準レベル発生手段(15)の記憶部(16)に
印加され、そのアドレスに記憶されている基準レベルデ
ータが読出されて基準電圧発生部(17)から、そのデ
ータに対応するレベルの基準電圧が発生し、これが比較
回路(9)の他の入力端子に印加される。この比較回路
(9)にて上記検出雑音レベルと切換えフィルタに対応
する基準レベルとが比較され、その結果によりスケルチ
ゲート(11)が開閉する。即ち制御信号が広帯域フィ
ルタ(5)を選択する時は、基準電圧発生部(17)が
らの出力レベルが第3図A点となるよう、又、狭帯域フ
ィルタ(4)を選択する時は、第3図B点となるよう、
制御器(14)からそれぞれアドレス信号が出力される
。従ってIFフィルタが何れに切換えられていても、I
F入力信号レベルがOがらCまではスケルチゲート(1
1)は閉となり、0点以上では開となる。
The demodulated signal passes through the squelch gate (11) when it is open and is sent to the output terminal (12). A part of the demodulated signal is sent to a noise detector (8) through a variable resistor (7), where a noise component is detected, and the detected noise level is applied to one input terminal of a comparison circuit (9). - The control signal from the right terminal (13) is also applied to the controller (14), where the predetermined address signal corresponding to the selected switch is stored in the storage section (16) of the reference level generating means (15). The reference level data stored at that address is read out, and the reference voltage generator (17) generates a reference voltage at a level corresponding to the data, which is then applied to the other inputs of the comparator circuit (9). Applied to the terminal. The comparison circuit (9) compares the detected noise level with a reference level corresponding to the switching filter, and the squelch gate (11) is opened or closed based on the result. That is, when the control signal selects the wide band filter (5), the output level from the reference voltage generator (17) is set to point A in FIG. 3, and when the control signal selects the narrow band filter (4), To reach point B in Figure 3,
Address signals are output from each controller (14). Therefore, no matter which way the IF filter is switched, I
When the F input signal level is from O to C, the squelch gate (1
1) is closed, and above 0 points it is open.

なお上記実施例ではスケルチ設定点を調整する可変抵抗
を備えているが、これは固定抵抗であってもよい。又、
IPフィルタ2個の場合について説明したが、2個以上
であってもよく、各々のフィルタ切換情報にあわせて記
憶部(16)から得られる出力レベルを適宜設定すれば
よい。又、上記実施例における記憶部では必要なデータ
を予め記憶していたが、必要に応じ外部からの命令で第
3図に示すデータを記憶させる機能を有していてもよい
Note that although the above embodiment includes a variable resistor for adjusting the squelch set point, this may be a fixed resistor. or,
Although the case where there are two IP filters has been described, there may be two or more IP filters, and the output level obtained from the storage unit (16) may be appropriately set according to the filter switching information of each filter. Further, although the storage unit in the above embodiment stores necessary data in advance, it may also have a function of storing the data shown in FIG. 3 in response to an external command if necessary.

又、以上の実施例ではノイズスケルチについてのみ記載
したが、キャリアスケルチ等においても上記実施例と同
等の効果を奏する。
Further, in the above embodiment, only the noise squelch was described, but the same effect as the above embodiment can be obtained also in carrier squelch and the like.

[発明の効果] 以上のようにこの発明によれば、スケルチ設定点である
基準レベルをIFフィルタの切換えに応じ外部から制御
するよう構成したので、IFフィルタ切換え毎に手動調
整を行なう必要がなく、帯域幅の異なる複数のIFフィ
ルタを備えた受信機で、どのフィルタに切換えても常に
自動的に最適のスケルチ動作が行なえるという効果を有
している。
[Effects of the Invention] As described above, according to the present invention, the reference level, which is the squelch setting point, is controlled from the outside according to the switching of the IF filter, so there is no need to perform manual adjustment every time the IF filter is switched. , a receiver equipped with a plurality of IF filters having different bandwidths has the advantage that an optimum squelch operation can always be automatically performed no matter which filter is switched.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の一実施例を示すブロック線図、第2
図は従来のスケルチ回路を示すブロック線図、第3図は
この発明及び従来例の動作説明のための特性図である。 図において(1)は中間周波(I F)信号入力端子。 (4)(5)は中間周波(zF)フィルタ、(6)は復
調器、(8)は雑音検波器、(9)は比較回路、(II
)はスケルチゲート、(I2)は出力端子、(13)は
制御信号入力端子、(14)は制御器、 (15)は基
準レベル発生手段、(16)は記憶部、(17)は基準
電圧発生部である。 図中同一符号は同−或は相当部分を示す。
FIG. 1 is a block diagram showing one embodiment of the present invention, and FIG.
The figure is a block diagram showing a conventional squelch circuit, and FIG. 3 is a characteristic diagram for explaining the operation of the present invention and the conventional example. In the figure, (1) is an intermediate frequency (IF) signal input terminal. (4) (5) is an intermediate frequency (zF) filter, (6) is a demodulator, (8) is a noise detector, (9) is a comparison circuit, (II
) is a squelch gate, (I2) is an output terminal, (13) is a control signal input terminal, (14) is a controller, (15) is a reference level generation means, (16) is a storage unit, and (17) is a reference voltage. This is the generating part. The same reference numerals in the drawings indicate the same or corresponding parts.

Claims (2)

【特許請求の範囲】[Claims] (1)帯域幅の異なる複数の中間周波フィルタを備え、
これらフィルタの内の一つを外部からの制御信号により
選択切換え接続し、この選択されたフィルタを介して受
信される中間周波信号の復調信号の雑音成分のレベルを
検出し、この検出雑音レベルを所定の基準レベルと比較
し、雑音レベルがこの基準レベル以上の時上記復調信号
の出力を阻止するようにしたスケルチ回路において、上
記複数の中間周波フィルタにそれぞれ対応して複数の基
準レベルを記憶し、上記中間周波フィルタを選択する制
御信号に応じ、上記記憶された複数の基準レベルから選
択されたフィルタに対応した基準レベルを、上記検出雑
音レベルと比較する基準レベルとして取出す基準レベル
発生手段を設けたことを特徴とするスケルチ回路。
(1) Equipped with multiple intermediate frequency filters with different bandwidths,
One of these filters is selectively connected by an external control signal, and the level of the noise component of the demodulated intermediate frequency signal received through the selected filter is detected, and the detected noise level is In the squelch circuit, which compares the noise level with a predetermined reference level and blocks the output of the demodulated signal when the noise level is equal to or higher than the reference level, a plurality of reference levels are stored corresponding to the plurality of intermediate frequency filters, respectively. , further comprising a reference level generating means for extracting a reference level corresponding to the filter selected from the plurality of stored reference levels as a reference level to be compared with the detection noise level in response to a control signal for selecting the intermediate frequency filter. A squelch circuit characterized by:
(2)上記基準レベル発生手段は、上記複数の基準レベ
ルに対応したデータを記憶する記憶部と、この記憶部か
らの上記制御信号によって指定されたアドレスから取出
されたデータに応じた基準電圧を発生する基準電圧発生
部を備えたものである特許請求の範囲第1項記載のスケ
ルチ回路。
(2) The reference level generating means includes a storage section that stores data corresponding to the plurality of reference levels, and a reference voltage that corresponds to the data taken out from the address specified by the control signal from the storage section. The squelch circuit according to claim 1, further comprising a reference voltage generating section that generates a reference voltage.
JP19822285A 1985-09-05 1985-09-05 Squelch circuit Pending JPS6257323A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19822285A JPS6257323A (en) 1985-09-05 1985-09-05 Squelch circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19822285A JPS6257323A (en) 1985-09-05 1985-09-05 Squelch circuit

Publications (1)

Publication Number Publication Date
JPS6257323A true JPS6257323A (en) 1987-03-13

Family

ID=16387534

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19822285A Pending JPS6257323A (en) 1985-09-05 1985-09-05 Squelch circuit

Country Status (1)

Country Link
JP (1) JPS6257323A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019169860A (en) * 2018-03-23 2019-10-03 株式会社Jvcケンウッド Receiver and program

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5622359U (en) * 1979-07-31 1981-02-27
JPS57142035A (en) * 1981-02-27 1982-09-02 Hitachi Ltd Control system of reception frequency band in radio receiver

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5622359U (en) * 1979-07-31 1981-02-27
JPS57142035A (en) * 1981-02-27 1982-09-02 Hitachi Ltd Control system of reception frequency band in radio receiver

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019169860A (en) * 2018-03-23 2019-10-03 株式会社Jvcケンウッド Receiver and program

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