JPS626526A - Pwm drive circuit - Google Patents

Abstract

PURPOSE:To obtain the operation stable against fluctuation of a power voltage by setting a circuit reference level of a triangle wave generating circuit and a DC bias level of a drive signal through the voltage division of the same reference power voltage. CONSTITUTION:In the triangle wave generating circuit 8, a comparison reference level of a current value setting circuit 6 setting the constant current value of the 1st and 2nd constant current sources 1, 2 is set by voltage division of a reference power voltage Vref by resistors R11, R12, and the constant current value of the 1st and 2nd constant current sources 1, 2 is controlled in the current value setting circuit 6 in response to the fluctuation of the power voltage. On the other hand, comparison reference levels VU, VL being upper and lower limits of the comparator circuit 3 are set by voltage division of the reference power voltage Vref by resistors R5-R8. Thus, in the triangle wave generating circuit 8, the drive power by the pulse signal is made always constant regardless of the fluctuation of the reference power voltage Vref by controlling the peak value and the tilt angle of the triangle wave in response to the fluctuation of the power voltage.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to a PWM (Pulse Width Modulation) drive circuit;
In particular, the present invention relates to a single-power PWM drive circuit that generates a pulse signal with a pulse width that corresponds to the signal level of a drive signal, and switches and drives a load based on this pulse signal.

A PWM bidirectional switching drive method is known as one method for driving a load such as a motor.

This drive method has excellent features such as low loss and low power consumption, and is particularly useful for driving loads such as motors in vehicle-mounted devices, portable devices, etc. that use batteries as a power source. .

Conventionally, a PWM drive circuit generates two triangular wave signals a and b that are in phase with each other, as shown in FIG. By using the upper and lower limit reference inputs of the comparator circuit 100 and the drive signal C as a comparison input, a pair of pulse signals d, which have a pulse width corresponding to the signal level of the drive signal and correspond to the drive direction of the load, are generated. e to 1
0, there was a configuration in which the load was switched and driven based on the pair of pulse signals d and e.

In such a configuration, the tip portion of the triangular wave signal is used in a range where the signal level of the drive signal C is small.

However, in the process of generating a triangular wave signal, no amplifier has an infinite bandwidth, and it is inevitable that ringing or so-called distortion will occur at the tip of the triangular wave, so the tip of the triangular wave signal is used. Conventional circuits that require this have the disadvantage that the linearity of the input/output characteristics worsens, especially when the signal level of the drive signal C becomes small.

Furthermore, when a PWM drive circuit is used to drive a load such as a motor in an in-vehicle device or a portable device, a battery is used as a power source for these devices, which is a so-called single power source. 2 and this 1/2Vcc
It is common to configure a circuit using this as the circuit reference level. However, when a battery is used as a power source, the power supply voltage v fluctuates sharply, and the circuit reference level also fluctuates due to the fluctuation of the power supply voltage, so it is desirable to take measures against fluctuations in the power supply voltage.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned points, and by using only the linear portion of a triangular wave signal to generate a pulse signal, the linearity of the input/output characteristic can be improved, especially when the signal level of the drive signal is small. It is an object of the present invention to provide a PWM drive circuit that can improve the power supply voltage and operate stably even with fluctuations in power supply voltage.

The PWM drive circuit according to the present invention generates two-phase triangular wave signals having substantially equal peak values and opposite phases, and uses these two-phase triangular wave signals as reference inputs for the upper and lower limits of the comparison circuit, respectively. The device is configured to generate a pulse signal according to the signal level of the signal, and is characterized in that the circuit reference level and the DC bias level of the drive signal are set by dividing the same power supply voltage.

Example Hereinafter, embodiments of the present invention will be described in detail based on the drawings.

In FIG. 1, a first constant current source 1 is a transistor Q
+, Q2 and a current mirror circuit consisting of resistors R+, R2. A second constant current source 2 connected in series with the first constant current source 1 has transistors Q3 and Q4 connected in parallel to each other, and bases of these transistors Q3 and Q4 are commonly connected through a resistor R3. It is constituted by a current mirror circuit consisting of a transistor Q5 and emitter resistors R4 and Rs of each transistor, and is adapted to sink a current value 2Io that is twice the constant current value Io of the first constant current source 1. A capacitor C1, which is a power storage means, is connected between the common connection point of the first and second constant current sources 1.2, that is, the common connection point of the collectors of transistors Q2 and transistors Q3 and Q4, and the ground, which is a reference potential point. It is connected.

The voltage across the capacitor C1 is the comparator C○MP+
, COMP2 and serves as a comparison input of a comparison circuit 3 that monitors the voltage level, that is, an inverting input of the comparator COMP+ and a non-inverting input of COMP2. The upper and lower comparison reference levels Vu and VL of the comparison circuit 3 are set by dividing the M single power supply voltage V ref by four resistors R5 to R8 connected in series. The resistors R5 to R8 further reduce the reference power supply voltage V ref by approximately 1/2.
The voltage is divided into 1/2 V ref through an operational amplifier OP+ having a voltage follower circuit configuration. The two comparison outputs of the comparison circuit 3, i.e., COM P +
, COM P 2 (7) Each output becomes the set (S) and reset (R) input of R8-flip-flop 4. The Φ output of the flip-flop (hereinafter simply referred to as FF) 4 is supplied to a control circuit 5 comprising a transistor Q6, resistors R9, and RIO and controlling activation/deactivation of the second constant current source 2. This fault control circuit 5 operates by turning on the transistor Q6 in response to the d output of the FF4 and turning off the transistors Q3 and Q4.
The second constant current source 2 is inactivated.

The voltage across the emitter resistor R5 in the second constant current source 2 serves as an inverting input of an operational amplifier OP2 having a voltage follower circuit configuration. The operational amplifier OPz is connected to a resistor RI1. A comparison reference level is set by dividing the reference power supply voltage V ref by R12, and the comparison output constitutes a current value setting circuit 6 that sets the constant current values of the first and second constant current sources 1.2. are doing.

The voltage across the capacitor C+ is applied to the first phase triangular wave signal φa1. l
:, and the operational amplifier OP4 and the resistor RI3. R.I.
The phase of the triangular wave signal φa is inverted by an inverter 7 consisting of 4, and becomes a second phase triangular wave signal φb having a phase opposite to that of the first phase triangular wave signal φa.

These triangular wave signals φa and φb have 1/2 V r
A DC bias of ef is given.

As described above, a triangular wave generation circuit 8 is configured that generates two-phase triangular wave signals φa and φb having substantially equal peak values and mutually opposite phases. This triangular wave generation circuit 8 is provided with a first constant current source 1 with a constant current value of 1o and a second constant current source 2 with a constant current value of 21o, and the capacitor is controlled by on/off control of the second constant current source 2. Since the configuration is such that a triangular wave is generated by charging and discharging C1 with a constant current, when converting the circuit 8 into an IC (integrated circuit), the terminal bin 11 [1i1 (first There is an advantage that the terminal 8a) in FIG. 1 is sufficient.

The two-phase triangular wave signals φa and φb are sent to the comparator COM P
3. Upper and lower limit comparison reference inputs of the comparator circuit 9 consisting of GOM PJ, that is, comparator COMP3
, COMP4 are inverted inputs. Comparison input of comparison circuit 9, ie, comparator COMP3.

A drive signal for a load, for example a motor M, is supplied to each non-inverting input of COMP 4 via a resistor R+s.

A reference power supply voltage V ref is applied to each non-inverting input terminal of the comparators COM P 3 and COM P a via a resistor RI6 (R15=R+s), and the resistance values of the resistors R+s and R+6 are set equal. As a result, the drive signal is biased to 1/2 V ref at the time it becomes the comparison input of the window comparator 9. In other words, the signal reference level of the drive signal is 1/2
Vref.

As a result, the circuit reference level of the triangular wave generation circuit 8, that is, the comparison reference level of the comparator circuit 3 and the DC bias level (signal reference level) of the drive signal are both set by resistive voltage division of the same reference power supply voltage Vrer. become. Therefore, even if there is a fluctuation in the power supply voltage, the two-phase triangular wave signal φa
, φb and the drive signal are always kept constant, so that stable circuit operation is always performed regardless of fluctuations in the power supply voltage.

The comparison output of comparator COMP3 is AND gate 10
and NOR gate 11, and the comparison output of comparator COMP4 is AND gate 10 and NO
Each member of the R gate 11 becomes a power source.

As a result, first and second pulse signals corresponding to the driving direction of the motor M are derived from each output terminal of the AND gate 10 and the NOR gate 11.

The drive signal mentioned above is sent to the comparator C via the resistor R+s.
It also serves as the non-inverting input of OMP5. Comparator C
The OMP s constitutes a polarity determining means that determines the polarity of the drive signal with respect to the signal reference level by using 1/2 V ref as an inverted input.

The discrimination output of the comparator COMPs is D', F F
12 data (D) are input. D-FF12 triggers the Q output of R8-FF4 in the triangular wave generation circuit 8 (T
) input, and its Q and Φ outputs are AND gate 13. ．． 1
Each of 4 - becomes human power. AND gates 13 and 14 are AND
The outputs of the gate 10 and the NOR gate 11, that is, the first and second pulse signals, are respectively inputted, and D-
Q of FF12.

A gate means is configured to output only one of the first and second pulse signals based on the d output.

Each output pulse of the AND gate 13.14 is supplied to a compensation circuit 15.16 that compensates for energy loss due to back electromotive force of back electromotive force absorbing diodes D+ and D2 in a motor drive circuit 18, which will be described later. Compensation circuit 15
, the output pulse of the AND gate 13 is connected to the resistor R+7
It becomes the base input of the transistor Q7 via the transistor Q7, and this transistor Q is connected in parallel with the capacitor C2. Both ends of capacitor C2 are short-circuited when transistor Q7 is turned on, and the charge is instantly discharged, and transistor Q
7 is turned off, that is, when the output pulse of the AND gate 13 disappears, charging is started by the constant current source la. The voltage across the capacitor C2 is the comparator C
This becomes the inverting input of OMP6. Comparator COM
Ps has the reference voltage EO as a non-inverting input, and the capacitor C
When the voltage across the terminal 2 is lower than the reference voltage Eo, a high level pulse signal is generated. As a result, the compensation circuit 15 outputs A
A pulse signal in which a pulse having a substantially constant pulse width is added to the output pulse of the ND gate 13 is output.

Similar to the compensation circuit 15, the compensation circuit 16 also includes a resistor R18, a transistor Q8, a capacitor C3, a constant current source 1b, and a comparator COMP y, and its operation is exactly the same as that of the compensation circuit 15.

Each output pulse of the compensation circuit 15 , 16 is supplied via a predrive circuit 17 to a motor drive circuit 18 .

In the motor drive circuit 18, the motor M is PNPN.
Upper transistor Q9, NPN transistor Q +o, PNP transistor Q n, and NPN transistor Q
Each of the 12 collectors is connected between the common connection points. Transistors Q9, QIQ, Qn, and Q10 are power transistors. Transistor Q9. Each emitter of Qll is directly connected to the power source V, and each base is connected to the power source Vcc through resistors R+s and R2o, respectively. On the other hand, the emitters of transistors Q+o and Q+2 are both grounded, and the bases of each transistor are connected to resistors R2+ and R2, respectively.
2 and the Zener diode ZD+
, ZD2 to each collector. Both ends of the motor M are connected to M lli V cc via back electromotive force absorbing diodes D+ and D2.

In the predrive circuit 17, the pulse signal supplied from the correction circuit 15 drives the power transistor Q9 through a predrive stage consisting of resistors R23, R24 and the transistor Q13, and after being inverted by the inverter 19, the pulse signal is applied to the resistor R25. ~R27 and transistor Q14
power transistor Q via a predrive stage consisting of
12. As a result, a current flows through the motor M in the direction of the arrow shown by the solid line in the figure, and the motor M is driven to rotate in the forward direction. Further, the pulse signal from the compensation circuit 15 is also supplied to the transistor Q+s via the inverter 20, and turns on the transistor QCs when the forward drive of the motor M is stopped. As a result, the base and emitter of the power transistor Q12 are short-circuited by the transistor Q+5, so that the power transistor QI2 is instantly turned off. The reason for providing this transistor Q+s will be explained in detail later. The base of the transistor QCs is connected to the power supply α via a resistor R2B.

On the other hand, the pulse signal supplied from the compensation circuit 16 is
29, R2O and the transistor Q16 through a pre-drive stage, and after being inverted by the inverter 21, the resistors R31 to R
33 and the power transistor Q+ via a predrive stage consisting of the transistor Q+y.

to drive. As a result, a current flows through the motor M in the direction of the arrow shown by the broken line in the figure, and the motor M is driven to rotate in the opposite direction. Further, the constant current source from the compensation circuit 16 is also supplied to the transistor Q+s via the inverter 22, and turns on the transistor Q+a when the reverse drive of the motor M is stopped. As a result, between the base and emitter of the power transistor Q to
Since it is short-circuited by +s, the power transistor Q
to is instantly turned off. The base of transistor Q+s is connected to power supply Vcc via resistor R34.

Next, the circuit operation of the PWM drive circuit according to the present invention will be explained.

First, the circuit operation of the triangular wave generation circuit 8 will be explained with reference to the waveform diagram of FIG. In the triangular wave generation circuit 8, the second
When the constant current source 2 of the first constant current source 2 is in an inactive state, that is, when the transistor Q6 is turned on and the transistors Q3 and Q4 are turned off, the capacitor C1 is As shown in Figure 2(a), the battery is charged at a constant angle of inclination. When the voltage across the capacitor C1 reaches the upper limit reference level Vu of the comparator circuit 3, the comparator COM P + outputs a low level pulse (b)
is generated, and in response to this pulse (b), the φ output (d) of R8-FF4 transitions to a low level.

This turns transistor Q6 off, so
The second constant current source 2 is in an activated state, that is, the transistor Q3
, Q4 are turned on, and a current twice the constant current of the first constant current source 1 is sucked.

As a result, the capacitor C1, which had been in the charging state until then, shifts to the discharging state, and as shown in FIG. is the lower limit reference level V of comparator circuit 3
When reaching L, the comparator COMP2 generates a low level pulse (C), and in response to this pulse (c)5, R
The Q output (d) of 8-FF4 transitions to high level. As a result, the transistor Q6 is turned on and the second constant current source 2 is deactivated, so that the capacitor C is turned on again.
1 is charged at a constant angle of inclination by a constant current supplied from the first constant current source 1.

In this way, by repeating the charging and discharging operation of the capacitor C1 with the constant current from the first and second constant current sources 1 and 2, the voltage across the capacitor C+ is as shown by the solid line in FIG. 2(a). The signal changes into a triangular waveform as shown in FIG. It is output as a second phase triangular wave signal φb, which has the same peak value as the signal φa and has an opposite phase. This two-phase triangular wave signal φa.

φb becomes a reference input of the comparator circuit 9.

A drive signal for the motor M having a signal reference level of 1/2 Vref is supplied as a comparison input of the comparison circuit 9.

Here, if the motor M is, for example, a spindle motor that rotationally drives a compact disc, the error signal obtained by comparing the reproduction synchronization signal from the disc with the reference synchronization signal becomes the drive signal, and based on this error signal, The drive control of the spindle motor is then performed. This is the so-called spindle servo.

In Fig. 3, the cross point of the two-phase triangular wave signals φa and φb is at the 1/2Vref level, and this 1/2V
The PWM operation when the signal level of the drive signal is higher and lower than the rer level will be described below.

In the comparator circuit 9, first, when the signal level of the drive signal is higher than the <1/2Vre level as shown by the dashed line in FIG.
) is the first phase triangular wave signal φ with respect to the signal level of the drive signal.
At the time t1 when the signal level of the triangular wave signal φa becomes low, it transitions from the low level to the high level, and the high level is maintained until the time t4 when the signal level of the triangular wave signal φa exceeds the signal level of the drive signal. Furthermore, the output (C) of the comparator COMP4 transitions from high level to low level at time t2 when the signal level of the second phase triangular wave signal φb exceeds the signal level of the drive signal, At time t3 when it becomes low, it changes to high level again.

On the other hand, if the signal level of the drive signal is lower than <1/2Vref level as shown by the two-dot chain line in Figure (a, >) and has the same absolute value level as in the above case, the output (d ) transitions from a low level to a high level at time t2 when the signal level of the first phase triangular wave signal φa exceeds the signal level of the drive signal, and the triangular wave signal φa
A time point t3 when the signal level of exceeds the signal level of the drive signal
maintain a high level. Also, the comparator COMP
The output of 4<8) transitions from high level to low level at time t1 when the signal level of the second phase triangular wave signal φb exceeds the signal level of the drive signal, and at time t4 when it becomes lower than the signal level of the drive signal. to move to a higher level again.

Comparator COM P 3. Each output of COMP 4 is made up of two outputs, an AND gate 10 and a NOR gate 11, and the AND gate 10 goes high when both outputs are at a high level, that is, when the signal level of the drive signal is higher than the 1/2 Vrer level. output a level pulse (, f>,
The NOR gate 11 outputs a high level pulse (Q) when both of the two input signals are at a low level, that is, when the signal level of the drive signal is lower than the 1/2 V ref level. Therefore, the AND gate 10 and the NOR gate 11 are connected to the motor M
Pulse signals (f), l) corresponding to the driving direction of the motor are output. Note that here we have explained the case where the signal level of the drive signal is constant, so the pulse signal (f),
Although the pulse width of (Q) is constant, it is easy to understand that this pulse width changes depending on the signal level of the drive signal.

In this way, by generating two-phase triangular wave signals φa and φb with equal peak values and mutually opposite phases, and performing PWM operation using the linear portions of these two-phase triangular wave signals φa and φb, even if the triangular wave Even if there is ringing or so-called rounding at the tip, there is no deterioration in the linearity when the signal level of the drive signal is small.

Here, if the reference power supply voltage vref fluctuates, the PWM
The pulse width of the pulse signal generated by this changes, and the driving power generated by this pulse signal changes in accordance with fluctuations in the power supply voltage.

That is, as shown in FIG. 4(A), if the pulse width of the pulse signal when the drive signal is at a certain signal level is To, the drive power due to this pulse signal is equal to the pulse width T.
o and the drive voltage Vo (reference power supply voltage Vref), so if the drive voltage Vo becomes, for example, 1/2 due to fluctuations in the power supply voltage, the drive power will also become 1/2 as shown by the diagonal line. This will result in

However, in the triangular wave generation circuit 8, the first and second
The comparison reference level of the current value setting circuit 6 for setting the constant current value of the constant current source 1.2 is the resistor Ru.

The current value setting circuit 6 is set by dividing the reference power supply voltage V ref by R+2, and the reference level also changes according to the fluctuations in the power supply voltage. This means that the constant current values of the second constant current sources 1 and 2 can be controlled.

As a result, the inclination angle of the triangular wave changes as shown in FIG. 4(B). On the other hand, since the upper and lower comparison reference levels VU and VL of the comparator circuit 3 are also set by dividing the reference power supply voltage V ref by the resistors R5 to R8, the base Q-power supply voltage V ref can be reduced to 1/2. For example, the comparison reference levels VU and VL of the upper and lower limits also become 1/2, and as a result, the peak value Vp of the triangular wave becomes 1/2 of the value before the power supply fluctuation, as shown in FIG. 4 (8). Therefore, by setting the slope angle of the triangular wave so that the repetition period of the triangular wave is the same before and after the power fluctuation, the 2To
) is generated, so even if the drive voltage VD becomes 1/2, the drive power generated by the pulse signal remains the same as before the power supply fluctuation.

That is, in the triangular wave generation circuit 8, by controlling the peak value and slope angle of the triangular wave according to fluctuations in the power supply voltage, the driving power generated by the pulse signal is adjusted to the reference power supply voltage V.
It can always be kept constant regardless of fluctuations in ref. Incidentally, the inclination angle of the triangular wave is determined by the constant current values of the first and second constant current sources 1.2 and the capacitor C1.

In FIG. 1 again, the signal level of the drive signal is now at the fifth level.
If the change occurs as shown by the dashed line in Figure (a), two pulse signals (b) and (c) with pulse widths corresponding to the polarity and signal level of the drive signal will
The outputs from the OR gate 11 become the outputs of the A'ND gates 13 and 14, respectively. The drive signal also serves as a comparison input for the comparator COMPs, and the signal reference level 1/
The polarity with respect to 2Vref is determined. The comparison output of this comparator COMPs (D- with d> as the data input)
FF12 uses the output (e) of R8-FF4 in the triangular wave generation circuit 8 as a trigger input, and
) at the falling timing of Q, C) output (f), (
o). This Q.

0 output (f)', (Q) is ANDed as gate control signal
It is fed to gates 13.14.

In the above embodiment, the mouth output (e) of R8-FF4 was directly used as the trigger input of D-FF12, but the mouth output (e)
It is also possible to use a trigger input of the D-FF 12 via a pulse generator that generates pulses at the rising and falling timings of e). According to this, the period of polarity determination becomes 172, which means that the resolution can be doubled.

The Q, output (f), and (Q) of the D-FF12 become control signals that determine the drive direction of the motor M. For example, when the signal level of the drive signal is small and its polarity changes from positive to negative, a NOR gate is activated. As shown in FIGS. 11 to 5 (C), for the reverse direction drive pulse signal (first pulse) that occurs instantaneously, the output (0) is at a low level at the time of generation, so the AND Gate 14 operates to inhibit its output. The reason for this prohibition will be explained below.

Now, let's consider a case where the reverse drive pulse signal is not instantaneously generated from the NOR gate 11 at the timing when the signal level of the drive signal is small and its polarity changes from positive to negative, as shown in FIG. 5(C). , in the motor drive circuit 18, the transistor Q is activated in response to the pulse signal shown in FIG. 5(b).
9. Q10 is turned on and drives the motor M in the forward direction, but as shown in FIG.
0 is in the off state, transistors Qll and QIG are in the on state, and attempt to drive the motor M in the opposite direction.

Generally, a transistor has a capacitance co between the base and emitter as shown in FIG. 6, so that the transistor that is turned on in response to the driving pulse (a) can be It has a characteristic that a delay of one hour (jOFF) is required before transitioning to the off state. Therefore, as described above, by generating the reverse drive pulse signal shown in FIG. 5(C), transistors Q9 and Q10 are turned off, and transistors QI1. QIO
However, due to the delay time tOFF, the transistor QI2 cannot be turned off instantaneously, and there will be a period in which it is temporarily turned on at the same time as the transistor Qn, so the transistor QllIQ+2 A large current may flow through the transistor, causing destruction of the transistor.

However, in this PWM drive circuit, the AND gate 13.
14, and these gates 13 and 14 are controlled based on the polarity determination result with respect to the signal reference level of the drive signal, so in the above example, the reverse direction drive shown in FIG. Since the output of the pulse signal can be inhibited by the AND gate 14 in response to the output (q) of the D-FF 12, the transistor QI2 does not turn on at the same time as the transistor Qu.

Furthermore, in order to reduce the delay time tOFF of the power transistor Q 12 +010, the predrive circuit 17 is provided with transistors Q Is and Q +g. These transistors Q+s and Q+a instantaneously turn on in response to the extinction of the drive pulse of power transistor Q12.0IO, and these transistors Q12.
．． By short-circuiting the base and emitter of 0IO, the above-mentioned delay time B tOF can be shortened. The delay time tOFF of a transistor is generally 1 to 2 μS.
However, by providing the transistors Q Is and Q +a, it is about 1/10, that is, 100 n se
It is possible to shorten the length to approximately c.

Another embodiment for preventing the above-mentioned power transistors from turning on simultaneously is shown in FIG. In this figure, as described above, the first and second pulse signals (a) corresponding to the driving direction of the motor M are output from the AND gate 10 and the NOR gate 11, and these pulse signals are transmitted to the delay circuit 23.
24 for a predetermined time τ0 (delayed). These delayed outputs (b) are respectively supplied to three-state buffers 25 and 26. Above, the first and second pulse signals (a) are one-shot multivibrator 27.28 are also supplied respectively.One-shot multivibrator 27.28
is a certain period of time from the time of generation of the first and second pulse signals to their disappearance, preferably the delay time τ of the delay circuits 23 and 24.
The second and first pulses are outputted from the delay circuit 24.23 by generating a low-level output (C) until twice the time (2τ0) of Prohibits the signal from being supplied to the next stage.

FIG. 8 is an operating waveform diagram of the circuit in FIG. 7, and (a)
-(C) show the waveforms of the signals (a) to (C) in FIG. 7, respectively.

Referring to this waveform diagram, the circuit operation in FIG.
Regarding the NO gate 11, if the pulse signal <8
) is delayed by a time τ0 in the delay circuit 23 and becomes the drive pulse (b) for the motor M. At this time, in response to the low level inhibition signal (C) output from the one-shot multivibrator 27, the buffer 26 cuts off the output line of the other drive pulse. As a result, a certain period (time τ0
), the output of the local drive pulse is prohibited, so the time τ0 is
By setting the QIO delay time longer than tOFF, power transistor Q9 and QIO (or Q
and Q12) are never turned on at the same time.

As mentioned earlier, the delay time t of the transistor
Since the OFF time is generally about 1 to 2 μsec, the time τ0
It is desirable to set the time to about 5 μsec.

In FIG. 1, first and second pulse signals corresponding to the driving direction of the motor M output from the AND gate 13.14 are respectively supplied to a compensation circuit 15.16. These compensation circuits 15 and 16 are for compensating for energy loss in the back electromotive force absorbing diodes D+ and D2 in the motor drive circuit 18. The energy loss in the back electromotive saw absorption diodes D+ and D2 is almost constant and can be ignored when the pulse width of the pulse signal is large, but when the pulse width is small, the loss ratio increases. It's coming. Therefore, as shown by the broken line in Figure 9, the gain decreases in the region where the pulse width of the pulse signal is small, so when the pulse width is small, energy loss occurs in the back electromotive force absorbing diodes D+ and D2. It would be better to compensate them for that.

Here, the circuit operation of the compensation circuit 15 will be explained with reference to the waveform diagram in FIG. 10.
is charged with a constant current by a constant current source 1a, and when the transistor Q7 turns on in response to the input pulse (a), the charge in the capacitor C2 is instantly discharged, and the input pulse (a) From the moment when the capacitor C2 disappears, the capacitor C2 is charged again with a constant current.Therefore, the voltage across the capacitor C2 changes as shown in FIG. is compared with the result comparator COM
At the output end of Py, a pulse signal (C) is obtained which has a pulse width from the time when the input pulse (a) is generated to when a certain period of time Ta has elapsed after its extinction. Constant pulse width Ta for pulse (a)
is added, and this added pulse width Ta
The energy loss in the back electromotive force absorbing diodes D+ and D2 can be compensated for by the energy equivalent to the amount of energy.

FIG. 11 shows the input/output characteristics of the compensation circuits 15 and 16, that is, the relationship between the pulse width of the input pulse and the added pulse width, and the voltage across the capacitor C2 is the reference voltage of the comparator COM P y. In the pulse width region (■) of the input pulse that cannot drop to Eo, no pulse width is added, and in the region (■) until the input pulse reaches zero level below the base Q voltage EO, the additional pulse width changes proportionally and reaches the zero level. After reaching the region (2), the added pulse width becomes a fixed width. In other words, the pulse width of the input pulse is extremely small.
In this case, there is no additional pulse width, or the additional pulse width changes proportionally, but this is due to the fact that the rise and fall of the input pulse are not steep but actually gentle, and as a result, the area In the range (2), the gain can be improved as shown by the solid line in FIG.

The compensation circuits 15 and 16 are not limited to the configurations of the above embodiments, but may include, for example, as shown in FIG.
Constant pulse width T in response to the rising edge of the input pulse
The pulse generating circuit 29 may be configured to include a pulse generating circuit 29 that generates a pulse signal having a pulse signal having a value of b, and an OR gate 30 that calculates the logical sum of the output pulse of the pulse generating circuit 29 and the input pulse. In this configuration, when the pulse width of the input pulse is smaller than the pulse width Tb, a pulse signal having the pulse width Tb is always output from the OR gate 30, so that the pulse width of the input pulse is the opposite of that when the pulse width is small. Energy loss in the electromotive force absorbing diodes D+ and Dz is compensated for, and when the pulse width of the input pulse is greater than the pulse width Tb, the pulse width of the input pulse is not changed.

In the above embodiment, a case has been described in which the drive circuit is used for a spindle motor that rotationally drives a compact disc, but the invention is not limited to this, and the invention is not limited to this. It can also be applied to drive circuits for focus actuators and tracking actuators that control focus and tracking, and can be widely applied not only to compact disc players but also to drive circuits for various loads in various devices.

As described in detail, the PWM drive circuit according to the present invention is configured to use only the linear portion of the triangular wave signal to generate the pulse signal that drives the load, so that ringing does not occur at the tip of the triangular wave. Even if the signal level is increased or the signal level is rounded, there is no influence from these factors, and the linearity of the input/output characteristics can be improved, especially when the signal level of the drive signal is small.

In addition, since the circuit reference level and the DC bias level of the drive signal are set by dividing the same power supply voltage, even if the power supply voltage fluctuates in one power supply, the relative relationship between the triangular wave signal and the drive signal in the pulse signal generation stage is The signal level is always kept constant, and stable circuit operation is always performed regardless of fluctuations in the power supply voltage.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram showing one embodiment of the present invention, and Fig. 2 is a circuit diagram showing an embodiment of the present invention.
Figure 3 is a waveform diagram of each part to explain the circuit operation of the triangular wave generation circuit in the figure. Figure 3 is a waveform diagram of each part to explain the operation of generating two pulse signals corresponding to the drive direction of the load by PWM operation. <A> and (B) are waveform diagrams for explaining the operation of changing the slope angle and peak value of the triangular wave in response to fluctuations in the power supply voltage, and Figure 5 shows the drive stage due to the 1-hour tOFF delay of the transistor. Figure 6 is a waveform diagram of each part to explain the circuit operation of the simultaneous ON prevention circuit for power transistors. Figure 6 is a diagram to explain the tOFF delay time of the transistor. Figure 7 is a diagram for explaining the simultaneous ON prevention circuit.
A block diagram showing another embodiment of the prevention circuit, FIG.
Waveform diagrams of various parts to explain the circuit operation in the figure, Figure 9 shows the change in gain due to energy loss due to back electromotive force in the back electromotive force absorption diode, and Figure 10 shows back electromotive force absorption. A waveform diagram for explaining the circuit operation of a compensation circuit that compensates for the energy loss due to the back electromotive force in the diode, FIG. 11 is a diagram showing the input/output characteristics of such a supplementary TA circuit, and FIG. 12 is a diagram showing the input/output characteristics of such a compensation circuit. FIG. 13 is a block diagram showing another embodiment of the present invention, and is a diagram for explaining the conventional example and its operation. Explanation of symbols of main parts 1...First constant current source 2...Second constant current source 3.9...Comparison circuit 8... Triangular wave generation circuit

Claims (2)

[Claims] (1) A PWM (pulse width modulation) drive circuit using a single power supply that generates a pulse signal with a pulse width corresponding to the signal level of the drive signal and switches the load based on this pulse signal, and the peak value is approximately 2 equal and opposite phases
a triangular wave generation circuit that generates triangular wave signals of three phases; and a first comparison circuit that uses the two-phase triangular wave signals as reference inputs for upper and lower limits, respectively, and uses the drive signal as a comparison input; A PWM drive circuit, wherein a circuit reference level and a DC bias level of the drive signal are set by dividing the same reference power supply voltage. (2) The triangular wave generation circuit includes a first constant current source, and a second constant current source that is connected in series with the first constant current source and draws twice as much current as the first constant current source. , a power storage means connected between a common connection point of the first and second constant current sources and a reference potential point, a second comparison circuit that monitors an output level of the power storage means, and a second comparison circuit that monitors the output level of the power storage means; control means for controlling activation/deactivation of the second constant current source based on the output of the comparison circuit, and a comparison reference level of the second comparison circuit is the circuit reference level. A PWM drive circuit according to claim 1, characterized in that: