JPS6281017A - Manufacture of semiconductor single crystal layer - Google Patents
Manufacture of semiconductor single crystal layerInfo
- Publication number
- JPS6281017A JPS6281017A JP22033185A JP22033185A JPS6281017A JP S6281017 A JPS6281017 A JP S6281017A JP 22033185 A JP22033185 A JP 22033185A JP 22033185 A JP22033185 A JP 22033185A JP S6281017 A JPS6281017 A JP S6281017A
- Authority
- JP
- Japan
- Prior art keywords
- single crystal
- film
- thin film
- semiconductor
- crystal layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000013078 crystal Substances 0.000 title claims abstract description 62
- 239000004065 semiconductor Substances 0.000 title claims abstract description 44
- 238000004519 manufacturing process Methods 0.000 title claims description 14
- 239000010408 film Substances 0.000 claims abstract description 42
- 239000010409 thin film Substances 0.000 claims abstract description 32
- 238000000034 method Methods 0.000 claims abstract description 20
- 238000000137 annealing Methods 0.000 claims abstract description 12
- 238000010894 electron beam technology Methods 0.000 claims abstract description 6
- 229910052710 silicon Inorganic materials 0.000 claims 1
- 239000010703 silicon Substances 0.000 claims 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 14
- 239000000758 substrate Substances 0.000 abstract description 10
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract description 9
- 229910052681 coesite Inorganic materials 0.000 abstract description 7
- 229910052906 cristobalite Inorganic materials 0.000 abstract description 7
- 239000000377 silicon dioxide Substances 0.000 abstract description 7
- 235000012239 silicon dioxide Nutrition 0.000 abstract description 7
- 229910052682 stishovite Inorganic materials 0.000 abstract description 7
- 229910052905 tridymite Inorganic materials 0.000 abstract description 7
- 238000004518 low pressure chemical vapour deposition Methods 0.000 abstract description 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 abstract description 2
- 238000009825 accumulation Methods 0.000 abstract 1
- 239000000463 material Substances 0.000 abstract 1
- 238000005530 etching Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000008710 crystal-8 Substances 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
Landscapes
- Recrystallisation Techniques (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の技術分野〕
本発明は、絶縁膜上に半導体単結晶薄膜を成長する半導
体単結晶層の製造方法に係わり、特に平坦性に優れた半
導体単結晶層の製造方法に関する。[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a method for manufacturing a semiconductor single crystal layer in which a semiconductor single crystal thin film is grown on an insulating film, and in particular to a method for manufacturing a semiconductor single crystal layer with excellent flatness. Regarding the method.
従来、絶縁膜上に再結晶化半導体中結晶を成長させる場
合、絶縁膜の一部に設けられた開孔部をシードとして絶
縁膜上の半導体薄膜を単結晶化している。例えば、第２
図に示す如く、単結晶Ｓｉ基板２１上にＳｉＯ２膜２２
膜形２し、このＳｉＯ２膜２２膜形２部２３を設ける。Conventionally, when growing recrystallized semiconductor medium crystals on an insulating film, a semiconductor thin film on the insulating film is made into a single crystal using an opening provided in a part of the insulating film as a seed. For example, the second
As shown in the figure, a SiO2 film 22 is formed on a single crystal Si substrate 21.
A film shape 2 is formed, and this SiO2 film 22 is provided with a film shape 2 portion 23.
次いで、全面に多結晶Ｓｉ膜２４を堆積し、これをレー
ザビームや電子ビーム等でアニールして単結晶化してい
る。Next, a polycrystalline Si film 24 is deposited on the entire surface and is annealed with a laser beam, an electron beam, etc. to form a single crystal.
しかしながら、この種−の方法にあっては次のような問
題があった。即ち、下地単結晶との連絡を持つ開孔部の
形成によって、絶縁股上の単結晶の平坦化が困難である
。さらに、開孔部上の単結晶層に段切れが生じる等の虞
れがある。このような問題が、再結晶化単結晶層に＾密
度・高精度の素子を有効に作成する場合に大きな障害と
なっていた。さらに、今後３ｉデバイスの多部化を行い
３次元ＩＣを作成する場合、この問題は上層部にも波及
し、一層深刻な問題となることは明らかである。However, this type of method has the following problems. That is, the formation of an opening communicating with the underlying single crystal makes it difficult to flatten the single crystal on the insulating crotch. Furthermore, there is a possibility that a step break may occur in the single crystal layer above the opening. Such problems have been a major hindrance to effectively producing high-density, high-precision devices using recrystallized single crystal layers. Furthermore, if the 3i device is to be made into multiple parts in the future to create a three-dimensional IC, it is clear that this problem will spread to the upper layers and become an even more serious problem.
本発明は上記事情を考慮してなされたもので、その目的
とするところは、絶縁膜上に平坦で且つ良質の単結晶層
を形成することができ、３次元ＩＣ等の製造に好適する
半導体単結晶層の製造方法を提供することにある。The present invention has been made in consideration of the above circumstances, and its purpose is to form a flat and high-quality single crystal layer on an insulating film, and to provide a semiconductor suitable for manufacturing three-dimensional ICs, etc. An object of the present invention is to provide a method for manufacturing a single crystal layer.
本発明の骨子は、絶縁股上に単結晶を成長形成する前に
、予め単結晶成長のシードとなる絶縁膜の開孔部を単結
晶で埋込み平坦化しておくことにある。The gist of the present invention is that, before growing a single crystal on an insulating crotch, an opening in an insulating film that will serve as a seed for single crystal growth is filled with a single crystal and flattened in advance.
即ち本発明は、絶縁膜の一部に設けられた下地単結晶に
達する開孔部を単結晶成長のシードとして用い、この絶
縁股上に半導体単結晶層を成長形成する半導体単結晶層
の製造方法において、前記絶縁膜の開孔部に多結晶若し
くは非晶質の第１の半導体薄膜を埋込み形成し、且つこ
の薄膜をビームアニールにより単結晶し、次いで全面に
多結晶若しくは非晶質の第２の半導体薄膜を形成し、し
かるのちこの第２の半導体薄膜をビームアニールにより
単結晶化するようにした方法である。That is, the present invention provides a method for manufacturing a semiconductor single crystal layer, in which a hole provided in a part of an insulating film reaching a base single crystal is used as a seed for single crystal growth, and a semiconductor single crystal layer is grown on the insulating layer. In this step, a polycrystalline or amorphous first semiconductor thin film is buried in the opening of the insulating film, and this thin film is made into a single crystal by beam annealing, and then a polycrystalline or amorphous second semiconductor thin film is formed on the entire surface. In this method, a second semiconductor thin film is formed, and then this second semiconductor thin film is made into a single crystal by beam annealing.
本発明によれば、第２の半導体薄膜を形成する際には、
その下地が平坦であることから、第２の半導体薄膜を平
坦性良く形成することができる。According to the present invention, when forming the second semiconductor thin film,
Since the base is flat, the second semiconductor thin film can be formed with good flatness.
このため、絶縁膜上に形成する半導体単結晶層の平坦化
及び結晶特性の向上をはかり得る。従って、この単結晶
層に高密度・高精度の素子を形成することが可能となり
、３次元ＩＣ等の作成に極めて有効である。Therefore, it is possible to planarize the semiconductor single crystal layer formed on the insulating film and improve crystal characteristics. Therefore, it is possible to form high-density and high-precision elements in this single crystal layer, which is extremely effective for producing three-dimensional ICs and the like.
以下、本発明の詳細を図示の実施例によって説明する。 Hereinafter, details of the present invention will be explained with reference to illustrated embodiments.
第１図＜ａ）〜（ｆ）は本発明の一実施例に係わる半導
体単結晶層の製造工程を示す断面図である。まず、第１
図（ａ）に示す如く面方位（１００）、比抵抗６〜８［
Ωｃｍ ］のＰ型中結晶３ｉ基板１１を用意し、その表
面に厚さ１［μｍ］のＳ ｉ ０２膜（絶縁１ｌＩ）１
２をＣＶＯ法によって被着した。続いて、ＳｉＯ２膜１
２の一部に、基板１１との連絡を持たすべき開孔部〈シ
ード部）１３をＲＩＥ法により形成した。この場合、開
孔部１３の大きさは、例えば２［μ′ｒｒＬ］×２［μ
ＴｒＬ］程度でよい。FIGS. 1A to 1F are cross-sectional views showing the manufacturing process of a semiconductor single crystal layer according to an embodiment of the present invention. First, the first
As shown in Figure (a), the plane orientation (100), the specific resistance 6 to 8 [
A P-type medium crystal 3i substrate 11 with a diameter of
2 was deposited by CVO method. Next, SiO2 film 1
An opening portion (seed portion) 13 that should communicate with the substrate 11 was formed in a part of the substrate 2 by RIE method. In this case, the size of the opening 13 is, for example, 2[μ′rrL]×2[μ
TrL] is sufficient.
次いで、第１図（ｂ）に示す如く全面に多結晶５ｉｌｌ
ｌ（第１の半導体１ｍ１）１４をＬＰＣＶＤ法によって
厚さ５０００ ［人］堆積した。なお、この堆積により
前記開孔部１３は多結晶Ｓｉ膜１４で完全に埋込まれる
ことになる。その後、電子ビームを用いて、多結晶Ｓｉ
膜１４をビームアニールし、このＳｉ膜１４を単結晶化
した。このとき、開孔部１３の端部では単結晶化した３
ｉ層の段切れが生じることもあった。Next, as shown in Figure 1(b), polycrystalline 5ill was applied to the entire surface.
14 of the first semiconductor was deposited to a thickness of 5,000 ml by the LPCVD method. Note that this deposition causes the opening 13 to be completely filled with the polycrystalline Si film 14. Then, using an electron beam, polycrystalline Si
The film 14 was beam annealed to form a single crystal of the Si film 14. At this time, at the end of the opening 13, the single crystal 3
In some cases, the i-layer was broken.
次いで、第１図（Ｃ）に示す如く単結晶化した５ｉ１１
４’上にレジスト１５を塗布し、その表面を平坦化した
。続いて、ＣＤＥ法により、レジスト１５及び単結晶８
１層１４′のエツチング速度が略同じとなる条件下で、
第１図（ｄ）に示す如くレジスト１５及び単結晶５ｉ１
１４’ を前記Ｓ ｉ ０２膜１２が露出するまで全面
エツチングした。このエツチングにより、開孔部１３の
みが単結晶８１層１４′で完全に埋込まれ、且つ表面全
体が平坦化されたものとなる。Next, as shown in FIG. 1(C), 5i11 was single-crystalized.
A resist 15 was applied onto 4', and its surface was flattened. Subsequently, a resist 15 and a single crystal 8 are formed by the CDE method.
Under conditions where the etching rate of the first layer 14' is approximately the same,
As shown in FIG. 1(d), resist 15 and single crystal 5i1
14' was etched over the entire surface until the SiO2 film 12 was exposed. By this etching, only the opening 13 is completely filled with the single crystal 81 layer 14', and the entire surface is flattened.
次いで、第１図（ｅ）に示す如く全面に再び多結晶５ｉ
ｌｌ！＜第２の半導体＠膜）１６をこの多結晶Ｓｉ膜１
６を再びビームアニールにより単結晶化し、第１図（ｆ
）に示す如く単結晶３ｉ層１６′を形成した。Next, as shown in FIG. 1(e), polycrystalline 5i is applied again to the entire surface.
ll! <Second semiconductor@film) 16 to this polycrystalline Si film 1
6 was again made into a single crystal by beam annealing, and as shown in Fig. 1 (f
) A single crystal 3i layer 16' was formed as shown in FIG.
以上の結果、厚さ１［μｍ］のＳｉＯ２膜１２上に、下
地８１基板１１の面方位（１００）を保存した良質の単
結晶層１６′が平坦に形成された。As a result, a high-quality single crystal layer 16' that preserved the plane orientation (100) of the base 81 and the substrate 11 was formed flat on the SiO2 film 12 with a thickness of 1 [μm].
また、本発明者等の実験によれば、電子線回折法を用い
て単結晶３ｉ層１６′の結晶性を評価したところ、鋭い
菊池線が観測された。Furthermore, according to experiments conducted by the present inventors, sharp Kikuchi lines were observed when the crystallinity of the single crystal 3i layer 16' was evaluated using electron beam diffraction.
かくして本実施例方法によれば、ＳｉＯ２膜１２上に良
質の単結晶５ｉ）ｉ！１６’ を形成することができ、
且つこのＳｉ層１６′を極めて平坦性良く形成すること
ができる。このため、Ｓｉ層１り′上に形成する素子の
特性及び信頼性の大幅な向上をはかり得、将来の高密度
・高精密素子にも十分対処することができる。Thus, according to the method of this embodiment, a high quality single crystal 5i)i! is formed on the SiO2 film 12. 16' can be formed,
Moreover, this Si layer 16' can be formed with extremely good flatness. Therefore, it is possible to significantly improve the characteristics and reliability of the device formed on the Si layer 1', and it is possible to sufficiently cope with future high-density, high-precision devices.
なお、本発明は上述した実施例方法に限定されるもので
はない。前記実施例では第１の半導体薄膜を単結晶化し
たのち絶縁膜上の薄膜を除去したが、この順序を逆にす
ることも可能である。つまり、前記第１図（ｂ）に示す
工程の後、Ｓ ｉ ０２膜１２上の第１の多結晶Ｓｉ膜
１４を除去すると共に、開孔部１３内の多結晶５ｉｌｌ
ｌ１４の表面を平坦化し、しかるのち開孔部１３内の多
結晶３ｉ膜１４をビームアニールにより単結晶化するよ
うにしてもよい。Note that the present invention is not limited to the method of the embodiment described above. In the embodiment described above, the thin film on the insulating film was removed after the first semiconductor thin film was made into a single crystal, but this order can also be reversed. That is, after the step shown in FIG.
The surface of 114 may be flattened, and then the polycrystalline 3i film 14 within the opening 13 may be made into a single crystal by beam annealing.
また、前記半導体薄膜としては多結晶Ｓｉに限らず、非
晶質Ｓ１を用いることも可能である。さらに、３ｉ以外
の半導体薄膜を用いることも可能である。また、下地半
導体基板の面方位は（１００）に限るものではなく、（
１１０）。Further, the semiconductor thin film is not limited to polycrystalline Si, but amorphous S1 can also be used. Furthermore, it is also possible to use semiconductor thin films other than 3i. Further, the plane orientation of the underlying semiconductor substrate is not limited to (100), but (
110).
（１１１）面でも同様に良好な結果が得られることを確
認している。さらに、基板の代りに、本発明方法により
形成した単結晶層を用いることも可能である。また、ビ
ームアニールする手段としては、電子ビームの代りにレ
ーザビームを用いることも可能である。その他、本発明
の要旨を逸脱しない範囲で、種々変形して実施すること
ができる。It has been confirmed that similarly good results can be obtained with the (111) plane. Furthermore, instead of the substrate, it is also possible to use a single crystal layer formed by the method of the present invention. Further, as a means for beam annealing, it is also possible to use a laser beam instead of an electron beam. In addition, various modifications can be made without departing from the gist of the present invention.
第１図（ａ）〜（ｆ）は本発明の一実施例方法に係わる
半導体単結晶層の製造工程を示す断面図、第２図は従来
方法の問題点を説明するための断面図である。
１１・・・単結晶３ｉ基板、１２・・・５１０２Ｍ！（
絶縁１）、１３・・・開孔部（シード部）、１４・・・
多結晶Ｓｉ膜（第１の半導体薄膜＞、１４’ 、１６’
・・・単結晶３ｉ層、１５・・・レジスト、１６・・・
多結晶Ｓｉ膜（第２の半導体薄膜）。
出願人 工業技術院長 等々力 達
第１図FIGS. 1(a) to (f) are cross-sectional views showing the manufacturing process of a semiconductor single crystal layer according to an embodiment of the present invention, and FIG. 2 is a cross-sectional view for explaining the problems of the conventional method. . 11...Single crystal 3i substrate, 12...5102M! (
Insulation 1), 13...opening part (seed part), 14...
Polycrystalline Si film (first semiconductor thin film>, 14', 16'
...Single crystal 3i layer, 15...Resist, 16...
Polycrystalline Si film (second semiconductor thin film). Applicant Todoroki Director General of the Agency of Industrial Science and Technology Figure 1
Claims (5)
孔部を単結晶成長のシードとして用い、この絶縁膜上に
半導体単結晶層を成長形成する半導体単結晶層の製造方
法において、前記絶縁膜の開孔部に多結晶若しくは非晶
質の第１の半導体薄膜を埋込み形成し、且つこの薄膜を
ビームアニールにより単結晶する工程と、次いで全面に
多結晶若しくは非晶質の第２の半導体薄膜を形成する工
程と、次いでこの第２の半導体薄膜をビームアニールに
より単結晶化する工程とを含むことを特徴とする半導体
単結晶層の製造方法。(1) In a method for manufacturing a semiconductor single crystal layer in which a semiconductor single crystal layer is grown on the insulating film using an opening provided in a part of the insulating film reaching the underlying single crystal as a seed for single crystal growth. , embedding a polycrystalline or amorphous first semiconductor thin film in the opening of the insulating film, and converting this thin film into a single crystal by beam annealing; 1. A method for manufacturing a semiconductor single-crystal layer, comprising the steps of forming a second semiconductor thin film, and then single-crystallizing the second semiconductor thin film by beam annealing.
単結晶化する工程として、全面に多結晶若しくは非晶質
の第１の半導体薄膜を形成したのち、この第１の半導体
薄膜をビームアニールにより単結晶化し、次いで前記絶
縁膜上の薄膜を除去すると共に開孔部内の薄膜の表面を
平坦化することを特徴とする特許請求の範囲第１項記載
の半導体単結晶層の製造方法。(2) In the step of burying the first semiconductor thin film in the opening of the insulating film and converting it into a single crystal, after forming a polycrystalline or amorphous first semiconductor thin film on the entire surface, the first semiconductor thin film is The manufacturing method of the semiconductor single crystal layer according to claim 1, characterized in that the semiconductor single crystal layer is made into a single crystal by beam annealing, and then the thin film on the insulating film is removed and the surface of the thin film inside the opening is flattened. Method.
単結晶化する工程として、全面に多結晶若しくは非晶質
の第１の半導体薄膜を形成したのち、前記絶縁膜上の薄
膜を除去すると共に開孔部内の薄膜の表面を平坦化し、
次いで開孔部内の薄膜をビームアニールにより単結晶化
することを特徴とする特許請求の範囲第１項記載の半導
体単結晶層の製造方法。(3) As a step of burying a first semiconductor thin film in the opening of the insulating film and converting it into a single crystal, after forming a polycrystalline or amorphous first semiconductor thin film on the entire surface, a thin film on the insulating film is formed. and flatten the surface of the thin film within the opening.
2. The method of manufacturing a semiconductor single crystal layer according to claim 1, wherein the thin film within the opening is then single crystallized by beam annealing.
いは電子ビームを用いたことを特徴とする特許請求の範
囲第１項記載の半導体単結晶層の製造方法。(4) The method for manufacturing a semiconductor single crystal layer according to claim 1, wherein a laser beam or an electron beam is used in the beam annealing step.
を用いたことを特徴とする特許請求の範囲第１項記載の
半導体単結晶層の製造方法。(5) The method for manufacturing a semiconductor single crystal layer according to claim 1, wherein silicon is used as the first and second semiconductor thin films.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22033185A JPS6281017A (en) | 1985-10-04 | 1985-10-04 | Manufacture of semiconductor single crystal layer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22033185A JPS6281017A (en) | 1985-10-04 | 1985-10-04 | Manufacture of semiconductor single crystal layer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6281017A true JPS6281017A (en) | 1987-04-14 |
Family
ID=16749469
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP22033185A Pending JPS6281017A (en) | 1985-10-04 | 1985-10-04 | Manufacture of semiconductor single crystal layer |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6281017A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5972105A (en) * | 1994-09-15 | 1999-10-26 | Semiconductor Energy Laboratory Co., Ltd. | Method of fabricating semiconductor device |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60152018A (en) * | 1984-01-20 | 1985-08-10 | Agency Of Ind Science & Technol | Manufacture of semiconductor thin film crystal layer |
-
1985
- 1985-10-04 JP JP22033185A patent/JPS6281017A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60152018A (en) * | 1984-01-20 | 1985-08-10 | Agency Of Ind Science & Technol | Manufacture of semiconductor thin film crystal layer |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5972105A (en) * | 1994-09-15 | 1999-10-26 | Semiconductor Energy Laboratory Co., Ltd. | Method of fabricating semiconductor device |
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