JPS6281173A - Blanking circuit for display devices - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention J] The present invention relates to improvements in blanking circuits for display devices such as television receivers.

[Background of the Invention J] FIG. 3 is an operational waveform diagram of various signals related to such a conventional blanking circuit.

As shown in the figure, conventionally, three horizontal blanking signals used in a blanking circuit and two flyback pulses generated in a horizontal output circuit are sliced and used. However, in this method, since there is an inclination in the rising and falling portions of the pulse, the planking is insufficient as shown in 5, and the image appears folded at the rising and falling portions of the horizontal deflection 'iIt flow 4.

In addition, as a document related to this technology, Japanese Patent Publication No. 45-1
No. 5295 can be mentioned.

[Purpose of the invention]

An object of the present invention is to correct the lack of blanking at the right edge of the screen and to provide a suitable horizontal m-line blanking circuit (blanking circuit).
Our goal is to provide the following.

[Summary of the Invention j In the present invention, in addition to the PLL circuit for the horizontal deflection circuit, a second PLL circuit is used for generating horizontal blanking pulses.
(The input signal is a horizontal synchronization signal or horizontal flyback pulse).

By using the second PLL circuit and the monomultiplier to create a blanking signal with a width wider than the blanking period of the video signal and supplying it to the horizontal blanking circuit, it is possible to eliminate the blanking shortage.

[Embodiments of the invention]

FIG. 1 is a block diagram showing one embodiment of the present invention. In the figure, 1) is a video signal input terminal.

17 is a synchronous separation circuit, 18 is a phase detector, 19 is a filter, 20 is a voltage controlled oscillator (VCO), 21 is a monomulti, 22 is an integrator, 23 is a blanking signal output terminal,
24 and 25 are the oscillation frequency of the voltage controlled oscillator 20, a capacitor for determining the time constant, and a resistor.

26 is a power supply terminal.

Further, FIG. 2 shows voltage waveforms at various parts in FIG. 1.

In FIG. 1, by changing the resistor 25 and lowering the oscillation frequency of the VCO 20 within the pull-in range of the PLL, the horizontal synchronizing signal 27 has a waveform similar to that of the VCO output voltage 28.
The phase can be advanced further.

The pulse width of the output of the fiVcO 20 can be widened like the horizontal blanking signal 23 by the 10,000-mono multi 21.

With the above circuit configuration, it is possible to freely create a horizontal blanking signal within the PLL pull-in frequency range, and it is possible to obtain a signal with no rounding at the rising edge and falling edge. Therefore, the problem of conventional horizontal planking failures can be avoided. In addition, in FIG. 1, input signal 2 of the PLL circuit
A similar effect can be obtained by supplying a horizontal flyback pulse signal as 7.

[Effects of the Invention j According to the present invention, it is possible to obtain a waveform with a steep rise as a horizontal blanking signal, and it is possible to obtain a waveform with a steep rise.

It becomes possible to improve planking defects at the right end.

This improvement allows for smaller plaster sizes and allows for more information to be displayed on the CRT.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a voltage waveform diagram of each part of FIG. 1, and FIG. 3 is a diagram of various signal waveforms related to a conventional blanking circuit. Explanation of symbols 17... Synchronization separation circuit, 18... Phase detector,
19... Filter, 20... VCOl 21
...Monomulti, 22...12 factors of first arrangement of integrator ''

Claims (1)

[Claims] 1) In a blanking circuit for a display device that outputs a horizontal blanking signal by using a horizontal flyback pulse or a horizontal synchronization signal extracted from a video signal as an input signal, a voltage controlled oscillator (hereinafter referred to as a VCO) is provided. a mono-multi vibrator circuit (hereinafter abbreviated as "mono-multi") which inputs the oscillation output from the oscillator; an integrating circuit that integrates and outputs the output from the mono-multi vibrator; A circuit that detects a phase difference by performing a phase comparison with a horizontal flyback pulse or a horizontal synchronization signal as an input signal, and inputting the phase difference signal to the VCO,
A PLL (face locked loop) circuit comprising means for locking the phase of the input signal and the phase of the mono multi output, and the mono multi output is used as the horizontal blanking signal. Features a blanking circuit for display devices. 2) In the blanking circuit for a display device according to claim 1, the set point of the free oscillation frequency of the VCO is such that the rising edge of the VCO output is the falling edge of the blanking period of the video signal (blanking The time constant of the monomulti is set so that the fall of the output of the monomulti is after the rise of the blanking period of the video signal (the end point of blanking). A blanking circuit for a display device, characterized in that the circuit is set.