JPS6282797A - Time base control circuit for video signal reproduction - Google Patents

Abstract

PURPOSE:To detect a correct phase error by switching a positive clock and an opposite phase clock of a fixed clock and controlling a time base varying circuit interposed in a video signal path in accordance with a difference signal of a color burst signal in the phase error corrected video signals. CONSTITUTION:According to phase difference between a color burst signal in composite video signals and reference clocks phi, -phi, a feed back loop is constituted so as to control a delay time of a color TBC 6, control these phase difference to go to zero and the phase difference of the video signal is corrected. In this case, a positive phase clock phi, an opposite phase clock -phi are respectively compared with the color burst signal, phase errors are detected and difference signal v1, v2 of these two phase errors is taken, so that a drift due to a change of the temperature or the secular change is cancelled. Thereby a correct phase error can be detected.

Description

[Detailed Description of the Invention] [Industrial Field of Application] The present invention is applicable to the reproduction of video signals by a video disc player, etc.
The present invention relates to a time axis control circuit for correcting and obtaining both images without color unevenness.

[Conventional technology]

In a video disc player, if a picture signal contains a thick picture, color irregularities such as r;QW occur. For this reason, in video disc players, large jitters are removed by disk rotation servo, and small jitters are removed by tangential servo of the pickup head. However, it still cannot completely eliminate phase errors (minor jitter) that fluctuate at high frequencies. Therefore, a variable H extension circuit was inserted into the 11 video signal redundant circuits, and 3.
588117 color burst signal and 3.58HII
It is common practice to compare the phases of the crystal oscillation clocks of Z and detect the phase error of the color burst signal, and then control the delay time of the variable delay circuit to remove the phase error. . However, conventional phase error detection cannot be accurately detected due to drift caused by temperature, aging, etc., and it has not been possible to completely eliminate phase errors.

[Problem that the invention seeks to solve]

The present invention aims to solve the problems in the conventional technology and provide a time axis control circuit for video signal reproduction that eliminates the influence of drift and enables accurate detection of phase errors. It is something.

[Means for solving problems]

The present invention generates a regular phase clock and a negative phase clock of constant clocks corresponding to the subcategory of a color burst, and switches the color burst signal in a video signal after phase error correction processing using these two clocks, respectively. The difference signal between these two switching outputs is detected, and the time axis variable circuit inserted in the video signal path is controlled according to this difference signal to correct the phase error in the video signal. This is how it was done.

[Function] According to the solving means of the present invention, since the phase error is extracted by the differential configuration, the influence of temperature and aging can be eliminated.

(Example) An embodiment of this invention is shown in FIG.

J3 in Figure 1, the raw signal played from the disk is sent to the main TBC (Till1e Ba5e Cor
recter ) 1, and a large sick in the disc playback signal is corrected. The thick correction here is T
The BG control circuit 2 extracts a horizontal synchronizing signal from the output signal of the main TBC 1, compares the phase with the reference clock φh based on the crystal oscillation clock, and adjusts the time axis of the disc playback signal according to the phase error. It is performed by performing the 11th Sutra.

The main TBC1 is composed of, for example, a continuously variable analog delay circuit. As the continuously variable analog delay circuit, for example, a CMOS inverter can be used.

As shown in FIG. 2, the CMOS inverter has a p-channel MO3-FET 12 and an n-channel MO8-FET 14, the gates of which are connected together, the drains of which are connected to each other, and the sources connected to a power supply voltage V. , V88 are respectively applied, a signal is input to the gate via the input terminal 13, and an inverted signal of the input signal is taken out from the drain to the output terminal 15.

In this CMOS inverter 10, a delay time occurs between the input and the output. As shown in FIG. 3, this delay time is 1. Power supply voltage V. 0-depends on VSS, supply voltage v
The smaller the DD-V8s, the larger the delay time and the larger the rate of change. This is because the conductance of the element changes depending on the power supply/voltage vI)D-VSS. Therefore, by utilizing this property, the power supply voltage V. o-Vss
Depending on the size of the delay time, it is possible to control the delay time to any desired value.

When the main TBCI is configured by the CMOS inverter 10, the horizontal synchronizing signal in the disk reproduction signal and the phase of the reference clock φh are detected, and the power supply voltage VDD-V33 of the CMOS inverter 10 is controlled accordingly.

In addition, when a long delay time is required, as shown in FIG. 4, CMOS inverters 10 are connected in multiple stages and used.

In Fig. 1, the disc playback signal that has undergone rough jitter correction (time correction in units of horizontal scanning period) with the main TBCI is processed into a color TBC 6 after the video signal component is extracted with an 8PF (band pass filter) 4. is entered,
Precise jitter correction (ie phase error correction) is performed using the color burst signal. Like the main TBC1, the color TB06 can also be configured with a variable delay circuit using a CMOS inverter. The phase error is h[i
The corrected video signal component t is detected by the FM detection circuit 8 and outputted via the t-crotch LPF (low-pass filter) 16.

The FM detection circuit 18 performs FM detection on the reproduced video signal component to create a composite video (No. 9).
20, the signal is input to a synchronization separation circuit 22, where the synchronization signal is separated. The horizontal synchronization detection circuit 24 detects a horizontal same-bright signal from among the synchronization signals, and outputs a color burst timing signal @C[3TM- Ru.

The color book carrier BPF 26 converts the composite video signal into 3.
58Ht (extract Z color subcarrier.

The oscillation circuit 28 generates a crystal oscillation clock, which is divided by the frequency divider 30 to create a 3.58 Hz reference clock.

Color burst extraction timing generation circuit 32 is 3.58
A positive phase clock φ and an inverted phase clock φ are generated as a Hz reference clock, and the horizontal synchronization detection circuit 2
These reference clocks φ and φ are outputted using the color burst timing signal CBTM which is output from 4 at the timing of the color burst signal.

The color burst error output circuit 34 compares the phases of the color burst signal output from the color subcarrier BPF 26 and the reference clocks φ and φ, respectively, and outputs signals V 1 and C 2 according to the phase difference, respectively.

The color TBC control circuit 36 generates a difference signal V between two phase difference signals V and V2. b is extracted and this difference signal ■. ,
The delay time of the color TBC 6 is controlled accordingly.

In this way, the circuit shown in FIG. 1 uses the phase difference between the color burst signal in the composite video signal and the reference clock φ, φ to
A feedback loop is configured to control the delay time of the color TBC 6, and the phase difference between them is controlled to be O, thereby correcting the phase error of the C1 video signal.

In this case, the positive-phase clock φ, the negative-phase clock φ, and the color burst signal are each compared to detect the phase error, and the difference between these two errors p; V 1°C2 is taken. , the drifts 1~ due to temperature and aging are canceled out, making it possible to accurately detect phase errors. Therefore, since the delay time of color plate BC6 is controlled by this phase error, video No. 13 without phase error is 1!
′? can be done.

A specific example of the circuit shown in FIG. 1 is shown in FIG. In FIG. 5, the color subcarrier BPF26 has condensers C1, C
2. It is composed of a coil Ll and a resistor R1, and extracts a color burst signal from a composite video signal. The color burst signal is input to the color burst error detection circuit 34 via a buffer circuit 42 composed of inverters 38, 40 and 42.

The color burst extraction timing generation circuit 32 has a V of <3.588H2 and a quasi-clock φ based on the water supply output.
3, and outputs a positive phase clock φ and a negative phase clock φ. Time base collect on signal nTBcON (signal that goes '1°' when commanding time base collect operation) and color burst timing signal MCBTM (signal that goes 1'' at the timing of the color burst signal in the horizontal scanning period) are both "1", the NQ clock φ is outputted via the AND circuit 46, and this is converted into the two-phase clock φ1. The register 48 driven by φ2 extends the signal by 1 bit d and outputs it as a positive phase clock φ. In addition, when the time base correct]-on signal gT[3cON and the color burst timing signal CBTM are both at "1", a signal obtained by inverting the reference clock φ3 by the inverter 50 is outputted via the AND circuit 52, and this is delayed by 1 bit by a register 54 driven by two-phase clocks φ1 and φ2, and the output is reversed as the reverse phase I cock φ.

Color burst error detection circuit 34 consists of a pair of analog switches 56,58. The analog switch 56 inputs the color burst signal output from the buffer circuit 44 and turns on/off the J: ligate based on the positive phase clock φ. As a result, from the analog switch 56, a 180° section of the color burst signal corresponding to the phase shift between the color burst signal and the reference clock φ3 is extracted as a phase error signal 1 for each cycle.

Further, the analog switch 58 inputs the color burst signal, and the analog switch 58 receives the color burst signal and receives the reverse phase clock φ.
Turn the gate on and off in reverse phase with 6.

As a result, the analog switch 58 outputs the remaining color burst signal extracted by the analog switch 56.
An 80° section is extracted as a phase difference signal (2) for each cycle.

The color TBC control circuit 36 smoothes the output signals V and V2 of the above-mentioned AB log switches 56 and 58 with capacitors C3 and C4, and converts the voltages v1 and V2 into the bare F.
Apply to Goo 1- of ET60.62, respectively. The output of FET60.62 is then input to the subtracter 64,
Their differential voltage V. b is 17. This differential voltage V. b
is the control DI voltage of the color TBC 6 (see Figures 2 and 4).
When configured with a variable delay circuit using CMOS inverter 0 as shown in the figure, the voltage is ■. o'ss), and the delay time of the C1 color TBC 6 is controlled in such a direction that the phase difference between the color burst signal and the reference clock φ3 is eliminated, thereby performing phase error correction.

According to this 4-unit configuration, analog switch 56.
58 and FETs 60 and 62 have the same performance, the differential output V. The drift component is canceled by b, and only the phase error component is added and output.

FIG. 6 shows the phase error detection operation by the circuit of FIG. 5. The phase difference between the color burst signal and the positive phase clock φ is the phase error of the color burst signal, and the analog switch 56 driven by the positive phase clock φ outputs a 180° section of the color burst signal according to this phase error. is extracted for each cycle. Further, from the analog switch 58 driven by the reverse phase clock φ, the remaining 180° section of the color burst signal corresponding to this phase error is extracted every cycle.

The output signal of analog switch 56.58 is connected to capacitor C.
The voltages V and V2 smoothed by 1q with 3 and C4 are as follows:
Since Vl--V2, the output Vcb of the subtracter 64 becomes Vob-Vl-v2 =2V1=-2V2.

Also, when drift △V is added, V ob = (V 1 + △V) - (V, +
ΔV)=v1−v2+<ΔV−ΔV)=2V1−−2V2, and the drift 1 to minutes are xenceled.

Note that the output voltage V of the subtracter 64. b changes depending on the phase difference between the color burst signal and the clocks φ and φ. For example, when the phase difference between the color burst signal and the positive phase clock φ is in the same state as shown in FIG. Ru. Furthermore, when the phase difference is (B), the voltage is V. b is maximum in the child direction. Further, the voltage when the phase difference is (C) is V. b is maximum in the ~ direction.

〔Effect of the invention〕

As explained above, according to the present invention, the differential configuration extracts the phase difference in the video signal, so accurate detection can be performed without the effects of temperature and aging.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention. FIG. 2 is a circuit diagram showing a CMOS inverter. FIG. 3 is a characteristic diagram showing the power supply voltage-delay time characteristics of the CMOS inverter of FIG. 2. FIG. 4 is a circuit diagram showing the main TBC 1 of FIG. 1 configured by connecting CMOS inverters in multiple stages. FIG. 5 is a circuit diagram showing a specific example of the circuit shown in FIG. 1. FIG. 6 is a waveform diagram showing the phase error detection operation by the circuit of FIG. 5. FIG. 7 is a waveform diagram showing various phase shift states of the color burst Shingetsu and the positive phase []tsukφ. 56.58...Analog switch, 6/I...Subtractor. (1 idiot) Figure 7

Claims (1)

[Scope of Claims] A color burst signal extraction circuit that extracts a color burst signal from a video signal, a circuit that generates a constant clock corresponding to a subcarrier of the color burst signal, and a circuit that generates a clock that is in opposite phase to the clock. a switching circuit that switches the color burst signal using the one clock; a switching circuit that switches the color burst signal using the other clock; and a circuit that detects a difference signal between the outputs of both switching circuits. a time axis variable circuit inserted in the path of the video signal; and controlling the time axis variable circuit according to the difference signal,
A time axis control circuit for reproducing a video signal, comprising: a control circuit that corrects a phase error of the video signal, and an output video signal of the control circuit is used as an input signal of the color burst signal extraction circuit.