JPS6282814A - Interruption circuit - Google Patents

Abstract

PURPOSE:To reduce the load of software to be used for interruption processing by forming a level detecting circuit for detecting a level signal, a time setting circuit for setting up the detecting time of the detecting circuit to various lengths and a trigger circuit for outputting an interruption signal. CONSTITUTION:When the state of an input terminal 4 is a high level, the high level state is detected and all the contents of shift registers 5 of (n) stages are previously set up to high level output state, so that only the output of the shift register in the final stage becomes the high level after passage of (n-1)X(t)hr. Thereby, the output of a NAND circuit in the trigger circuit 1 is turned from the high level to the low level at the passage of (n-1)X(t)hr. When a clock signal is inputted, the output of the shift register in the final stage is turned from the high level to the low level, so that the output of the trigger circuit 1 is turned to the high level independently of the state of the input terminal 4. The output of the trigger circuit 1, i.e. an interruption signal is detected by a CPU to control the flow of a program.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to interrupt circuits.

[Conventional technology]

Conventionally, the function of an interrupt circuit in a micro combinator is called an edge-triggered interrupt function, and the interrupt function is activated at the rising or falling edge of a signal applied from the outside.

At this time, the program flow interrupts the main operation and forcibly jumps to a specific address. Therefore, a program for processing interrupt signals is installed at this specific address. In other words, the interrupt circuit function has a higher priority than the normal main work, and is generally used for processing work such as pulse signals that are input at unspecified times and whose signal level is not fixed.

Examples of such types of signals include remote control signals and pulse signals generated when a motor of a VTR, audio cassette deck, etc. rotates.

[Problem that the invention seeks to solve]

As mentioned above, when a remote control signal, particularly an infrared remote control signal, is taken in by the function of the conventional edge (IJ) type interrupt circuit, the following drawbacks occur.

The transmission signal of an infrared remote control in a remote control system is usually a weak signal received by the decoder side of the main body that performs the remote control.

Therefore, a sophisticated amplifier is required to amplify the transmitted signal and bring it to the signal level of the microcomputer that performs the decoding function, and the output of the amplifier is connected to the interrupt terminal of the microcomputer. Since this amplifier needs to receive weak signals, it is required to have a very high degree of amplification. It also responds to random noises emitted by fluorescent lamps, etc., and the noises are also input to the interrupt terminal.

Conventional edge-triggered interrupt circuits respond to such noise, often causing unnecessary interruptions to the main program flow. Therefore, when executing a program, it is necessary to constantly manage time and judge whether it is noise or a real remote control signal. If a noise is input to the virtual machine and the program detects it, it will determine that it is noise, abandon the remote meeting control signal, and return to the main flow to the friend. If a dynamic display whose time is managed by the program is being executed in the flow of the main program, noise is input to the input terminal, and the display time management is interrupted until it is determined to be noise. be done.

As a result, the display screen flickers and becomes unsightly. Furthermore, even if the real remote control signal is manually input, with a conventional edge-trigger type interrupt circuit, the program is always programmed from the time the start pulse of the remote Φ control signal is input until the end pulse is input. It is necessary to perform time management and decipher the data of the remote control signal, and at this time, flickering of the display and the like occur as well.

-ffic, ff- (Black computers not only handle display time management but also remote control signals, etc.) There are many demands for other processing to be performed in parallel while processing interrupt signals. In such a case, with the conventional interrupt circuit method, the program becomes more complicated and the burden on the software increases. In extreme cases, it is often impossible to achieve the required specifications.

An object of the present invention is to provide an interrupt circuit that can reduce the burden on software used for interrupt processing.

[Means for solving problems]

The interrupt circuit of the present invention includes a level detection circuit that continuously detects a high or low level signal, a time setting circuit that can set the detection time of the level detection circuit to various lengths according to a program instruction, and a time setting circuit that can set the detection time of the level detection circuit to various lengths according to a program instruction. and a trigger circuit that outputs an interrupt signal when a continuous high or low level signal is input to the level detection circuit during the set detection time.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention.

As shown in FIG. 1, the interrupt circuit of this embodiment includes a level detection circuit 2 that detects a continuous high or low level signal, and a program instruction that sets the detection time of the level detection circuit 2 to various lengths. and a trigger circuit 1 that outputs an interrupt signal when a continuous high or low level signal is input to the level detection circuit 2 during a detection time set (by a program instruction). Consists of.

FIG. 2 is a detailed circuit diagram of the interrupt circuit shown in FIG. 1.

As shown in FIG.
Outputs an interrupt signal to. The level detection circuit 2 is composed of an n-stage shift register 5 and a NOR circuit 6. The input of the shift register 50 is connected to the input terminal 4, and the output is connected to one input of the trigger circuit 1. In addition, trigger circuit 1
The other input of the NOR circuit 6 is connected to the output of the NOR circuit 6.
The n-1 inputs of the circuit 6 are connected to the outputs of each of the n-1 stage shift registers 5 excluding the final stage. Its opening and closing are controlled by the eta's program instructions.

FIG. 3 is a waveform diagram of input and output signals for explaining the operation of the interrupt circuit shown in FIG. 2.

Next, the operation of the interrupt circuit shown in FIG. 2 will be explained with reference to FIG.

First, the open/close states of n-1 switches of the time setting circuit 3 are set by a program command. When all n-1 switches are set to open, the time Tn set by the time setting circuit 3 is expressed by the following equation.

Tn=(n-1)xt Here, n means the number of stages of the shift register 5, and t means the period of the clock signal of the shift register. The number of stages of foot registers is determined by the pick-up time setting circuit 3.

The external signal input to the input terminal 4 is sequentially transmitted to each stage of the shift register every hour, and reaches the input of the trigger circuit 1 after nXt time. At this time, if the low level signal continues at the input terminal 4 during the (n-1) The output will be at a high level.

When the state of the input terminal 4 is at a high level, if this state B't- is detected and all the contents of the n-stage shift register 5 are reset to the high level output state in advance, the above (n-1
) After Xt time elapses, only the output of the final stage shift register becomes high level.
The output of the AND circuit changes from a high level to a low level after a time period of (ni)xt has elapsed. Furthermore, when one clock signal is input, the output of the final stage shift register changes from high level to low level, so the input terminal 4
Regardless of the state of the trigger circuit 1, the output of the trigger circuit 1 is at a high level. At this time, the CPU of the microcomputer detects the output of the trigger circuit (i.e., the interrupt signal) and controls the flow of the program.

As explained above, an interrupt signal can be generated to the CPU only when a continuous low level is input to the input terminal 4 during the detection time set by the command of the program.

If a high level signal is input during the (n-1)xt waiting time, the output of the first stage of the shift register 5 will be at a high level, the set time will be cleared at this point, and the signal will be input to the input terminal 4. The set time count '2' starts again from the time when the signal changes from high level to low level.

Therefore, if the signal is such as noise that randomly continues high and low levels, no interrupt signal will be output.

Next, when p switches are opened in the time setting circuit 3, the set time Tp becomes Tp=(p-1)t, and an interrupt signal is sent when (p-1)xt time elapses, as described above. changes from high to low and changes to high again at time t after the next clock, pXt time has elapsed.

If the generation of the clock signal for the shift register 5 is started when the state of the input terminal 4 changes from high to low, the external device that supplies the signal to the input terminal 4 will malfunction, and the signal will always be at a low level (high level). Even if a signal with no level exists is output, an interrupt signal will not be generated and the interrupt operation will be performed correctly.

The above-mentioned malfunctions occur when the external device is powered off.

Mayu, shift register 5 at the moment the interrupt signal is generated.
If the clock generation is stopped, no interrupt signal will be generated even if interrupt reception is set to be enabled when low-level signals are continuously input to input terminal 4, and only the desired signal will be generated. can be received correctly.

Although the time setting circuit 3 sets the detection time length to various values by changing the number of stages of the shift register 5 in FIG. The length of the detection time can be set to various values.

In addition, in Figure 2, all interrupt signals are generated in response to a continuous low level signal, but if an inverter circuit is connected to the output of each stage of the shift register to invert and take out the nine outputs, the continuous high level signal can be generated. All interrupt signals can be generated for each signal.

〔Effect of the invention〕

As explained above, the present invention includes a level detection circuit that continuously detects a high or low level, a time setting circuit that can set the detection time of the level detection circuit to a length of 7 according to a program instruction, and an interrupt signal. When receiving all infrared remote control signals, etc., the interrupt circuit consists of a trigger circuit that outputs, and does not operate due to noise from fluorescent lights, etc., and an interrupt signal is generated only when the correct remote control signal is input. Therefore, the burden on the software of the microcomputer can be reduced and high quality software can be obtained.

In addition, by making it possible to set the detection time of the level detection circuit to various lengths using program commands, 1 it is possible to support all types of remote control with different formats, and the time can always be managed by the program. There is no need to receive remote control signals. Therefore, other operations can be processed in parallel during this time, and an effect equivalent to increasing the instruction speed of a microcomputer can be obtained.

Furthermore, if the interrupt circuit of the present invention is used for applications that measure not only remote control signals but also the rotational speed of motors such as S VTRs and audio cassette decks using pulses generated by rotational operations, software This has the effect of reducing the burden on

[Brief explanation of drawings]

Fig. 1 is a block diagram showing an embodiment of the present invention, Fig. 2 is a detailed circuit diagram of the interrupt circuit shown in Fig. 1, and Fig. 3 is a diagram explaining the operation of the interrupt circuit shown in Fig. 2. FIG. 3 is a waveform diagram of input and output signals. 1...Trigger circuit, 2...Level detection circuit, 3...Time setting circuit, 4...Input terminal, 5...Shift Register, 6...
・NOR circuit, 7... Output terminal.

Claims (1)

[Claims] a level detection circuit that detects a continuous high or low level signal; a time setting circuit that can set the detection time of the level detection circuit to various lengths according to a program instruction; and a time setting circuit that can set the detection time of the level detection circuit to various lengths according to a program instruction; and a trigger circuit that outputs an interrupt signal when a continuous high or low level signal is input to the level detection circuit.