JPS6282818A - Loop filter - Google Patents

Abstract

PURPOSE:To obtain a loop filter having a quick leading-in time and appropriate for MIS by forming a level deciding circuit for deciding a voltage level and a voltage limitter consisting of switches to be controlled by an output signal of the level deciding circuit. CONSTITUTION:In the output voltage V1 of a reference voltage source 20 and the decision level V2 of the level deciding circuit 21, V1>V2 is formed. The deciding circuit 21 turns on a switch if an input is <=V2, or turns off the switch 22 if the input is >=V2. If a synchronizing signal is not inputted when such a kind of loop filter is used for a phase synchronizing circuit, the loop controls switches so that the switches 11, 13 are turned off and the switches 12, 14 are turned on. Consequently, the output of the loop filter is gradually reduced, and when the output voltage is reduced less than V2, the switch 22 is turned on and a capacitor 19 is charged from the reference voltage source 20 and boosted up to the voltage V1. Thereby, the lower limit of the loop filter output is limitted as V2. When a synchronizing input signal is inputted again, the output of the loop filter is quickly reached to a required potential and synchronized with the input signal.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a loop filter used in a phase locked loop (PLL). In particular, the present invention relates to a loop filter suitable for a phase-locked circuit configured as an MIS integrated circuit.

〔overview〕

The present invention provides a loop filter used for the output of a phase comparator of a phase-locked circuit (PLL), which is provided with a level judgment circuit for judging a voltage level and a voltage limiter consisting of a switch controlled by the output signal of this level judgment circuit. This provides a loop filter that has a short pull-in time and is suitable for <Mis conversion.

[Conventional technology]

FIG. 3 is a configuration diagram of the phase locked circuit. phase comparator 1,
This is a frequency negative feedback circuit in which a loop filter 2, a voltage controlled oscillator 3, and a frequency divider are connected in a loop. Frequency divider 4
operates so that the frequency and phase of its output match that of the input signal. The phase comparator 1 detects the error between the frequency phase of the output of the frequency divider 4 and the frequency/phase of the input signal, and
Generates P signal and DOWN signal. This UP signal is a signal whose pulse width changes depending on the phase delay of the frequency divider output pulse with respect to the input pulse.
The WN signal is a signal whose pulse width changes depending on the phase advance of the frequency divider output pulse with respect to the input pulse. A filter with low-pass characteristics is used as the loop filter 2, and has the function of removing high frequency components output from the phase comparator 1 and improving the noise suppression characteristics of the phase locked circuit. In the voltage controlled oscillator 3, the loop filter output voltage causes, for example,
The voltage-current conversion circuit is driven to cause current to flow through the integrating capacitor 19. By changing the direction of the current flowing through the integration capacitor 19 using a switch circuit, the integration capacitor is charged and discharged, thereby generating a sawtooth wave with a frequency proportional to the loop filter output voltage. The output of the latch circuit, which is inverted depending on the level of this sawtooth wave, controls the charging and discharging of the integral capacitor. MIS is a phase-locked circuit like this.
When implementing an integrated circuit, it is important to have a simple circuit configuration and to reduce the area.

FIG. 4 shows one example of a conventional configuration of the loop filter 2. In this loop filter of Fig. 4, switch 1
1 and 13 are switches controlled on and off by the UP signal, respectively, and switches 12 and 14 are switches D
This is a switch that is controlled on/off by an OWN signal. 15 and 16 are resistors, 7 and 8 are constant current sources, and 19 is an integrating capacitor. The potentials of both terminals 101 and 102 of this capacitor are respectively ■. , VC is shown in FIG. 5 as an operation time chart of the loop filter 2A.

The loop filter 2A generates a divided voltage signal by the resistor 15.16 and an integrated voltage by the constant current source 17.18 and the capacitor 19 at its output v0 in response to the UP or DOWN signal. The divided voltage signal exists only during a certain period of the UP or DOWN signal, and temporarily increases or decreases the oscillation frequency of the voltage controlled oscillator, thereby performing a phase correction function. On the other hand, the integrated voltage remains as an integrated amount even if the UP signal or the DOMN signal disappears, and controls the oscillation frequency of the voltage controlled oscillator, thereby performing a frequency correction function. It is known that such a loop filter has first-order low-pass characteristics.

[Problem that the invention seeks to solve]

In a phase-locked circuit using such a loop filter, when an input signal disconnection occurs, the loop is controlled in the direction of sucking current from the capacitor, so the loop filter output gradually decreases and becomes almost equal to the negative power supply potential. When the input signal is input again, the loop control works in the direction of flowing current into the capacitor, and the loop filter output voltage gradually increases, but
There is a drawback that it takes a long time to reach the desired potential and achieve synchronization.

In addition, when implementing a phase-locked circuit using individual components, it may be possible to overcome these drawbacks by narrowing the frequency variable range of the voltage controlled oscillator according to the frequency used, and by narrowing the Guinami no range of the loop filter. be. However, when implementing an MIS integrated circuit, it is necessary to take into account manufacturing variations when designing. Therefore, it is not possible to narrow the frequency variable range of the voltage controlled oscillator or the wide range of the loop filter.

The present invention solves the above-mentioned conventional problems, and
An object of the present invention is to provide a phase-locked circuit with a short pull-in time by applying it to a loop filter of a phase-locked circuit integrated into an S integrated circuit.

Means for Solving Problem C] The present invention provides a connection between a first terminal of the capacitive element and a positive power supply via a capacitive element and a first switch whose opening/closing is controlled by a first input signal. a first current source connected between the capacitive element and the first terminal of the capacitive element, and a second switch whose opening/closing is controlled by a second input signal; a second current source connected between a negative power supply and sucking current from the capacitive element, and having the first terminal of the capacitive element as an output terminal, the voltage level of the output terminal is a level determination circuit for determining the level determination circuit, a reference voltage source, and a third switch connected between the output terminal and the reference voltage source, the opening and closing of which is controlled by the output signal of the level determination circuit. It is characterized by being equipped with a voltage limiter.

[Effect]

When the output voltage of the loop filter becomes lower than 2, the switch closes to maintain the output voltage at V.

Therefore, since the output voltage of the loop filter is maintained at vl even when the input control signal disappears, it rises quickly when the input control signal arrives again.

〔Example〕

Hereinafter, the circuit and operation of the apparatus according to the embodiment of the present invention will be explained.

FIG. 1 is a circuit diagram showing an embodiment of a loop filter according to the present invention, in which a voltage limiter shown by a broken line is connected to the output of the loop filter in the conventional example shown in FIG.

In FIG. 1, switch 11.13 is a switch controlled on/off by the UP signal, switch 12.14
is a switch controlled on/off by the DOWN signal. Reference numerals 15 and 16 are resistors, 17 and 18 are constant current sources, and 19 is a capacitor.

Next, regarding the voltage limiter, reference numeral 20 is a reference voltage source, 21 is a level determination circuit, and 22 is a switch. It is assumed that the output voltage of the reference voltage source 20 is (1), the determination level of the level determination circuit is (2), and v,>VZ. The level determination circuit 21 operates to turn on the switch 22 if the input is less than or equal to (1) 2, and turn off the switch 22 if it is greater than or equal to (2). When a loop filter having such a configuration is used in the phase-locked circuit shown in FIG.
It works to turn on 4. As a result, the output of the loop filter gradually decreases, but when the output voltage becomes lower than v2, the switch 22 is turned on and the reference voltage source 20 is connected to the capacitor 19.
is charged and rises to voltage v1. Therefore, the lower limit of the loop filter output is limited to v2. When the synchronization input signal is input again, the loop filter output quickly reaches the desired potential and synchronization is achieved.

FIG. 2 shows an example in which the circuit within the dotted line in the figure is converted into an MO3 circuit. In this embodiment, the reference voltage is set to the ground potential, and an inverter is used for the level determination circuit. The above example shows a circuit that charges and discharges a capacitor using a combination of a constant current circuit and a switch that opens and closes in response to a control signal, but there are various other circuits that charge and discharge a capacitor in response to a control signal. The present invention can be carried out in the same manner using these.

The present invention can be practiced regardless of whether the terminal voltage of the capacitor is positive or negative with respect to the ground potential.

The judgment potential V2 of the level judgment circuit is not necessarily the reference voltage v1.
Depending on the design conditions of this circuit, it can be set equal to or higher than the reference voltage V, if not lower.

〔Effect of the invention〕

By using the loop filter according to the present invention in a phase-locked circuit, it is possible to realize a phase-locked circuit with short pull-in time. Note that it is suitable for MIS integrated circuits because it does not require circuit elements such as large capacitors and resistors.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of an embodiment of the loop filter of the present invention. FIG. 2 is a diagram showing an embodiment of the MO3 circuit corresponding to the circuit shown in broken lines in FIG. FIG. 3 is a diagram of a conventional example of a block configuration of a phase-locked loop system (PLL). FIG. 4 is a circuit diagram showing a conventional example of a loop filter. FIG. 5 is a time chart showing the operation of the circuit of FIG. 4. ■...Phase comparator, 2.2A...Loop filter,
2B... Voltage limiter, 3... Voltage controlled oscillator, 4
...Frequency divider, 11-14.22...Switch, 19
...Capacity, 15.16...Resistance, 17.18...
constant current source, 20... reference voltage source, 21... level determination circuit.

Claims (1)

[Claims] (1) Comprising a capacitor (19) and circuit means for charging this capacitor with an electric charge in response to an input first control signal and discharging the electric charge in this capacitor in response to a second control signal, and outputting a terminal voltage of this capacitor. In the loop filter, there is a reference voltage source (20) with an output voltage of V_2, an open/close switch (22) that connects the output of this reference voltage source to the terminal of the capacitor, and a terminal voltage of the capacitor that is a preset voltage. A loop filter characterized by comprising a level determination circuit (21) that closes the switch when the voltage reaches V_2.