JPS628373A - Disc interface circuit - Google Patents

Abstract

PURPOSE:To reduce redundancy of data written on a disc device by providing N sets of serial/parallel and parallel/serial converting circuits connected corresponding to bits and a control circuit controlling the read/write of the said conversion circuits. CONSTITUTION:The serial/parallel.parallel/serial conversion circuits 4a-4h are connected to a parallel port of a main memory 1 at each bit via an 8-bit data path. The control circuit 5 controls the read/write of the serial/ parallel.parallel/serial conversion circuits 4a-4h. Thus, a data written in a buffer memory 2 is enough to be 7-word, while the 8-word data is read from the main memory 1. Thus, the information by one word is saved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a disk contention interface circuit that can reduce the redundancy of data saved in a disk device.

[Conventional technology]

FIG. 2 is a block diagram showing a conventional disk interface circuit. In the figure, 1 is a main memory, 2 is a buffer memory, and 3 is a disk device. In the disk/tough ace circuit having this configuration, when a program stored in the main memory 1 of a personal computer or the like is saved to the disk device 3, the program is once saved via the buffer memory 2. Therefore, although the ASCII code representing alphanumeric characters is 7 bits, the data stored in the disk device 3 is 8 bits, and the information has redundancy.

[Problems that the invention attempts to solve]

Since the conventional disk interface circuit described above is only provided with a buffer memory, there is a problem in that 7-bit data must be treated as 8-bit data.

[Means for solving problems]

In the disk interface circuit according to the present invention, N serial/parallel-parallel/serial conversion circuits controlled by a control circuit are connected between a main memory and a buffer memory.

[Effect]

In this invention, it is possible to reduce the redundancy of data stored in a disk device.

〔Example〕

FIG. 1 is a block diagram showing one embodiment of a disk interface circuit according to the present invention. In the same figure, 4
a to 4h are serial/parallel/parallel/serial conversion circuits connected bit by bit to the parallel port of the main memory 1 via an 8-bit data bus; 5 is a serial/parallel/parallel/serial conversion circuit connected to the main memory 1 via an 8-bit data bus; This is a control circuit that controls reading and writing of the circuits 4a to 4h.

In addition, in the conversion circuits 4a to 4h, the conversion circuit 4a
is the most significant bit, and the conversion circuit 4h is the least significant bit.

Next, the operation of the disk interface circuit with the above configuration will be explained. First, when transferring only alphanumeric data stored in the main memory 1 to the disk device 3, the data stored in the main memory 1 is converted into 8-bit data by the conversion circuits 41 to 4h under the control of the control circuit 5. is written. At this time, only the most significant bit is written into the conversion circuit 4a. If the data consists of alphanumeric characters expressed in ASCII code, the most significant bit is always O. Therefore, the 8-bit data written in each bit of the conversion circuits 4b to 4h except for the conversion circuit 4m in which the most significant bit is written is regarded as 1 word.
The bits are read out in parallel and written into the backup memory 2. In other words, for 8 words of data read from main memory 1, only 7 words of data need to be written to backup memory 2. Therefore, information corresponding to one word is reduced.

Next, when reading the data saved in the disk device 3 and transferring it to the main memory 1, the conversion circuit 41
is set to 0 in advance and the backup memory 2 is set to 0 in advance.
Only 7 words are written to the conversion circuits 4b to 4h. When the data is read from the serial ports of the conversion circuits 41 to 4h, it becomes the original data and is transferred to the main memory 1.

Next, as a result of some similar processing, if data is stored in main memory 1 in which only the lower 4 bits have meaning and the upper 4 bits are always 0, then this main memory 1 Under the control of the control circuit 50, the stored data is written in 8 words to the serial ports of the conversion circuits 4&~4h.

Then, only four words can be read from the serial ports of the conversion circuits 41 to 4h and transferred to the disk device 3 via the buffer memory 2.

In this case, the amount of data transferred to the disk device 3 can be reduced by half.

Similarly, if data in which a specific bit in one word of data is always 0 is stored in main memory 1, the number of specific bits appearing in the 0 and the position in the data Regardless, it can of course be used to reduce the amount of data written to the disk device 3.

〔Effect of the invention〕

As explained in detail above, according to the disk interface circuit according to the present invention, N serial/parallel/parallel/serial conversion circuits connected corresponding to bits and reading and writing of the conversion circuits are controlled. By providing a control circuit for controlling the disk drive, there are effects such as being able to reduce the redundancy of data written to the disk device.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of a disk interface circuit according to the present invention, and FIG. 2 is a block diagram showing a conventional disk interface circuit. 1...Main memory, 2...Buffer memory,
3... Disk device, 4a to 4h... 0 serial/parallel Φ parallel/serial conversion circuit, 5...
・Control circuit.

Claims (1)

[Claims] N serial/parallel/parallel/serial conversion circuits connected to the data bus of the main memory in correspondence with the bits; a buffer memory connected between the parallel port of the conversion circuit and the disk device; A disk interface circuit comprising: a control circuit for controlling reading and writing of a conversion circuit.