JPS6283795A - Generation of musical sound signal - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a method of generating a musical tone signal by a predetermined calculation method such as a frequency modulation calculation or an amplitude modulation calculation, and in particular, it relates to a method of generating a musical tone signal by a predetermined calculation method such as a frequency modulation calculation or an amplitude modulation calculation. The present invention relates to a method in which units are connected in a predetermined manner and musical tone signals are generated according to the connection manner.

[Conventional technology]

A method of synthesizing a musical tone of a desired tone by frequency modulation calculation in the audio frequency band is disclosed in Japanese Patent Application Laid-Open No. 126406/1983. In such a method, in order to obtain a musical tone signal having sufficient overtone components, it is necessary to introduce complex modulation calculation formulas such as multiplexing or polynomials, resulting in an increase in the size of the apparatus. In view of this point,
A method of synthesizing a musical tone signal having many overtone components using a simple structure is disclosed in Japanese Patent Application Laid-Open No. 55-7733 or 1987-7734. In this case, the output of a modulation calculation circuit is fed back to its own modulation signal input side, or the outputs of multiple modulation calculation circuits are sequentially fed to the modulation signal input of the next stage to form a ring-shaped feedback loop as a whole. , it has been shown that.

[Problem that the invention seeks to solve]

However, the above-mentioned conventional method has limitations in that the feedback circuit can only be formed within its own modulation calculation circuit, or that the feedback circuit can only be formed in a ring shape. Therefore, there was a limit to the number of overtone components that could be obtained.

The present invention has been made in view of the above-mentioned points, and it is an object of the present invention to provide a musical tone signal generation method that can generate musical tone signals containing even more overtone components with a simple configuration.

[Means for solving problems]

The present invention provides a plurality of arithmetic units that perform a predetermined waveform generation operation using a phase signal or a waveform signal applied to one or more inputs as parameters, connects these arithmetic units in a predetermined manner, A musical tone signal generation method that generates a musical tone signal according to the connection mode includes a plurality of steps in which the output of a predetermined arithmetic unit is applied to the input of an arbitrary plurality of units among the unit and one or more arithmetic units in the previous stage thereof. The present invention is characterized in that the connection mode is set so that a return path is formed.

[Action and effect of the invention]

By feeding the output of a given calculation unit to the inputs of that unit and the units preceding it, multiple feedback paths are formed, so that the waveforms input as calculation parameters via the feedback paths are The signal contains complex overtone components, and by further performing calculations using this signal, it is possible to generate a musical tone signal containing a large number of overtone components. Therefore, according to the present invention, it is possible to generate a musical tone signal including a large number of overtone components without increasing the number of arithmetic units and with a simple configuration.

〔Example〕

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a block diagram schematically illustrating an embodiment of the present invention, in which three arithmetic units OP1 to OP3 are connected in cascade. Each arithmetic unit OP1 to OP3 has an input P in for a phase signal and an input W! for a waveform signal! n
l+W! n2 respectively, and these inputs Pi
n, Wint ・Win2 (The added phase signal or waveform signal is used as a parameter to perform a predetermined waveform generation calculation. The output of the calculation unit 1-OP1 is added to the input Wl of the calculation unit OP2, and -OP2
The output of C) is added to the input Wi of the arithmetic unit OP3, and basically three arithmetic units) C) P1 to OP3 are connected in cascade. Here, the output of the arithmetic unit OP3 is the input W of its own unit oP6.
in2, the feedback path applied to the input win2 of the unit OP2 one stage before, and the unit OP1 two stages before.
The connection manner of each of the units OP1 to OP3 is further set so that three feedback paths are formed to be added to the input Win2. That is, the output of the arithmetic unit OP3 is temporarily stored in the feed bank register F'R, and the output of this register FR is sent to each multiplier ML1 for feedback rate control.
~ Input Wi of each unit OP1 to OP3 via ML3
added to n2.

The register FR is provided to delay the output signal of the arithmetic unit l-0P3 by at least one sampling time and feed it back to the input side of each unit. This is used to set the sampling time delay. Feedback level data PL1 to FL3 for independently setting the feedback rate is input to multipliers ML1 to ML3 provided in each feedback path. In addition, phase data P1 to P1 to the input Pi port of each calculation unit OP1 to OP3 are
P6 is input respectively. This phase data P1 to P6 is
It changes periodically at a frequency related to the pitch of the musical tone to be generated, for example, it corresponds to a frequency that is the same as the pitch of the musical tone to be generated, or an integer multiple thereof, or a frequency slightly shifted from the pitch of the musical tone to be generated. .

For example, the basic arithmetic expressions in each of the arithmetic units OP1 to OP3 are common. Simply connecting each unit OP1 to OP5 in cascade would not allow the calculation result of unit OP1 to be incorporated into one parameter in the calculation formula of unit oP2, and the calculation result of unit OP2 to be incorporated into unit 1-OP2.
A simple multiple calculation formula incorporated into one parameter in the three calculation formulas is realized. However, by providing multiple feedback paths as in this invention, it is possible to realize not just a multiple calculation formula but a multiple feedback calculation formula, and even more complex calculations can be performed without increasing the number of calculation units. The basic arithmetic expressions executed in P1 to OP3 that will be substantially performed include frequency modulation arithmetic and amplitude modulation arithmetic. When performing frequency modulation calculation, one calculation unit I
C) The configuration of P can be as shown in FIG. 2, for example. Adder 1 adds the phase data given to input Pin and the waveform signal given to input Win (this corresponds to a modulation signal), and adds the phase data of input Pin to the old waveform signal of input Wi. modulated by Adder 2 adds the output of adder 1 and the waveform signal applied to input Win2 (which also corresponds to a modulation signal), and further modulates the modulated phase data with the waveform signal of input Win2.

The output of the adder 2 is applied to the address input of the sine wave memory B, and the sine wave sample point amplitude value data stored in the memory B is read out in accordance with the modulated phase data. The output of the memory B is given to a multiplier 4 for envelope level control, and its amplitude is controlled in accordance with the envelope level data EL. The phase data applied to input Pin is ωt, and the waveform signal (i.e. modulation signal) applied to input W, n1+W, 2 is f(Ml), f(M
2), the operation executed by the operation unit OP is E
L −5in(ωt + f (Ml) + f(M
2)), and frequency modulation is performed.

FIG. 3 shows an example of the configuration of the arithmetic unit OP when performing amplitude modulation arithmetic, in which the sine wave memory 5 is read out based on the phase data ωt given to the input Pin, and the sine wave memory 5 is
l + "'! Waveform signal (modulation signal) given to n2
f(Ml) and f(M2) are added by an adder 6, and the cosine wave memory 7 is read out based on the added output. Both memory 5
, 7 by a multiplier 8, amplitude modulation of the sine wave signal sinωt is performed. The output of multiplier 8 is given to multiplier 9, and its amplitude level is controlled according to envelope level data EL. In this way, the calculation executed by the calculation unit OP is EL-cos(,f(Ml)+f(M2))·3! nω
t, and amplitude modulation calculation is executed.

The connection mode shown in FIG. 1 is just an example, and various other modes are possible. Also, by setting the values of feedback level data FL1 to FL3 to zero,
It is also possible to substantially block a particular return path. Also, instead of having all the calculation units OP1 to OP3 have the same configuration,
It may be different. For example, one calculation unit may perform frequency modulation calculation, and another calculation unit may perform amplitude modulation calculation. Further, in order to prevent the hunting phenomenon due to feedback, it is preferable to replace the feedback register FR in FIG. 1 with an averaging circuit as shown in FIG. 4. In this case, register 11 stores a signal one sampling time before the waveform signal stored in register 10, and the outputs of registers 10 and 11 (that is, the waveform signal at the sampling time and the waveform signal one sampling time before) The hunting phenomenon can be prevented by adding the values in the adder 12, calculating the average value of the waveform amplitudes of adjacent sample points, and feeding it back.

FIG. 5 schematically shows the overall configuration of an electronic musical instrument embodying the present invention, and the musical tone signal generation method according to the present invention is employed in the musical tone signal forming circuit 16. The musical tone signal forming circuit 13 includes six arithmetic units OP1 to OP6, and the connection mode between each unit can be selectively switched.

In this embodiment, the musical tone signal forming circuit 13 is equipped with one arithmetic unit OP in terms of hardware, and is made to function as six arithmetic units OP1 to OP6 by time-divisionally using it in six time slots. .

The keyboard circuit 14 includes a key switch corresponding to each key on the keyboard, and receives a key code KC of a pressed key and a key-on signal KO.
Output N. The phase data generation circuit 15 has a key code K
The phase data P1 to P6 corresponding to C is sent to each calculation unit 1-
It occurs in time division corresponding to UP1 to OP6. The envelope generation circuit 16 generates envelope level data EL1-gL6 corresponding to each arithmetic unit OP1-OP6 in a time-division manner based on the key-on signal KON.

The parameter generation circuit 17 generates parameters in accordance with the timbre selected by the timbre selection circuit 18, and time-divisionally generates these parameters corresponding to the time slots of each arithmetic unit OP1 to OP6. Occur. These parameters are input to a phase data generation circuit 15, an envelope generation circuit 16, and a tone signal formation circuit 16. The parameters input to the phase data generation circuit 15 are:
The coefficient K of the phase data P1 to P6 generated corresponding to each calculation unit 1-OP1 to OP6 is set independently, and the phase data determined according to the key code KC is ωt.
If this is the case, phase data P1 to P6 having contents ωt are generated according to this parameter. The parameters input to the envelope generation circuit 16 are attack rates of envelope level data EL1 to EL6 generated corresponding to each calculation unit) OP1 to OP6'/C;
This is used to set various envelope waveform parameters such as attack level. The parameters input to the musical tone signal forming circuit 13 are other appropriate parameters used for waveform generation calculations in the calculation unit. For example, if it is possible to select a connection mode in which the processing units OP1 to OP6 are divided into multiple series and arranged in parallel, and the outputs of each series are added, the volume level will be adjusted according to the number of series to be added. Level correction data LC for correction is included in such parameters. Furthermore, the aforementioned feedback level data FLI to FL6 are also included in such parameters.

The control signal generation circuit 19 generates a control signal for setting the connection mode of the arithmetic units 1-OP1 to OP6 in the musical tone signal forming circuit 16, depending on the tone selected by the tone color selection circuit 18.

The musical tone signal forming circuit 13 outputs each arithmetic unit OP1 to OP based on data P1 to P6, EL1 to EL6, parameters, and control signals given from each circuit 15 to 17°19.
The calculations for every 6 units are performed in a time-division manner, and the calculations are performed with these calculation units connected according to the set connection mode. The musical tone signal thus formed is converted into an analog signal by a digital/analog converter 20 and provided to a sound system 21. In addition, each calculation unit) OP
A clock pulse φ is applied to each circuit t3.15 to t17.19 in order to set the time division time slots corresponding to t3.1 to OF6.

An example of the internal configuration of the musical tone signal forming circuit 16 is shown in FIG. 6, and is adapted to perform frequency modulation calculations. The arithmetic unit) OP includes an adder 22 for modulating the phase data P1 to P6 applied to the input pin, a sine wave table 26 that stores sample values of the sine wave in logarithmic data format, and an amplitude level control , an adder 24, a logarithmic/linear conversion circuit 25, and an adder 26 for adding together the modulated signals applied to the inputs w, nl+Wln2. The adder 22 is connected to each operation unit OP1 to OP.
The phase data P1 to P6 provided in a time-divisional manner corresponding to the 6 time slots and the waveform signal (ie, modulation signal) provided from the adder 26 are added to perform phase modulation. The adder 24 adds envelope level data EL1 to E to the logarithmically expressed sine wave sample value data read from the sine wave table 26 in accordance with the output of the adder 22.
0 which adds L6 and level correction data LC
The data EL1 to EL6 and LC are also given in logarithmic expression format, and by adding the logarithms in the adder 24,
This essentially performs multiplication by amplitude coefficients. The logarithmic/linear conversion circuit 25 converts the output of the adder 24 in logarithmic representation into data in linear representation.

The arithmetic unit connection mode setting circuit 27 connects the arithmetic unit O
Feedback registers FR each input the output of P,
1 stage shift register SR, memories M1, M2,
Accumulator AR, register SR and memory M1
, M2 and the output of the accumulator AR, a multiplier or shift circuit 29 for multiplying the output of the feedback register PR by the feedback level data FL (FL1 to F'L6), and a latch for the output of the accumulator AR. A latch circuit 60 is provided. The output of the latch circuit 30 is output as a musical tone signal formed by the musical tone signal forming circuit 13.

Feedback register PR, memory M1. M2 and the latch circuit 30 have load input and reset inputs R, and a control signal generated from the control signal generation circuit 19 is applied to these inputs R to control data loading and resetting. The accumulator AR also has an accumulation enable input AC and a reset input R, and the control signals are applied to these inputs AC and R to control the accumulation and reset of data. The above control signal is also applied to the selection control input of the selector 28 to control which input data is to be selected.

The outputs of the selector 28 and shift circuit 29 are sent to the adder 2 via the modulation signal input Wi and Win2 of the arithmetic unit OP.
6 and is added there.

Feedback register FR, like feedback register FR in FIG. 1, stores waveform signal data that is the calculation result of a predetermined calculation unit that is to be fed back to its own calculation unit or to the preceding calculation unit.

The calculation result of this predetermined calculation unit is the calculation unit) OP
A signal ``'1#'' is applied to the load input in the time slot output from the feedback register FR.
The path leading to No. 6 corresponds to the aforementioned return path. Feedback level data FL1 to FL6 indicate an appropriate value in the time slot of the arithmetic unit in which the feedback path is to be formed, and the output signal of the register PR is shifted in accordance with the value and provided to the adder 26.

In the time slot of the arithmetic unit where a feedback path is not provided, the feedback level data FL1 to FL6 correspond to level O, and the shift circuit 29 is cut off.
Set its output to O. In addition, the feedback register F
It is more preferable if R is constituted by an averaging circuit as shown in FIG.

The shift register SR shifts according to the clock pulse φ, and outputs the operation result in one time slot in the next time slot. Memory M1, M
2 is for holding calculation results in arbitrary time slots.

The accumulator AR is connected to each arithmetic unit OP1 to OP6.
The output signals of any one or more of the units are added, and the signal "1" is input to the accumulation enable input AC in the time slot corresponding to the unit to be added.
” is given. The selector 28 selects each arithmetic unit OP
By selecting an appropriate output signal from register SJ, memory M1, M2, and accumulator AR as a waveform signal (modulation signal) to be given to input Wi of arithmetic unit OP in each time slot corresponding to oP1 to oP6, Each arithmetic unit OP1 to OP according to a predetermined connection mode
6 interconnections. In the latch circuit 60, the time slots of all arithmetic units OP1 to OP6 go around once.
At the end of the calculation cycle, a signal "1#" is applied to the load input, and based on this, the output of the accumulator AR is latched.

In this way, the latch circuit 60 latches one sample value data of the musical tone signal obtained as a result of performing calculations by connecting each calculation unit I-[P1 to OP6 in a predetermined connection manner.

As an example, six arithmetic units OP1 to OP6 are connected to a seventh
The case of connecting as shown in the figure will be explained.

In this connection mode, OP4 is selected as a predetermined arithmetic unit whose output signal should be fed back to itself or another arithmetic unit, and the output signal of this arithmetic unit OP4 is stored in a feedback register FR, and this register F
The output signal of R is sent to its own unit) OP4 and the previous unit) OP5.

Not only can it be fed back to the input side of OP6, but it can also be fed back to the unit 0 of another series installed in parallel with its own unit OP4.
It is also input to P1 and OP2, and is further input to the unit 1-0P3 in its subsequent stage. register PR
, are input as multipliers to the multipliers (shift circuits) provided in the paths leading the outputs of the units [)P1 to OP6, and are feedback level data corresponding to the respective arithmetic units oP1 to OP6. Note that the output signal of the register PR applied to the arithmetic units OPI to OP3 is not a feedback signal for these units OP1 to OP2, but in this way, the signal to be fed back to the self or previous arithmetic unit can be sent to another series or to the subsequent arithmetic unit. It is also possible to implement a connection mode in which the time division time slots are added to the arithmetic units as well. The six time slots 1 to 6 in the calculation cycle are arranged in the order of time slots 1-O.
It corresponds to P6 to OP1.

Therefore, in each time slot 1-6, phase data P6-P1 corresponding to each arithmetic unit 1-OP6-OP1
．． Envelope level data EL6-ELL feedback level data FL6-FL1 are supplied as shown in FIG. 8(a).

When realizing the connection shown in Fig. 7, each time slot 1 to 6
The destination for receiving the output signal of the arithmetic unit OP is the eighth
The selection by the selector 28 is as shown in FIG. 8 (b).
Do as in C).

First, in time slot 1, the selector 28 does not select anything, and only the output of the shift circuit 29 is sent to the arithmetic unit OP.
input to the adder 26. feed bank register PR
, the output signal of the predetermined arithmetic unit OP4 one sampling time ago is given to the shift circuit 29 as f(-i)
Then, the calculation result of the calculation unit OP6 performed in this time slot 1 is as follows.

OP6 output = EL6-s in (P6+FL6 ・f
(-1)) This output signal is taken into the accumulator AR.

The selector 28 does not make a selection in time slot 2 either, and the calculation result of the calculation unit oP5 is as follows.

OP5 output = EL5-sin(P5+FL5 ・f(-
1)) This output signal is taken into the accumulator AR, and the output of the accumulator AR is "OP6 output kabras OP".
5 outputs.

In time slot 6, the selector 28 selects the output of the accumulator AR. As a result, the operation Uniso 1-
The calculation result of OP4 is as follows.

OP4 output = EL4-sin[P4-)-FL4・f(
-1)+EL5 ・sin (P5+FL5 ・f (
-1) )-)-EL6 ・5in (P6+FL6 ・
f(-1))) This output signal is taken into the feedback register FR.

In time slot 4, selector 28 selects the output of shift register SR (ie, the above-mentioned OP4 output in previous time slot 6). Also, this time slot 4
Level correction data LC is also provided as needed.

As a result, the calculation result of operation Uniso 1-OP 3 is as follows.

OP3 output = LC-EL3-sin (P3+FL3・f
(-1) + "OP4 output") This O'P3 output signal is taken into the accumulator AR, but in the accumulator AR, the old content "°OP5 output + OP6 output" is reset before this OP3 output signal is taken in. .

In time slot 5, nothing is selected by the selector 28, and the calculation result of the calculation unit OP2 is as follows.

OP2 output = EL2・5in(P2+FL2・/(-i
)) In time slot 6, the selector 28 selects the output of shift lens SR (that is, the OP2 output in the previous time slot 5). Further, level correction data LC is also provided as required.

As a result, the calculation result of operation UNISO) OPl is as follows.

OP1 output = LC-ELl-sin (P1+FL1
-f(1) 10"OP2 output")' This OP1 output is taken into the accumulator AR and added to the already taken in OP6 output. The output signal of this accumulator AR (i.e. “OP1 output + O
P3 output'') is latched by the latch circuit 60 at the rising edge of the next time slot 1, and the contents of the accumulator AR are reset immediately thereafter.

In this way, the calculation formula for the musical tone signal that is finally launched into the latch circuit 60 is: OP1 output + OP3 output = LC-EL1-sin(P1+FL1 ・f(-1)
+EL2・5in(P2+FL2-f(1)1)+LC
-EL3-sin (P6+FL3 ・f(-1)+E
L4 ・sin [P4+FL4 ・f (-1)+E
L5・sin [P5+FL5・f(-1))+EL6
・5in(P6+PL6・f(1)))').

The musical tone signal forming circuit 16 shown in FIG. 6 is not limited to the connection mode shown in FIG. 7, but can be implemented in any other connection mode. In addition, the connection mode is
In FIG. 5, the timbre is determined according to the timbre selected by the timbre selection circuit 18, but the invention is not limited to this.
The player may be able to freely set the connection mode by using a connection combination variable setting means as shown in No. 211789.

Further, although in FIG. 7, the output of the feedback register FR can be given to all arithmetic units, the present invention is not limited to this. Furthermore, the arithmetic unit to which the output signal is fed back is not limited to OF2, and may be any other arithmetic unit. Furthermore, the number of arithmetic units (number of time slots) used is not limited to six, but may be any number.

In the example of FIG. 5, generation of a single sound is shown, but
By providing a key assigner in connection with the keyboard circuit 14, it is also possible to create a multiple tone generation type.

Register FJSJ memory M1 in FIG. M2. The accumulator AR may be one that stores data for a plurality of channels.

In the embodiments shown in FIGS. 5 and 6, musical tone signals are generated by frequency modulation calculations, but amplitude modulation calculations may also be used.

As is clear from the above embodiments, according to the present invention,
It is possible to perform computations with more complex content compared to the number of computation units, it is possible to generate musical tone signals containing a large number of overtone components, and it is also possible to perform complex timbre control by controlling a large number of overtone components. For example, the arithmetic expression for the musical tone signal obtained according to the connection mode shown in FIG. It consists of arithmetic expressions such that 6 sets of arithmetic units opi~O
Much more complex arithmetic expressions than can normally be realized by P6 are substantially executed.

Also, compared to the case where the output of the operation Uniso [)P4 is simply fed back to its own input, or the case where it is simply fed back in a ring shape (for example, the output of OF2 is fed back only to O20), it is far more It will be understood from the above-mentioned arithmetic expressions that complex arithmetic expressions can be executed.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram showing an example of the calculation unit in FIG. 1 when frequency modulation calculation is performed, and FIG. 3 is a block diagram showing an example of the calculation unit in FIG. FIG. 4 is a block diagram showing an example of the arithmetic unit in FIG. 1, FIG. 4 is a block diagram showing an example of an averaging circuit that can replace the feedback register in FIG. 1, and FIG. 5 is an example of an electronic musical instrument implementing the present invention. FIG. 6 is a block diagram showing an example of the internal configuration of the musical tone signal forming circuit in FIG. This is a timing chart showing the time division timing in the circuit of FIG. 6 and the control signal generation timing for realizing the connection mode of FIG. 7.
．． 12, 22, 24, 26... Adder, MI, 1°M
L2. ML, 29...multiplier or shift circuit, 4.
8.9... Multiplier, 6,5... Sine wave memory, 7.
... Cosine wave memory, 16... Musical tone signal forming circuit, FR
...Feedback register, FL1 to PL6.・・・
Feedback level data, P1 to P6...phase data, EL1 to EL6...envelope level data O

Claims (1)

[Claims] A plurality of arithmetic units are prepared that perform a predetermined waveform generation operation using one or more phase signals or waveform signals applied to one or more inputs as parameters, and these arithmetic units are arranged in a predetermined manner. In the musical tone signal generation method, the output of a predetermined arithmetic unit is connected to the input unit and one or more arithmetic units in the previous stage thereof, and the musical tone signal is generated according to the connection mode. A musical tone signal generation method characterized in that the connection mode is set so that a plurality of return paths are formed in addition to the feedback path. 2. The arithmetic unit includes an addition means for adding signals applied to the one or more inputs, and a waveform memory for reading out a waveform signal according to the output of the addition means. The musical tone signal generation method described. 3. The musical tone signal generation method according to claim 1, wherein the predetermined waveform generation calculation to be performed by the calculation unit is a frequency modulation calculation. 4. The musical tone signal generation method according to claim 1, wherein the predetermined waveform generation calculation to be performed by the calculation unit is an amplitude modulation calculation. 5. The arithmetic unit includes an input that receives a phase signal that changes over time in accordance with the frequency of a waveform signal to be generated, and a plurality of inputs that receive a plurality of waveform signals as modulation signals. 2. The musical tone signal generation method according to item 1.