JPS6285325A - Edit command processing method - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to editing processing, and particularly to an editing command processing method capable of high-speed processing of editing commands.

[Background of the invention]

Editing instructions used in information processing devices include inserting a decimal point when printing out the result of a decimal operation,
It is used to insert commas every three digits, delete unnecessary leading zeros, or edit two or more types of data.

In information processing devices, decimal operands are handled as follows. That is, one decimal digit is expressed as a 4-bit binary number. For example, decimal “0”
is expressed as a binary number "0000", the decimal number it 1 u is expressed as a binary number "0001", and the maximum number 9 is expressed as a binary number "1001".
”, so a decimal number is a 4-bit binary number “
It can be expressed as a number from ``0000'' to ``1001.'' This is a number, and the remaining ``10'' of the binary number
From 10” to “i it i”.

Represents positive and negative signs.

In an information processing device, using these numbers and codes, data that is handled in a format of every 4 bits as shown in Figure 1(a) is called a packed decimal data. Since two numbers can be represented in a byte, it is advantageous in terms of storage capacity. In addition, Fig. 1(a)
Although the length is 4 bytes (32 bits), it can actually be any number of bits, and the end of the number string is detected by the sign of the last 4 bits.

By the way, when printing out packed format decimal data, it cannot be processed in the current format.

In addition to numbers O to 9, printers also need to decipher alphabets from A to Z, special characters, etc. Since only 16 characters can be expressed in 4-bit binary numbers, printers can print all of these characters in packed format. Even if sent to Therefore, in order to allow an output device such as a printer to recognize characters, a different representation method than packed decimal data,
In other words, a method of representing a pattern with a large number of bits is used. This is called a zone format.

In zone format, all numbers, alphabets.

One special character is expressed in one byte (8 bits).

In particular, the numbers 0 to 9 are 1 as shown in Figure 1(b).
The left 4 bits of the byte are "+111'" (that is, F in hexadecimal), and the right 4 bits are "oooo"~" 1ooi
” (corresponding to c o ~ 9). Therefore, the first
If the numbers (1), (2), (3), and (4) are arranged with 4 bits each in the back format shown in Figure (a), then when they are converted to the zone format, they will be as shown in Figure 1 (b). , F(1), F
(2), F(3), and F(4), each consisting of 8 bits.

The number 5, which is expressed as "0101" in the back format, is converted to "JIIIOIOI" in the zone format.

The editing instructions used within the information processing device are in pack format 1.
This is an instruction to convert 0-decimal data to zone format. This instruction converts back format decimal data to zoned format and inserts a decimal point.

Insert a comma every three digits, delete one unnecessary zero, etc.

The edit command includes two operands, the second of which contains data in back format, and the first of which contains an edit pattern (mask pattern). The back format of the second operand is converted to zone format according to the edit pattern and the result is placed in the first operand.

FIG. 2 is a diagram showing control codes used as editing patterns for editing.

The control code (1 byte) for the 5 fry shown in Figure 2 is the first
is placed in the operand and according to this control code,
The characters of the second operand are converted.

That is, first read the control code at the beginning of the editing pattern of the [] operand, and then read the control code at the beginning of the edit pattern of the [] operand, and then
The first digit of the packed format data of the operand is converted to the zone format, and the result is replaced with the control code of the first operand. After that, read the control code of the first operand one byte at a time, and read the packed format data of the second operand.

Each digit is converted into zone format according to the instructions of the control code.

The operations of the five types of control code 1 are as follows.

First of all, Rigaku is used when you want to replace unnecessary leading zeros of the data you want to collect with other characters.

Usually, the characters to be replaced are blank (40) 1 [
1, or an asterisk (5C), etc. are used. The pattern of the first rfi byte of the first operand is treated as physical data.

Next, the number selection character (20) xe instructs to convert the 4-bit decimal number in the back format into an 8-bit number in the zone format and insert it into the location of (20) xe in the edit pattern. . Note that if there is a code in the right 4 bits of 1 byte of the second operand, the 4-bit number next to the code is converted into the zone format instead of the code. However, if 110 II continues from the beginning of the second operand, it is called the preceding 110 II, and II OI
Replace the zone form for I with a numeric selection letter for science.

If a digit other than 110 I+ appears, the numeric selection character is replaced by a zoned digit; if "O'" appears after it, it is replaced by a zoned 110 IT instead of a digit. In this way, a state in which '0''' in the back form is not regarded as a leading 110 ++ is called "significant J."

Next, the message characters are used to insert signs, commas, decimal points, etc. during editing, and the message characters remain in the first operand as they are. However, if the processing state is "not significant J," that is, if the preceding "'0"' continues, it is replaced with science.

Next, the significant start character (21) ze is a control code that makes the significant state start from the next digit where the significant start character appears,
For example, it is often desirable to leave ``0'' to the left of the decimal point as is even in the preceding IT OIT.

Insert (21) zs one position before that.

As a result, even in the leading "0" state.

(21) In the digit after 1o, the zone format 'FO' is inserted instead of the J[!! character in place of the back format '0'. In addition, the digit itself with a significant starting character.

Replaced with zoned numbers in the same way as numeric selection characters.

Next, the column delimiter (22) ls itself is replaced with the leftmost digit of the editing pattern, but the significance status is canceled from the subsequent digits. That is, if the numeric selection character encounters '0' after the column delimiter appears, it is treated as the preceding re Oto and replaced with Rigaku.

FIG. 3 is an explanatory diagram when switching between a significant state and a non-significant state 1m.

As shown in Figure 3, the transition from a non-significant state to a significant state occurs when a number other than #OI+ appears.
There are two when significant starting character (21) 1e appears,
There are two cases in which a significant state returns to a non-significant state: when the column delimiter (22) re appears, and when the last 4 bits of 1 byte of back format data have a positive sign. .

The above is an explanation of the editing command.

In an edit command, the usage amount (length) of the second operand, which is back format data, is influenced by the contents of the first operand, which is a mask pattern.

That is, if the mask pattern is a numeric selection character (20) 16, the 4-bit second operand in packed format is replaced by the 8-bit first operand (or physical) in zone format, but if the mask pattern is a message character If so, the second operand of the packed format is not used and the message characters remain as they are. As described above, it is a feature of editing commands that the required length of the second operand changes depending on the content of the first operand, and this is one of the factors that prevents speeding up of editing processing.

An example of a conventional processing device is shown in FIG.

The two operands exist in the memory 10, and are cut out by the processing device into specific lengths, for example 8 bytes, and transferred to registers 1 and 2, respectively, for editing. The editing result is stored in the memory 1o via the register 3. Control of data transfer from memory 10 to registers 1 and 2 and data transfer from register 3 to memory 1o is often performed by microprogram 20.

Editing processing is performed byte by byte by a dedicated EDiT circuit 30. In one editing process, one byte of data is extracted from each of registers 1 and 2, and the resulting one byte is stored in a predetermined byte position of register 3. This control is performed by hardware or a microprogram. Here, by performing the editing process eight times, data for one register 1 and register 3 is used. Therefore, by counting the number of editing processes in a microprogram and instructing data transfer from memory 10 to register 1 and data transfer from register 3 to memory 10 at a rate of 1 out of 8, smooth processing can be achieved. Processing can continue. On the other hand, the second operand, register 2
Since the amount of data required is irregular depending on the contents of the first operand, it is not necessarily possible to instruct data transfer from the memory 10 to the register 2 in eight editing processes. Therefore, the EDiT circuit 30 detects that all the data in the register 2 has been used and reports it to the microprogram 20 through the line 31.

The microprogram 20 reads m2 when the line 31 becomes '1'.
1 to instruct data transfer to register 2 (REQ2
When REQ2 is issued, the next 8 bytes of second operand data are transferred from memory 10 to register 2 via line 12.

(abbreviated as SF=: 'I' 2) In the conventional method,
Compared to the same editing process, it takes much longer to transfer data to register 2. For example, each of REQ2 and 5ET2 needs to be transferred once! This is equivalent to the g collection process, that is, the data transfer to register 2 takes about the same amount of time as the two editing processes.

Such processing will be explained in more detail using the flowchart shown in FIG.

Here, the content indicated by 402 indicates the processing by the microprogram, and the time required for one IJ collection process (called 1 step) is the content indicated by ◇. 5. For convenience, the time is O. Also, 'EDiT' is a one-time editing process, 'REQI
"REQ2" is the instruction to read the next 1 word data from the memory 10], the second operand, ' S ET ,
1 "S E T 2 ' is a data transfer instruction from memory 10 to register 1.2, '5TORIE' is a data transfer instruction from register 3 to memory 10, '[Emp
ty 1' determines whether or not the contents of register 1 will be used after two more editing processes, 'u+npty
2' indicates a determination as to whether all the contents of register 2 have been used, and 'Cont 1nu6' indicates a determination as to whether or not to continue the editing process.

First, if there is enough data in registers 1 and 2, editing processing for one step is performed in process 101, and both judgments 111 and 112 are unsuccessful, so process 1 is repeated.
018 Return. Since the register 1 only needs to be replenished with the next first operand data once every eight editing operations, the timing of replenishment can be predicted by counting the number of editing operations using a microprogram. The time required for the microprogram to instruct reading of the next 8 bytes of first operand data (abbreviated as REQl) and transfer the data from memory 10 to register 1 (abbreviated as SETl) is 2.
Suppose it is a step.

It is sufficient to detect the point in time when the contents of register 1 have 2 bytes remaining. For example, when the count value of the number of editing processes in the microprogram reaches 6, 'Emp' in judgment 112
ty 1' is established. When judgment 112 is established, the process moves to process 102, and the replenishment instruction R1ΣQ of the first operand is
1 and edit processing for 1 step EDiT
I do. If the contents of register 2 are sufficient, judgment 113 is not satisfied, and the process moves to process 103, where one step of editing processing EDiT is performed. Since the contents of register 1 are all used by this editing process, the first operand data 8 of "・;" corresponding to the REQI issued in process 102
Set byte to register 1 (SETl). Moreover, at the same time, register 3, which is the editing result, also becomes full.

In decision 114, which issues a storage instruction 5TORE from register 3 to memory 10, the first operand remains and #! Continuing the collection process (Conti uc) If kQ is determined, the process moves to judgment 111 and the process is continued. register 2
Whether or not the contents of register 2 have been used completely depends on the mask pattern as shown earlier, so it is not possible to make a reservation.
The flow of the microprogram is switched only after detecting ty2). Judgment 1] Empty at 1 2
When detected, the process moves to process 104. In process 104, the next 8-byte data preparation instruction REQ2 of the second operand is issued.
is issued, and then in process 105, register 2 is read from memory 10.
Data transfer 5ET2 to is performed. During this time, all registers 2 are in the used state, so editing processing cannot be performed.Similarly, after performing processing 102, Empt
If y2 is established in judgment 113, REQ2, 5ET1. is performed, but editing processing ED and L cannot be performed during this time as well.

As mentioned above, editing processing EDiT can be performed in processing 101, 102, and 103 (thick frame parts), but Empty2
Processing after 104, 105, 106゜107
Editing cannot be performed.

In this way, in the conventional editing command processing, processing steps 104 and 105 for replenishing the second operand in the register 28 are performed.
Or in steps 106 and 107, the editing process EDL
T cannot be performed, and editing processing must be interrupted, resulting in degraded performance.

[Purpose of the invention]

The purpose of the present invention is to solve the above-mentioned conventional drawbacks.
To provide a high-speed editing command processing system that smoothly supplies operand data to a register 2 and does not interrupt editing processing during this period.

[Summary of the invention]

In order to achieve the above object, in the editing instruction processing method of the present invention, a register 4 is provided between the memory and the register 2 to store data for one word next to the second operand, and
A latch is provided to indicate that the transfer from register 4 to register 2 has been performed, and when it is detected that all the contents of register 2 have been used, the transfer is performed from register 4 to register 2, and the latch is set to 1. It is characterized by

[Embodiments of the invention]

An embodiment of the present invention will be described below.

A block diagram of the first embodiment is shown in FIG. 6, and a flowchart is shown in FIG. 7.

Figure 6 shows a memory 1 compared to Figure 4 which shows a conventional processing device.
0 and register 2, register 4 is connected to EDiT circuit 30.
A latch 5 is added between the microprogram 20 and the microprogram 20. The other registers 1, 2, 3, etc. are almost the same. First, registers 1.2 and 1. Second
The first word (8 bytes) of operand data is stored, and the next word of the second operand is stored in register 4. One byte of data is extracted from each of the 8-byte registers 1 and 2, and HDiT times'Nt30
The file will be sent to the site for editing. The result is set one byte at a predetermined byte position in register 3.

One byte of register 1 is used in one editing process,
The result is set in 1 byte of register 3, but 1 byte of data is not necessarily used for register 2, and if the 1 byte data is not used, it will be used in the primary editing process.

The same 1-byte data is extracted from register 2.

Data transfer from memory 10 to register 1 and data transfer from register 3 to memory 10 are controlled by microprogram 20.

Since the data transfer is required once in every eight editing processes, the microprogram 20 counts and predicts the number of editing processing circuits. On the other hand, whether or not the contents of register 2 are all used.

Since this is known only after the editing process is actually performed, the EDiT circuit 30 detects this and sets the line 31 to '1'. line 3
When 1 becomes '1', latch 5 is set and data is transferred from register 4 to register 2. Register 4 is prepared with the next 1 word data, so when register 2 becomes empty, This means that the next data is immediately replenished, and it is possible to prevent processing from being interrupted due to the lack of data in register 2. Furthermore, the fact that latch 5 is set means that data has been transferred from register 4 to register 2, that is, register 4 is empty (Empty 4).
). Micro program 2
0 checks whether latch 5 is set, and if it is set, transfers the next 1 word of second operand data from memory 10 to register 4, completing setting to register 4. When this occurs, the latch 5 is reset.

During this time, there is 8 bytes worth of data in register 2, so if this process is executed within the time required for at least 8 editing processes, there will be no shortage of second operand data.

Microprogram 2 using the flowchart in Figure 7
0 processing will be explained. Here, the word code indicates microprogram processing and requires one editing processing time (one step). ◇ indicates the judgment of the microprogram, and for convenience, the time is 0. In the flowchart, 'EDiT' is one-time editing process, 'REQI' and 'REQ2' are memory 1
Instruction to read the next 1 word of the first and second operands from 0, '5ETI' / '5ET2' is the memory 10
or data transfer instruction to register 4, '5TORE'
is a data transfer instruction from register 3 to memory 10, 'E
mpty 1' determines whether the contents of register 1 will be used after two more editing processes, 'Empty4'
'Con' determines whether latch 5 is set or not.
tinue' indicates a determination as to whether or not to continue the editing process.

If there is enough data in registers 1 and 2, one step of editing processing is performed in process 201, and judgment 21 is performed.
Since both 1 and 212 are not satisfied, process 201 is performed again.
Return to Since the register 1 only needs to be replenished with the next first operand data once every eight editing operations, the replenishment time can be predicted by counting the number of edits using a microprogram. When there are only 2 bytes left in the contents of register 1, judgment 211 (E+npty 1) is established, so the process moves to process 202. In process 202, at the same time as the editing process (El]iT), the memory 10 is instructed to read the next first operand data (REQI).

In process 203, S E T 1 ,
5TOR [! 5 As a result, the contents of register 1 become used and at the same time the next word is set in register 1, so that editing processing can be continued. If the editing process is to be continued, the judgment 214 is established and the process returns to the process 201. When the contents of register 2 have all been used and the contents of register 4 have been transferred to register 2, that is, when latch 5 is set (Empty 4), judgment 212 is established, and the process moves to process 204.

In process 204, register 4 is empty, but register 2
Since there is data in , it is possible to perform editing processing, so HDiT and the second operand read instruction (REQ
Do 2). Thereafter, if Empty 1 is not established in judgment 213, the process moves to process 205. In process 205, [EDi
At the same time as T, a data transfer instruction (SET2) from the memory 10 to the register 4 is issued, and at the same time, the latch 5 is reset at 5ET2. If the judgment 19?213 is established, that is, if the replenishment of the second operand data and the replenishment of the first operand data occur consecutively, the process 20
Move on to 6. In process 206, +1EDjT and 5E at the same time
T2°REQI is performed, and the process moves to process 203. Processing 20
6 corresponds to a mixture of processes 202 and 205. In this way, register 2 is not refilled by a microprogram, but is refilled from register 4 by hardware, so that usable data always exists in register 2, so editing processing can be performed even in processes 204, 205, and 206. It became like that.

Furthermore, since register 4 only needs to be replenished within at least 8 steps when register 2 becomes used, E
Because there is no need to make a judgment of mpty 4.

After processing 202, processing 204, and processing 206, Em
There is no need to make a pty 4 judgment.

Next, the block diagram of the second embodiment is shown in FIG. 8, and the flowchart is shown in FIG. 9.The second embodiment is a modification of the first embodiment, and there is no difference in the basic concept.

Register 2' in FIG. 8 is equivalent to register 2 and register 4 in FIG. 6 arranged side by side, and is a 16-byte long register. Register 2' initially contains the first two words of the second operand.

Register 1 stores the first word of the first operand. One byte of data is extracted from each of the registers 1 and 2' and sent to the EDI circuit 30 for editing processing. The result is set in a predetermined byte position in register 3 one byte by one.

Data transfer from the memory 10 to the register 1 and data transfer from the register 3 to the memory 10 are performed under the control of the microprogram 20 every predetermined number of editing operations.

Data transfer from memory 10 to register 2' is performed by latch 2.
With reference to L or 2R, the processing is performed one word at a time in the first half or the second half of register 2'. When the first half of register 2' is used (for example, when the pointer for byte extraction is switched from byte 7 to byte 8), latch 2L is connected to line 3.
1 and is set when the second half is used in 2R. Microprogram 20 instructs data transfer from memory 10 via line 21 if latch 2L or 2R is set, and reads data via line 12; if 2L is set, @22 is turned on. After storing the data in the first half of the register 2', the latch 2L is reset. If 2R is set, line 23 is turned on, data is stored in the latter half of register 2', and then latch 2R is reset. That is, register 2
Data is replenished every time half of ' is used, and control is performed so that valid second operand data always exists in register 2'.

The flowchart in FIG. 9 will be briefly explained.

During EDiT processing (301), the shortage of the first operand is detected by 3.
If it is detected in step 11, then in judgments 302 and 303, the next operand data is supplied to register 1 while performing IEDiT processing. If the second operand is missing, the decision 312 is to latch 2.
If L or 2R is set, the process moves to step 304. If latch 2L is set, data is replenished in the first half of register 2' in process 305 (SET2L) L latch 2
If R is set, register 2' is set in process 306.
Replenish data (SET2R) in the second half of the first
If a shortage of operands is detected in judgment 313, processes 307 and 308 are executed in parallel with the data transfer instruction for the first operand. Since the latches 2L and 2R are never set at the same time, it is sufficient to look at either the latches 2L or 2R in judgments 314 and 315.

This method of alternately supplying data to the first half and the second half of the register 2' is a modification of the first embodiment. Also, register 2' may have a length of 1 word (8 bytes).
A modification example in which data is alternately replenished every 1/2 word in the second half can also be easily considered.

〔Effect of the invention〕

According to the present invention, in processing an editing command in which the required length of the second operand depends on the content of the first operand, data replenishment of the second operand can be smoothly performed, and the data replenishment process Since the editing process can be carried out in parallel, there is an effect that editing commands can be executed at high speed.

[Brief explanation of drawings]

Fig. 1 is an explanatory diagram comparing decimal numbers in the back format and zone format, Fig. 2 is an explanatory diagram of the control code used in the editing pattern, and Fig. 3 is an explanatory diagram when switching between significant and non-significant.
FIG. 4 is a block diagram of the conventional example, FIG. 5 is a flowchart of the conventional example, FIG. 6 is a block diagram of the first embodiment, FIG. 7 is a flowchart of the first embodiment, and FIG. 8 is a flowchart of the second embodiment. FIG. 9 is a block diagram of the second embodiment, and FIG. 9 is a flowchart of the second embodiment. 1.2, 3.4...Register, 10...Memory, 2
0...Micro program, 30...EDiT circuit, 5°2L, 2R...Latch.

Claims (1)

[Scope of Claims] In a processing device that executes an instruction for editing a packed decimal number in a second operand into zoned data according to a control code in a first operand, ) between the register 2 that holds the next word and the memory, there is a register 4 that holds the next one word, and a latch that indicates that the transfer from the register 4 to the register 2 has been performed, When it is detected that all the contents of register 2 have been used in editing processing, the data is transferred from register 4 to register 2 and the above latch is set, and when the next word of the second operand is set to register 4, the above latch is set. An editing command processing method characterized by resetting the .