JPS6286562A - Head switching signal formation circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a helical scan video tape recorder (hereinafter referred to as V') having a plurality of pairs of rotating video heads.
The present invention relates to a head switching signal forming circuit in the head switching signal forming circuit (abbreviated as l'R).

[Background of the invention]

In a helical scan type VTR, the video heads are usually spaced 180 degrees apart from each other on a rotating cylinder and placed at two positions.
The magnetic tape is scanned diagonally alternately to record video signals for one field on one video track, and these are connected sequentially to obtain a continuous playback signal. In the NTSC system, the position of the joint, that is, the switching timing of the video head, is normally determined by a head switching signal of 50 Hz, a duty ratio of 50 times, positive and negative pulses, and is set to a position approximately 7H before the vertical synchronization signal. Then, the head or cylinder servo works. and,
During reproduction, the ratio signal reproduced by the pair of video heads is converted into one track (one field) by the head switching signal (hereinafter also referred to as 5w3o signal).
The signals are switched alternately each time, forming a continuous video signal. This 5i30 signal will be described later, and is formed by adjusting the phase of a tack signal detected by a tack detection mechanism consisting of a tack magnet and a tack head to detect the rotational phase of the video head.

By the way, in addition to the standard tape speed recording and playback mode (SP mode), V
In the 'l'R, in order to improve the image quality, in addition to the SP head, two LP heads with a narrowed head width are arranged in a cross shape on a cylinder for one rotation. In such a case, the head switching signal must be generated separately for each mode, and SP/L
To detect the tack signal for each P, two sets of the tack magnet and tack head are required for S P/L P, and as a result, the head switching signal forming circuit becomes complicated and the number of parts increases. There is a problem that the tack detection mechanism is installed only in SP mode (or LP mode) as one solution to this problem.
The tack signal in SP mode (or LP mode) is produced by electrically shifting the phase of the tack signal in SP mode (or LP mode) by 90 degrees using circuit means such as a monomulti, and each tack signal is used. A possible method is to form each head switching signal using the following methods. However, this method has drawbacks when the phase shift amount of the tack signal varies widely due to the temperature and humidity characteristics of the capacitors and resistors used in the monomulti circuit, and the head switching timing is greatly deviated.

Incidentally, an example of an invention of a rotational phase signal generating device for a magnetic recording/reproducing device that is suitable for integration into an integrated circuit and related to this device is disclosed in Japanese Patent Application Laid-Open No. 1ifA59-119561.

[Purpose of the invention]

The purpose of the present invention is to solve the problems of the prior art described above,
It is an object of the present invention to provide a head switching signal forming circuit capable of accurately forming a head switching signal in both SP/LP modes using only a tack signal of one mode.

[Summary of the invention]

In order to achieve the above object, the present invention digitally shifts the phase of a detected tack signal corresponding to one pair of video heads among a plurality of pairs of video heads with high precision to form a pseudo tack signal. However, the present invention is characterized in that this signal is used to form head switching signals corresponding to other video head pairs.

[Embodiments of the invention]

The present invention will be explained below with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention, and shows an example in which the present invention is applied to a reproduction system of a VTR.

In FIG. 1, 1 is videotape% 2L.

2L is a rotary video head for LP mode recording and playback, which is attached to the rotary cylinder 5 at a distance of 180 degrees from each other. Also, a rotary video head for SP mode recording and playback is also attached to the 2-rotation cylinder 3. However, it is omitted in Fig. 1.The playback signal RF taken out from the video tape 1 by the rotating video head 2L, , 2L is sent to the servo device 8 and the video signal processing device 9. From the signal RF, the servo device 8 extracts only the pilot signal recorded on each track on the videotape 1 during recording, and uses it for tracking control during playback. It is driven and runs in the direction of the solid arrow.

This capstan 30 is rotationally driven by a capstan motor 7. - The rotary cylinder 3 is rotationally driven by a cylinder motor 6 and rotates in the direction of the dashed arrow.The rotary cylinder 3 is attached to a rotation shaft inclined to the longitudinal direction of the video tape 1, and the rotational frequency is 50Hz. rotate at a frame frequency of

Next, the operation of the head switching signal forming circuit 4 according to the present invention will be explained.

Video head 2L1 * 2L! After detecting the rotational phase of Th by the tack head 5 and amplifying it by the amplifier 10,
The signal is sent to the S P/L P switching circuit 11 as a signal. SP/
In the LP switching circuit 11, the S P sent from the terminal 26
/LP Switching signal M causes the signal Th to be directly switched as signal T3 in the SP mode.

It is sent to the mono multi circuit 15, and in the LP mode, it is sent to the phase shift circuit 12 as a signal pe.

In the phase shift circuit 12, the signal level is 90% compared to the signal T8.
The signal is phase-shifted and sent to the mono multi-circuit 13 as a signal. 14 is a time constant adjustment circuit.

Ninthly, adjusting the phase delay vi of the signal TLsTI by the monomulti circuit 13 according to the above-mentioned signal M according to the SP/LP mode; This is for adjusting the phase of a head switching signal, which will be described later. The time constant adjustment circuit 14 can be adjusted independently in both the sp mode and the LP mode. Signal Ch adjusted to a predetermined phase by the time constant adjustment circuit 14 and output from the mono multi-circuit 15
p is.

Head switching signal generation circuit (8150 signal generation circuit) 15
The head switching signal (SW30 signal) SW is sent to 50 Hz and has a duty ratio of 50 times positive and negative pulses. This head switching signal SW is sent to the servo device 8 and the video signal processing device 9, and in the servo device 8, it is used as a comparison signal for controlling the rotation phase of the rotary cylinder 30.
Further, in the video signal processing device 9, the signal is used as a signal for alternately switching the output from the video heads 2I, 2L, in order to obtain continuous video signals.

The servo device 8 is composed of a cylinder servo system and a capstan servo system, and each servo system is composed of a speed control system and a phase control system. In the phase control system, the phase error signal is obtained by comparing the phase of the reference signal corresponding to the frame frequency of the video and the 5w5o signal, The number of rotations and the rotational phase of the cylinder motor 6 are controlled by negative feedback using the control signal Dc+ which is generated by each of the two. The same applies to the capstan servo system, where a tracking error signal formed based on the above-mentioned reproduced pilot signal is added to a speed error signal obtained by frequency discrimination of the frequency power generation signal cf from the capstan motor 7. , thereby negatively feeding back the control signal CC to the capstan motor 7 to perform tracking control.

FIG. 2 is a schematic diagram showing the arrangement of the video heads 72:Vl''H shown in FIG.
2L, and 28. ．． 28. In this embodiment, the video head 2 is mounted in a cross shape at 90° intervals.
L, , 2L are for LP odd mode, video head 2S
I*2S2 is a head exclusively for SP mode.

FIG. 3 is a circuit diagram showing the circuit configuration of the head switching signal forming circuit of FIG. 1. In FIG. 3, functional blocks that are the same as those in FIG. 1 are indicated by the same reference numerals. In Figure 3, 16 is 12
Bit binary counter.

Reference numeral 17 is a six-man power AND gate, and reference numeral 18 is a 70-tube R87 lip.These K constitute the phase shift circuit 12. 19 and 20 are variable resistors, 21 is an SP/LP mode changeover switch, 22 is a capacitor, and 25 is a power supply terminal, and together these constitute a time constant adjustment circuit 14t.

It was. 29 is a power supply terminal, 30 is a resistor, 51 is a comparator, 32 is an NkND gate, 55 is an inverter, 3
4 is PH7, and these K constitute the multi-circuit 13. Others 25 are tack signal input terminals, 27
28 is a clock signal input terminal, and 28 is a head switching signal output terminal.

Further, FIG. 4 is a waveform diagram showing the signal waveforms of the respective main signals in FIG. 5. At 〇, the operation of the head switching signal forming circuit will be explained with reference to FIGS. 3 and 4.

The tack signal Ti1e inputted from the terminal 25 is transmitted to the video head 2S shown in FIG. 2 and used in the next SP mode.
, 28. The tack signal Tc, which is detected by the tack head 5 installed corresponding to the rotational phase of 0, is amplified by the amplifier 10 as described above and outputted as a logic level signal.

First, the operation in the KSPS-mode will be explained with reference to the waveform diagram of FIG. 4(a). In the SP mode, the S P/L P switching circuit 11 closes to the S contact in response to the SP/LP switching signal M input from the input terminal 26, and therefore the tack signal Th remains unchanged as the signal T8 in the S P/L P switching circuit. The signal is input to the monomulti circuit 13 via 11. At this time, the S P/L P mode changeover switch 21 of the time constant adjustment circuit 14
Since the S contact is closed by the SP/LP switching signal M, a time constant circuit determined by the capacitance of the capacitor 22 and the resistance value of the variable resistor 19 operates. Therefore, mono multi circuit 1
3, the signal T8 first becomes the signal G through the inverter 33f, and the SR, ! Entered into Tubu 70 Tubu. Figure 4(a)
As shown in FIG. 2, when the signal G becomes "L", the gate input J%@H' of the FI 134 becomes "L#", and the FET 54 becomes non-conductive. At this time, the capacitor 22 is charged from the power supply terminal 23 via the variable resistor 19, and the charging voltage CHP (SP) of the capacitor 22 gradually increases.

Note that this charging voltage CHP (SP) is applied to one terminal of the comparator 31, and a reference voltage is present at the child terminal.

f is applied ◎ Therefore, charging voltage CHP (SP)
increases and reaches the reference voltage Vref, the output of the comparator 31 changes from @H# to ``L'', and the SR flip 70 of the NAND gate 32 operates and FI? The gate input J of 34 becomes 1". With this,?
FB? 54 becomes conductive, and the charging voltage CHP(SP) of the capacitor 22 becomes zero instantaneously.Due to the operation of 0 or more, the multi-circuit 16 outputs the signal DT(SP), which is the inverted output of the signal J, as shown in FIG. In this way, the 1-mono multi circuit 13 outputs a waveform as shown in (a).
To make the charging waveform CHP (SP) of the capacitor 22, the signal D' is obtained by adjusting the phase of the tack signal Ill by a predetermined amount.
l'(SP) is formed.

Next, this signal DT (SP) is inputted to the head switching signal generation circuit 15, where, based on this signal DT (SP), the 50-chi
The head switching signal 5W (S
P) is formed 0 is formed and 9 head switching signal 8N(
SP) a Output from the output hook 28.

Next, let's look at the operation in % LP mode! This will be explained using the waveform diagram in FIG. 4(b).

In LP mode, by SP/LP switching signal M.

The S P/L P switching circuit 11 and the S P/L P mode switching switch 21 are respectively closed to L contacts. The above-mentioned tack signal is input as the signal T'X to the S terminal of the RS7 lip-flop 18 (hereinafter abbreviated as R8FF) in the 1-phase shift circuit 12. This input signal TH resets the %R8FF18. , its output Q is 1H”
From @L” and Nataku, binary counter 16 (hereinafter referred to as BC
) is released from the reset state. and BCl2
is the Pfr constant frequency supplied from terminal 27 (here 4
It is 48KHrt. ) clock signal CP is used as a clock to start counting.

Next, when the count value of BCl2 becomes N = 5752, that is, when &53 ma has passed after the tack signal ml is input, the output T of the AND gate 17 temporarily becomes @H# and 0. , this period of 53 ms is the 174th period of the period (515 ma) of the head switching signal SW, and the timing at which the signal T becomes ``H'' is determined by the SP video head 2S shown in FIG. ,,2S2 The phase of the tack signal corresponding to t-90@delayed.This corresponds to the phase of the tack signal corresponding to the LP video heads 2L, 2L2.This signal Tb is input to the S terminal of R8FF18 and is , set R8FF1B at the moment when it becomes 'H', and 1'K from its output Q ft@L' to 0. Therefore, BC
l2 is reset and all its outputs become @'L#, and the output T of the AND gate 17 immediately changes from 'H' to 'L#.The output q of R5FF18 is input to the S terminal. Signal T.

However, BCl2 remains reset because it does not change until it becomes "H" next time. Also, this signal TL is S
The signal is input to the mono multi circuit 15 via the L contact of the P/L P switching circuit 11. - 10,000, as mentioned above, since the mode is LP mode, the S P/LP mode changeover switch 21 in the time constant adjustment circuit 14 is also closed to the L@ point. Therefore,
When the signal is received, the mono multi-circuit 15 operates in the same manner as explained in the SP momo time, and the time constant circuit determined by the resistance value of the variable resistor 20 and the capacitance value of the capacitor 22 operates, and the capacitor 22 is charged. The waveform CHP(LP) becomes as shown in FIG. 4(b). Therefore, the monomulti circuit 15
Then, according to this time constant, a signal D'I' (LP) is formed and outputted by adjusting the phase of the signal Ill by a predetermined amount.

In addition, the above-mentioned R8FF18 receives the next tack signal l1lG(
50H2) is reset, the output Q becomes L#, and the BC16 is reset again and starts counting. After this, the above-mentioned operation is repeated.

Therefore, every time the 30 Hz tack signal T arrives, the mono multi circuit 13 generates a signal T, fiI, which is the phase of the signal Tc shifted by 90#, as shown in FIG. 4 (1)). A signal D'l' (LP) with a phase delay of 5 is generated. Furthermore, based on the signal DT (LP), the head switching signal generation circuit 15 generates L, which becomes a 50% CD 5.0 Hz positive/negative pulse, as in the case of SP momo.
Outputs head switching signal 5W (LP) in P mode.

As explained above, according to this embodiment, the SP mode video head 28. ．． 2S, detects only the tack signal corresponding to LP mode video head 2Ltl 2I1
The tack signal corresponding to No. 2 is formed by digitally shifting the phase of the detected tack signal by 90° mainly using the binary counter 16 and the AND gate 17. A highly accurate head switching signal can be obtained.

In this embodiment, two pairs of heads for SP/LP are used as video heads, and the tack signal corresponding to the SP video head is used to correspond to the LP video head. On the contrary, the method for forming a pseudo tack signal is based on the tack signal compatible with the LP video head.
A pseudo tack signal compatible with the SP video head may be generated. In addition, in this embodiment, the case where the upper two pairs of heads for % SP/LP mode are used is explained, but even if more than one pair of video heads is used, one of the pairs of video heads can be used. It goes without saying that a pseudo tack signal for another pair of video heads can be similarly formed using the tack signal obtained, and a head switching signal corresponding to the tack signal can be formed. In a VTR having a plurality of pairs of rotating video heads, the head switching signal when each video head is used is digitally increased using only the tack signal detected corresponding to the phase of the pair of video heads. Can be formed with precision. This eliminates the need for multiple tack nets and tack heads for multiple pairs of video heads, reducing the number of parts.

It has the effect of downsizing the device and reducing costs. Also, the circuit format of the present invention is suitable for integrated circuits, and by integrating this as a digital IC with the main servo circuit on one chip, one circuit can be miniaturized. ◇

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention. Fig. 2 is a schematic diagram showing the arrangement of the video head on the S P/L P common rotary cylinder, Fig. 3 is a circuit diagram showing the circuit configuration of the head switching signal forming circuit in Fig. 3
FIG. 3 is a waveform diagram showing signal waveforms of each part in the figure. 5... Tack head 11... S P/L P switching circuit 12... Phase shift circuit 15... Mono multi circuit 14... Time constant p4 adjustment circuit 15... Head switching signal generation circuit 16 ...Binary counter 17...AND gate 18...RS flip 70p'jjjz mouth 40th (ku)

Claims (1)

[Claims] 1) In a helical scan video tape recorder having a plurality of pairs of video heads attached to a rotating cylinder, at least one of the plurality of pairs of video heads
Rotational phase detection means detects the rotational phase of the paired video head and outputs a detection signal corresponding to the rotational phase, and each time a detection signal is output from the detection means, the reset state is released and the clock from the clock source is released. A counter that starts counting according to a signal, and a count value of the counter is detected and a signal is output when the count value matches a value corresponding to a rotational phase difference between the one pair of video heads and the other pair of video heads. and a decoder for forming a head switching signal representing switching timing of each video head in the video head pair with respect to the other pair of video heads, using an output signal from the decoder. A head switching signal forming circuit in a scan type video tape recorder.