JPS6287984A - Screen memory access system - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Summary] The present invention provides a screen memory access method in which the display time of 01L'r in a raster scan method is divided into two, and screen memory access display and refresh are selectively performed.
In accessing the screen memory for display, two units of addresses are generated by combining consecutive address components in the first and second half of the display time.

For example, nipple mode access is performed, and access for refreshing the screen memory is performed in the latter half of the display time, thereby enabling high-speed access without using high-speed memory.

[Industrial application field]

The present invention relates to an improvement of a screen memory access method that divides the display time of a raster scan type CT into two and selectively performs screen memory access display and refresh.

[Conventional technology]

Conventionally, the display time of a Rusk scan type CRT is divided into two parts. Devices that selectively perform screen memory access display and refresh as the second access are often used. FIG. 4(α) is an explanatory diagram of the configuration of this type of conventional example, and FIG. 4(b) is an explanatory diagram of its operation.

In the figure (a), the address of the processing device (optr) i.

Connected to the data bus 10, input the display address of data in bytes or words into the selector 3 via the ORT controller (0 几To) 2, select the display, and transfer the data from the screen memory 4 through the normal procedure (omitted). Displayed on the screen of the 0-T5 using the Rusk scan method. On the other hand, the selector 3 selects refresh based on a command from the OPU 1, accesses the screen memory 4, and performs refresh according to a predetermined program.

In this case, the display period of the CRT cannot be refreshed by a command from the CPU, and fi-6 [problem to be solved by the invention] Display time is approximately 40
Requires 0 na. On the other hand, it is efficient to divide this display time into two and use one for display and the other for refreshing. However, since it would be difficult to display 16-bit word unit data using a normal screen memory of 200 TLa, there was no choice but to use a high-speed memory.

The object of the present invention is to provide a screen memory access method in which one display time of block data in screen memory is divided into two, one for display access and the other for IY refresh access, without using high-speed memory. Our goal is to provide the following.

[Means for solving problems]

To achieve the above object, according to the present invention, when accessing the screen memory for display, two units of address are generated by combining address components read in the first half and the second half of the display time of the screen memory. For example, a nipple mode access method is used, and access for refreshing the screen memory is performed in the latter half of the display time.

[For production]

According to the above configuration), the configuration of the nipple mode access Id and address is as shown in the principle explanatory diagram of FIG. B
1 to get the first address (AD) 01 of ■, and the combination of (As) A of ■ and B2 of (OA8) to get the second address (AD) 02 of ■. It is possible to access two units of data during one display time.

Here we show a simplified example of the address, A=”
DO”, B= “00”, B2= “01”, then 01=10000”, 02=”0001” 0
27 The data obtained by tracing is output.

〔Example〕

Figure 1 is an explanatory diagram of the configuration of an embodiment of the present invention.
~■ are the operation waveform diagrams.

In FIG. 1, the difference from the configuration of the conventional example shown in FIG. 4 (α) is that the selector 3 selects either the display access time from 0⇓TO2 or the refresh time from the OPU, and sends it directly to the screen memory 4. Rather, after being stored in the buffer 12, in the first display access, the data corresponding to the two addresses are read out under nibble mode control, that is, AS10AS control, based on the principle shown in FIG. , is written to register 13. This data is displayed on T5 via the digital camera conversion circuit 14.

On the other hand, the second refresh access is performed directly from the buffer 12 to the screen memory 4.

Timing control of these circuits is performed by a control circuit 11.

In other words, for selector 3, control signal ■ causes 0
Switching control between RTO 2 and OPU 1 is carried out, and the register 16 is controlled by the control signal 2 for two data @ combined in one display time, and the conversion circuit 14 is controlled by the control signal 0. @ conversion control is performed.

FIGS. 2-2 show the above operating waveforms. The basic clock (OLK) of ■ in the same figure is 1/2 of ■ in the same figure.
0LK corresponds to one display time of nipple mode access explained in FIG. 6, the first half is used for display access by 0RTO, and the second half is used for refresh access by OPU. Display access by CTO2 is controlled by AS10AS from CTO2 to the screen memory 4, and the address component I31 of the OAS in the same figure and the address component I31 of the OAS in the same figure. By the combination of B2, the address (AD)OH shown in ■ in the same figure.

Data corresponding to 02 is read out and stored in the register 16 shown in FIG. The conversion of this data @ is controlled by the control signal at the conversion timing shown in (2) in the same figure.

〔Effect of the invention〕

As explained above, according to the present invention, when accessing the screen memory for display, two units of addresses are generated by combining address components read out in the first and second half of the display time of the screen memory. For example, a nipple mode access method is used, and access for refreshing the screen memory is performed in the latter half of the display time.

This allows, for example, a 16-bit block t-400t
It is possible to divide the normal screen memo 'Jt-2 displayed on the ss and display two units of data while refreshing. be.

[Brief explanation of drawings]

Fig. 1 is a configuration explanatory diagram of an embodiment of the present invention, Fig. 2 is an operation waveform diagram of an embodiment of the present invention, Fig. 3 is an explanatory diagram of the principle of nipple mode access, and Fig. 4 (α), (b). is an explanatory diagram of a conventional example. In the figure, 1 is a processing device, 2 is an ORT controller, 3 is a selector, 4 is a screen memory, 5 is 0T, 1
1 is a control circuit, 12 is a buffer, 13 is a register, 14
indicates a VS conversion circuit.

Claims (2)

[Claims] (1) In a display device that reads data written to a screen memory and displays it on a raster scan CRT under the control of a processing unit (CPU), the processing unit divides the display time into two and A screen memory access method that performs a first access and a second access, wherein the first access obtains two units of display data from the screen memory in the first half of the display time, and A screen memory access method characterized in that the second access is performed in the second half of the display time. (2) In the first access, the address has a horizontal component and first and second vertical components, and the first unit address is obtained from the horizontal component and the first vertical component in the first half of the display time, and in the second half. 2. The screen memory access method according to claim 1, wherein the screen memory access method is a nipple mode access in which a second unit address is obtained from a horizontal component and a second vertical component.