JPS6288425A - Drive circuit for semiconductor device - Google Patents
Drive circuit for semiconductor deviceInfo
- Publication number
- JPS6288425A JPS6288425A JP60229607A JP22960785A JPS6288425A JP S6288425 A JPS6288425 A JP S6288425A JP 60229607 A JP60229607 A JP 60229607A JP 22960785 A JP22960785 A JP 22960785A JP S6288425 A JPS6288425 A JP S6288425A
- Authority
- JP
- Japan
- Prior art keywords
- current
- power supply
- circuit
- inductance
- semiconductor switch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Thyristor Switches And Gates (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、サイリスタGTOサイリスク(ゲートターン
オフサイリスク)、トランジスタなどの電流駆動形半導
体デバイスの駆動回路に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a drive circuit for a current-driven semiconductor device such as a thyristor GTO thyrisk (gate turn-off thyrisk) or a transistor.
かかる半導体デバイスとしてGTOサイリスクを例にと
ると、従来第3図に示すようにGTOサイリスタ6のゲ
ート、カソード間にはオン側電源回路とオフ側電源回路
とが並列に接続され、このうちオン側電源回路ではオン
側直流電源1、抵抗5及び半導体スイッチ3を端子に直
列に接続して構成し、オフ側電源回路ではオフ側直流電
源1と半導体スイッチ4とを直列に接続している。Taking GTO thyristor 6 as an example of such a semiconductor device, conventionally an on-side power supply circuit and an off-side power supply circuit are connected in parallel between the gate and cathode of the GTO thyristor 6, as shown in FIG. The power supply circuit has an on-side DC power supply 1, a resistor 5, and a semiconductor switch 3 connected in series to terminals, and an off-side power supply circuit has an off-side DC power supply 1 and a semiconductor switch 4 connected in series.
このようにしてオン側電源回路では、半導体スイッチ3
が閉じたときに電源1から流れる出力電流を抵抗5によ
り制限してゲートに与える。In this way, in the on-side power supply circuit, the semiconductor switch 3
When the gate is closed, the output current flowing from the power source 1 is limited by the resistor 5 and applied to the gate.
しかし、前記従来回路では、オン側出力電流の制限用に
抵抗5を用いているため、この抵抗5が損失を発生し、
特に大容量のGTOサイリスクの場合にはこの抵抗5で
の損失が増大して抵抗自体が大型化し、ひいてはプリン
ト基板内にこの抵抗5が納まらず、回路全体が大型化し
てしまうという欠点があった。However, in the conventional circuit, since the resistor 5 is used to limit the on-side output current, this resistor 5 generates a loss.
Particularly in the case of a large-capacity GTO Cyrisk, the loss in this resistor 5 increases and the resistor itself becomes larger, which in turn has the disadvantage that this resistor 5 cannot fit inside the printed circuit board, making the entire circuit larger. .
本発明の目的は、出力電流の制限を抵抗を用いずにすむ
ので、損失が少なく小型化される半導体デバイスの駆動
回路を提供することにある。SUMMARY OF THE INVENTION An object of the present invention is to provide a drive circuit for a semiconductor device that can limit output current without using a resistor, thereby reducing loss and reducing the size of the circuit.
本発明は前記目的を達成するため、電流駆動形半導体デ
バイスへの駆動電流出力回路にインダクタンスを介在さ
せ、また、このインダクタンスにかかる電圧を正負に交
互に切換える手段を設けたことを要旨とするものである
。In order to achieve the above object, the present invention is characterized in that an inductance is interposed in a drive current output circuit for a current-driven semiconductor device, and means is provided for alternately switching the voltage applied to this inductance between positive and negative. It is.
本発明によれば、半導体デバイスへの駆動出力電流をイ
ンダクタンスを介して流し、この出力電流の制御は、こ
のインダクタンスの電圧を交互に正負にすることによっ
て行なう。その結果、回路の効率向上及び小型化が得ら
れる。According to the present invention, a drive output current to a semiconductor device is caused to flow through an inductance, and this output current is controlled by alternately making the voltage of this inductance positive and negative. As a result, the efficiency of the circuit can be improved and the size can be reduced.
以下、図面について本発明の実施例を詳細に説明する。 Embodiments of the present invention will be described in detail below with reference to the drawings.
第1図は本発明の半導体デバイスの駆動回路の第1実施
例を示すもので、前記従来例を示す第3図と同様、GT
Oサイリスク6の駆動回路の場合である。FIG. 1 shows a first embodiment of a driving circuit for a semiconductor device according to the present invention, and similar to FIG. 3 showing the conventional example, GT
This is the case of the drive circuit of OSIRISK6.
本発明では、インダクタンス9が駆動電流出力回路中で
、オン側直流電源1と直列にGTOサイリスタ6のゲー
ト、カソード端子に対して接続され、さらにこのオン側
直流電源1と半導体スイッチ3の直列回路と並列に減流
用直流電源7と半導体スイッチ8の直列回路が接続され
ている。In the present invention, the inductance 9 is connected to the gate and cathode terminal of the GTO thyristor 6 in series with the on-side DC power supply 1 in the drive current output circuit, and the inductance 9 is connected to the gate and cathode terminal of the GTO thyristor 6 in series with the on-side DC power supply 1 and the semiconductor switch 3. A series circuit of a DC power source 7 for current reduction and a semiconductor switch 8 is connected in parallel with.
また、前記インダクタンス9とGTOサイリスタ6のゲ
ート間に電流検出器10が設けられ、その出力側に比較
演算器Ifが接続され、該比較演算器11の出力側には
論理反転器12を介して半導体スイッチ8が、及び直接
に半導体スイッチ3が接続される。Further, a current detector 10 is provided between the inductance 9 and the gate of the GTO thyristor 6, and a comparison calculator If is connected to the output side of the current detector 10, and a logic inverter 12 is connected to the output side of the comparison calculator 11. A semiconductor switch 8 and directly a semiconductor switch 3 are connected.
次に動作について説明すると、半導体スイッチ3を閉じ
るとオン側直流電源1からの電流がGTOサイリスタ6
のゲートに加えられオンするが、この場合、インダクタ
ンス9の電流iを、半導体スイッチ3を閉した時オン側
直流電源lによって増加させ、半導体スイッチ8を閉し
た時減流用直流電源7によって減少させることによって
、jの平均値を制御することができる。ただし、半導体
スイッチ3及び8番よ同時ムこけ閉しないものとする。Next, to explain the operation, when the semiconductor switch 3 is closed, the current from the on-side DC power supply 1 is transferred to the GTO thyristor 6.
In this case, when the semiconductor switch 3 is closed, the current i in the inductance 9 is increased by the on-side DC power supply l, and when the semiconductor switch 8 is closed, it is decreased by the current reduction DC power supply 7. By doing this, the average value of j can be controlled. However, semiconductor switches 3 and 8 must not be closed at the same time.
また、出力電流iの平均値を制御するために、電流検出
器10の出力信号Iと設定電流値■*を比較演算11で
比較、演算して半導体スイッチ3及び8のオン幅制御を
行なう。ただし、論理反転器12は半導体スイッチ3の
オン、オフに対して半導体スイッチ8をオン、オフさせ
るために用いる。Further, in order to control the average value of the output current i, the output signal I of the current detector 10 and the set current value ■* are compared and calculated in a comparison calculation 11 to control the ON width of the semiconductor switches 3 and 8. However, the logic inverter 12 is used to turn the semiconductor switch 8 on and off in response to the on and off of the semiconductor switch 3.
第2図は本発明の駆動回路の第2実施例を示すもので、
前記第1図の第1実施例と相違する点は、減流用直流電
源として第3図に示したオフ側直流電源2を用い、回路
の共通化を行なったものであり、さらに、インダクタン
ス9に半導体スイッチ13を並列に接続し、GTOサイ
リスタ6をオフさせる場合には半導体スイッチ4のみな
らず、この半導体スイッチ13をも閉じるようにした点
で、これにより半導体スイッチ13がない時に比べより
急しゅんな負の出力電流が得られる。FIG. 2 shows a second embodiment of the drive circuit of the present invention.
The difference from the first embodiment shown in FIG. 1 is that the off-side DC power supply 2 shown in FIG. When the semiconductor switch 13 is connected in parallel and the GTO thyristor 6 is turned off, not only the semiconductor switch 4 but also the semiconductor switch 13 is closed. A negative output current can be obtained.
なお、前記第1実施例、第2実施例いずれの場合もイン
ダクタンス9は、半導体スイッチ3および8.又は4の
スイッチ周波数が充分高い時には、配線インダクタンス
分のみで充分である。In both the first and second embodiments, the inductance 9 is connected to the semiconductor switches 3 and 8. Alternatively, when the switch frequency of No. 4 is sufficiently high, only the wiring inductance is sufficient.
以上述べたように本発明の半導体デバイスの駆動回路は
、従来の減流抵抗を用いた駆動回路に比べて抵抗による
損失がな(なるので、効率が向上し、さらに回路全体が
小型化されるものである。As described above, the semiconductor device drive circuit of the present invention has less loss due to resistance than the conventional drive circuit using a current reducing resistor, so efficiency is improved and the entire circuit is miniaturized. It is something.
第1図は本発明の半導体デバイスの駆動回路の第1実施
例を示す回路図、第2図は同上第2実施例を示す回路図
、第3図は従来例を示す回路図である。
1・・・オン側直流電源 2・・・オフ側直流電源3
・・・半導体スイッチ 4・・・半導体スイッチ5・
・・抵抗 6・・・GTOザイリスタ7・
・・減流用直流電源 8・・・半導体スイッチ9・・
・インダクタンス 10・・・電流検出器11・・・
比較演算器 12・・・論理反転器13・・・半
導体スイッチFIG. 1 is a circuit diagram showing a first embodiment of a driving circuit for a semiconductor device according to the present invention, FIG. 2 is a circuit diagram showing a second embodiment of the same, and FIG. 3 is a circuit diagram showing a conventional example. 1...On side DC power supply 2...Off side DC power supply 3
...Semiconductor switch 4...Semiconductor switch 5.
...Resistance 6...GTO Zyristor 7.
...DC power supply for current reduction 8...Semiconductor switch 9...
・Inductance 10...Current detector 11...
Comparison calculator 12...Logic inverter 13...Semiconductor switch
Claims (1)
ダクタンスを介在させ、また、このインダクタンスにか
かる電圧を正負に交互に切換える手段を設けたことを特
徴とする半導体デバイスの駆動回路。1. A drive circuit for a semiconductor device, characterized in that an inductance is interposed in a drive current output circuit for a current-driven semiconductor device, and means is provided for alternately switching the voltage applied to the inductance between positive and negative.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60229607A JPS6288425A (en) | 1985-10-14 | 1985-10-14 | Drive circuit for semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60229607A JPS6288425A (en) | 1985-10-14 | 1985-10-14 | Drive circuit for semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6288425A true JPS6288425A (en) | 1987-04-22 |
| JPH0473807B2 JPH0473807B2 (en) | 1992-11-24 |
Family
ID=16894826
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60229607A Granted JPS6288425A (en) | 1985-10-14 | 1985-10-14 | Drive circuit for semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6288425A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2001013501A1 (en) * | 1999-08-13 | 2001-02-22 | York International Corporation | Highly efficient driver circuit for a solid state switch |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56166635A (en) * | 1980-05-26 | 1981-12-21 | Hitachi Ltd | Gate circuit of gate turn-off thyristor |
| JPS5769482U (en) * | 1980-10-13 | 1982-04-26 |
-
1985
- 1985-10-14 JP JP60229607A patent/JPS6288425A/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56166635A (en) * | 1980-05-26 | 1981-12-21 | Hitachi Ltd | Gate circuit of gate turn-off thyristor |
| JPS5769482U (en) * | 1980-10-13 | 1982-04-26 |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2001013501A1 (en) * | 1999-08-13 | 2001-02-22 | York International Corporation | Highly efficient driver circuit for a solid state switch |
| US6404265B1 (en) | 1999-08-13 | 2002-06-11 | York International Corporation | Highly efficient driver circuit for a solid state switch |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0473807B2 (en) | 1992-11-24 |
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