JPS6289650U - - Google Patents
Info
- Publication number
- JPS6289650U JPS6289650U JP18019085U JP18019085U JPS6289650U JP S6289650 U JPS6289650 U JP S6289650U JP 18019085 U JP18019085 U JP 18019085U JP 18019085 U JP18019085 U JP 18019085U JP S6289650 U JPS6289650 U JP S6289650U
- Authority
- JP
- Japan
- Prior art keywords
- timer
- fluorescent lamp
- circuit
- stamp manufacturing
- stamp
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Discharge-Lamp Control Circuits And Pulse- Feed Circuits (AREA)
Description
第１図は、本考案によるスタンプ印製造装置の
タイマ回路の実施例を示した回路図、第２図は、
前記実施例回路に用いられるサーミスタの取付け
位置を説明するための図である。第３図は、本考
案の温度補償の原理を説明するための図である。
第４図は、本考案によるスタンプ印製造装置の温
度補償付きタイマ回路の露光回数とタイマ時間の
関係を示した図である。第５図は、スタンプ印製
造装置の基本的構成を示した図である。
１……筐体、２……載置台、３……蓋体、４…
…弾性体、５……露光用光源、１０……電源回路
、１１……タイマ用コンデンサ、１２……タイマ
用可変抵抗器、１３……トランジスタ回路、１４
……リレー回路、１５……蛍光灯点灯回路、１６
……蛍光灯、１７……スタートスイツチ、１８…
…サーミスタ、１９……ペースト半液体。
FIG. 1 is a circuit diagram showing an embodiment of the timer circuit of the stamp manufacturing apparatus according to the present invention, and FIG.
FIG. 3 is a diagram for explaining the mounting position of a thermistor used in the embodiment circuit. FIG. 3 is a diagram for explaining the principle of temperature compensation of the present invention.
FIG. 4 is a diagram showing the relationship between the number of exposures and the timer time of the temperature compensated timer circuit of the stamp manufacturing apparatus according to the present invention. FIG. 5 is a diagram showing the basic configuration of the stamp manufacturing apparatus. 1... Housing, 2... Mounting table, 3... Lid body, 4...
... Elastic body, 5 ... Light source for exposure, 10 ... Power supply circuit, 11 ... Capacitor for timer, 12 ... Variable resistor for timer, 13 ... Transistor circuit, 14
... Relay circuit, 15 ... Fluorescent lamp lighting circuit, 16
...Fluorescent light, 17...Start switch, 18...
...Thermistor, 19...Paste semi-liquid.
Claims (1)
ガ用フイルム原板の感光材料層を硬化させるとと
もに、その作成したネガフイルムの透過光により
スタンプ材の感光硬化樹脂層を硬化させてスタン
プ印を製造するスタンプ印製造装置に使用され、
前記蛍光灯の動作開始時に充電されるタイマ用コ
ンデンサと、前記蛍光灯の動作開始時から前記タ
イマ用コンデンサに接続されその電荷を放電させ
るタイマ用抵抗と、前記タイマ用抵抗の放電電流
が一定値以下になつたときに前記蛍光灯を消灯さ
せる回路からなるスタンプ印製造装置のタイマ回
路において、前記タイマ用抵抗に前記蛍光灯に接
近して配置されたサーミスタを用い、前記蛍光灯
が低温で動作しているときにはタイマ時間を伸ば
すように構成したことを特徴とするスタンプ印製
造装置の温度補償付きタイマ回路。 (2) 前記サーミスタは、前記蛍光灯にペースト
半液体を介して取付けられた実用新案登録請求の
範囲第１項記載のスタンプ印製造装置の温度補償
付きタイマ回路。[Scope of Claim for Utility Model Registration] (1) A fluorescent lamp is turned on and the light transmitted through the document cures the photosensitive material layer of the negative film original plate, and the light transmitted through the created negative film cures the photosensitive hardening resin of the stamp material. Used in stamp manufacturing equipment that manufactures stamps by curing layers.
a timer capacitor that is charged when the fluorescent lamp starts operating; a timer resistor that is connected to the timer capacitor and discharges its charge from the time the fluorescent lamp starts operating; and a discharge current of the timer resistor that is a constant value. In a timer circuit of a stamp manufacturing device, which includes a circuit that turns off the fluorescent lamp when A timer circuit with temperature compensation for a stamp manufacturing device, characterized in that the timer circuit is configured to extend the timer time when the timer is running. (2) The temperature-compensated timer circuit for a stamp manufacturing apparatus according to claim 1, wherein the thermistor is attached to the fluorescent lamp via a semi-liquid paste.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18019085U JPH046029Y2 (en) | 1985-11-22 | 1985-11-22 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18019085U JPH046029Y2 (en) | 1985-11-22 | 1985-11-22 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6289650U true JPS6289650U (en) | 1987-06-08 |
| JPH046029Y2 JPH046029Y2 (en) | 1992-02-19 |
Family
ID=31123920
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18019085U Expired JPH046029Y2 (en) | 1985-11-22 | 1985-11-22 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH046029Y2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6465268B2 (en) | 1997-05-22 | 2002-10-15 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing an electro-optical device |
-
1985
- 1985-11-22 JP JP18019085U patent/JPH046029Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPH046029Y2 (en) | 1992-02-19 |
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