JPS6310566U - - Google Patents

Info

Publication number
JPS6310566U
JPS6310566U JP1986104310U JP10431086U JPS6310566U JP S6310566 U JPS6310566 U JP S6310566U JP 1986104310 U JP1986104310 U JP 1986104310U JP 10431086 U JP10431086 U JP 10431086U JP S6310566 U JPS6310566 U JP S6310566U
Authority
JP
Japan
Prior art keywords
heat sink
groove
external terminal
semiconductor substrate
solder pool
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1986104310U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1986104310U priority Critical patent/JPS6310566U/ja
Publication of JPS6310566U publication Critical patent/JPS6310566U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/547—Dispositions of multiple bond wires
    • H10W72/5475—Dispositions of multiple bond wires multiple bond wires connected to common bond pads at both ends of the wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
JP1986104310U 1986-07-09 1986-07-09 Pending JPS6310566U (it)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1986104310U JPS6310566U (it) 1986-07-09 1986-07-09

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986104310U JPS6310566U (it) 1986-07-09 1986-07-09

Publications (1)

Publication Number Publication Date
JPS6310566U true JPS6310566U (it) 1988-01-23

Family

ID=30977686

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986104310U Pending JPS6310566U (it) 1986-07-09 1986-07-09

Country Status (1)

Country Link
JP (1) JPS6310566U (it)

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