JPS631065A - Manufacture of schottky barrier diode - Google Patents

Manufacture of schottky barrier diode

Info

Publication number
JPS631065A
JPS631065A JP14533486A JP14533486A JPS631065A JP S631065 A JPS631065 A JP S631065A JP 14533486 A JP14533486 A JP 14533486A JP 14533486 A JP14533486 A JP 14533486A JP S631065 A JPS631065 A JP S631065A
Authority
JP
Japan
Prior art keywords
film
molybdenum
schottky barrier
silicon dioxide
silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14533486A
Other languages
Japanese (ja)
Inventor
Hisatomo Kanazawa
金沢 久友
Teruyuki Kasashima
笠島 輝之
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP14533486A priority Critical patent/JPS631065A/en
Publication of JPS631065A publication Critical patent/JPS631065A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To realize the excellent contact of silicon and an silicon dioxide film by using a molybdenum film formed at a fixed speed of evaporation as a barrier layer. CONSTITUTION:An N<+> type silicon epitaxial layer 2 having resistivity of 1OMEGAcm and thickness of 5mum is shaped onto an N-type silicon substrate having resistivity of 0.002OMEGAcm, and the upper section of the layer 2 is oxidized by dried oxygen to form an silicon dioxide film 3 having thickness of approximately 3000Angstrom . The film 3 in a region in which a Schottky barrier is shaped is removed, and a molybdenum film 4 in 4000Angstrom , a titanium film 5 in 1000Angstrom and an Al film 6 in 50000Angstrom are formed continuously through an electron beam method. The films 6, 5, 4 are etched in succession, thus acquiring a Schottky barrier diode. In this case, the speed of evaporation of molybdenum is brought to 5-25Angstrom /sec, and the molybdenum film 4 is employed as a barrier layer.

Description

【発明の詳細な説明】 産業上の利用分野 本発明はショットキーバリアダイオード特にモリブデン
をバリア層とするショットキーバリアダイオードの製造
方法に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for manufacturing a Schottky barrier diode, particularly a Schottky barrier diode using molybdenum as a barrier layer.

従来の技術 従来、バリア金属としてモリブデンを用いたショットキ
ーバリアダイオードを製造する場合、通常モリブデンは
真空蒸着によりN型シリコン基板上に蒸着していた。こ
の場合シリコン基板は複数個のショットキーバリアダイ
オードを形成するため隣接するダイオード間は、二酸化
珪素膜で絶縁されている。
BACKGROUND OF THE INVENTION Conventionally, when manufacturing a Schottky barrier diode using molybdenum as a barrier metal, molybdenum was usually deposited on an N-type silicon substrate by vacuum deposition. In this case, since the silicon substrate forms a plurality of Schottky barrier diodes, adjacent diodes are insulated by a silicon dioxide film.

発明が解決しようとする問題点 上述の方法でモリブデンを真空蒸着した場合、しばしば
シリコンと二酸化珪素膜との段差部においてモリブデン
膜がはがれ、ショットキーバリアダイオードの性能およ
び歩留りをそこなう原因となっていた。本発明は、従来
例にみられた問題を排除するものであり、モリブデン膜
がはかれることなくシリコンと二酸化珪素膜の良好な接
触を実現するものである。
Problems to be Solved by the Invention When molybdenum is vacuum-deposited using the above-described method, the molybdenum film often peels off at the step between the silicon and silicon dioxide films, causing deterioration in the performance and yield of the Schottky barrier diode. . The present invention eliminates the problems seen in the prior art and achieves good contact between silicon and silicon dioxide films without peeling off the molybdenum film.

問題点を解決するための手段 本発明は、モリブデンをバリア金属として用いたショッ
トキーバリアダイオードの製造方法を提供するも6ので
、特にモリブデンを真空蒸着により蒸着する場合の蒸着
速度を規制することにより、二酸化珪素膜とシリコン基
板との段差部で生じるはがれを皆無にしようとするもの
である。
Means for Solving the Problems The present invention provides a method for manufacturing a Schottky barrier diode using molybdenum as a barrier metal. This is intended to completely eliminate peeling that occurs at the step portion between the silicon dioxide film and the silicon substrate.

発明者らは、シリコン基板上に二酸化珪素膜とシリコン
の段差を有する種々の条件下でモリブデンを蒸着したと
ころ、モリブデンの蒸着速度を5〜25Å/secに規
制することがはがれ防止に重要であることがわかった。
The inventors deposited molybdenum on a silicon substrate under various conditions with a step difference between a silicon dioxide film and silicon, and found that it is important to regulate the molybdenum deposition rate to 5 to 25 Å/sec to prevent peeling. I understand.

作用 モリブデンの蒸着速度を5〜25Å/secにして蒸着
した場合、二酸化珪素膜とシリコンの段差部ではがれる
ことなくショットキーバリアダイオードを形成すること
ができる。これは蒸着速度を小さくすることにより蒸着
初期においては、シリコン基板上および二酸化珪素膜上
でのモリブデンの核形成を容易にし、蒸着後期において
はモリブデン粒子のモリブデン膜上での移動を容易にし
て、膜を緻密化しているためと考えられる。
When molybdenum is deposited at a deposition rate of 5 to 25 Å/sec, a Schottky barrier diode can be formed without peeling off at the step between the silicon dioxide film and silicon. By reducing the deposition rate, this facilitates molybdenum nucleation on the silicon substrate and silicon dioxide film in the early stage of deposition, and facilitates the movement of molybdenum particles on the molybdenum film in the late stage of deposition. This is thought to be due to the densification of the film.

第1図には、モリブデンの蒸着速度を変えた時の二酸化
珪素膜とシリコンの段差部でのモリブデン膜のはがれ率
を示した。図かられかるように蒸着速度は5〜25 A
 /secの範囲が最適であった。
FIG. 1 shows the peeling rate of the molybdenum film at the step between the silicon dioxide film and the silicon when the molybdenum deposition rate was varied. As shown in the figure, the deposition rate is 5 to 25 A.
/sec range was optimal.

実施例 次に本発明の実施例を第2図に従って説明する。Example Next, an embodiment of the present invention will be described with reference to FIG.

比抵抗0.002Ωc+uのN型シリコンサブストレー
ト上に比抵抗1Ωcm、厚み5μIのN+型シリコンエ
ピタキシャル層2を形成し、前記エピタキシャル層2上
を乾燥した酸素中で酸化し、約3000Aの二酸化珪素
膜3を形成した。その後ショットキーバリアを形成する
領域の二酸化珪素膜を除去したのち、電子ビーム法によ
り厚み4000Aのモリブデン膜4、厚み1000Aの
チタン膜5そして50000Aのアルミニウム膜6を連
続的に形成した。その後アルミニウム膜6.チタン膜5
そしてモリブデン膜4を順次エツチングし、第2図に示
す断面構造のショットキーバリアダイオードを得た。
An N+ type silicon epitaxial layer 2 with a specific resistance of 1 Ωcm and a thickness of 5 μI is formed on an N type silicon substrate with a specific resistance of 0.002 Ωc+u, and the epitaxial layer 2 is oxidized in dry oxygen to form a silicon dioxide film of approximately 3000 A. 3 was formed. Thereafter, after removing the silicon dioxide film in the area where the Schottky barrier was to be formed, a molybdenum film 4 with a thickness of 4000 Å, a titanium film 5 with a thickness of 1000 Å, and an aluminum film 6 with a thickness of 50000 Å were successively formed by an electron beam method. Then aluminum film 6. Titanium film 5
The molybdenum film 4 was then sequentially etched to obtain a Schottky barrier diode having the cross-sectional structure shown in FIG.

発明の詳細 な説明したように、真空蒸着によりモリブデンを蒸着す
る場合、その蒸着速度を5〜25 Å/secに規制す
ることにより、モリブデン膜の二酸化珪素膜とシリコン
との段差におけるはがれを皆無にすることができる。
As described in detail of the invention, when molybdenum is deposited by vacuum evaporation, by regulating the deposition rate to 5 to 25 Å/sec, peeling of the molybdenum film at the step between the silicon dioxide film and the silicon can be completely eliminated. can do.

その結果、順方向特性や耐圧特性の安定化と製造歩留り
の向上に貢献する。
As a result, it contributes to stabilizing forward characteristics and breakdown voltage characteristics and improving manufacturing yield.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明のショットキーダイオードのモリブデン
蒸着速度に対するモリブデン膜のはがれ率の特性図、第
2図は本発明のショットキーダイオードの断面図である
。 1・・・・・・N型シリコンサブストレート、2・・・
・・・N+型シリコンエピタキシャル層、3・・・・・
・二酸化珪素膜、4・・・・・・モリブデン膜、5・・
・・・・チタン膜、6・・・・・・アルミニウム膜。 第1図 モ 1】 第2図
FIG. 1 is a characteristic diagram of molybdenum film peeling rate versus molybdenum deposition rate of a Schottky diode of the present invention, and FIG. 2 is a cross-sectional view of the Schottky diode of the present invention. 1...N-type silicon substrate, 2...
...N+ type silicon epitaxial layer, 3...
・Silicon dioxide film, 4...Molybdenum film, 5...
...Titanium film, 6...Aluminum film. Figure 1 Mo1] Figure 2

Claims (2)

【特許請求の範囲】[Claims] (1)モリブデンの蒸着速度を5〜25Å/secで形
成したモリブデン膜をバリア層とした事を特徴とするシ
ョットキーバリアダイオードの製造方法。
(1) A method for manufacturing a Schottky barrier diode, characterized in that the barrier layer is a molybdenum film formed at a molybdenum deposition rate of 5 to 25 Å/sec.
(2)N型シリコン基板上にN^+型エピタキシャル層
を形成する工程と、前記エピタキシャル層上に二酸化珪
素膜を形成し、前記二酸化珪素膜の所定の領域を開孔す
る工程と、前記開孔部と前記二酸化珪素膜上に電子ビー
ム法によりモリブデン膜、チタン膜、及びアルミニウム
膜を順次蒸着する工程と、前記アルミニウム膜、チタン
膜及びモリブデン膜を順次エッチングして電極を形成す
る工程とを含む特許請求の範囲第(1)項記載のショッ
トキーバリアダイオードの製造方法。
(2) a step of forming an N^+ type epitaxial layer on an N-type silicon substrate; a step of forming a silicon dioxide film on the epitaxial layer; and a step of opening a predetermined region of the silicon dioxide film; A step of sequentially depositing a molybdenum film, a titanium film, and an aluminum film on the hole and the silicon dioxide film by an electron beam method, and a step of sequentially etching the aluminum film, titanium film, and molybdenum film to form an electrode. A method for manufacturing a Schottky barrier diode according to claim (1).
JP14533486A 1986-06-20 1986-06-20 Manufacture of schottky barrier diode Pending JPS631065A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14533486A JPS631065A (en) 1986-06-20 1986-06-20 Manufacture of schottky barrier diode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14533486A JPS631065A (en) 1986-06-20 1986-06-20 Manufacture of schottky barrier diode

Publications (1)

Publication Number Publication Date
JPS631065A true JPS631065A (en) 1988-01-06

Family

ID=15382769

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14533486A Pending JPS631065A (en) 1986-06-20 1986-06-20 Manufacture of schottky barrier diode

Country Status (1)

Country Link
JP (1) JPS631065A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03219674A (en) * 1990-01-25 1991-09-27 Toshiba Corp Electrode structure and manufacturing method of semiconductor device
JPH0766391A (en) * 1993-08-31 1995-03-10 Nec Corp Ohmic electrode

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03219674A (en) * 1990-01-25 1991-09-27 Toshiba Corp Electrode structure and manufacturing method of semiconductor device
JPH0766391A (en) * 1993-08-31 1995-03-10 Nec Corp Ohmic electrode

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