JPS6313192B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a control device for a display device using liquid crystal as a display medium.

In conventional small calculators such as electronic desktop calculators, display devices that use liquid crystal as a display medium provide a positive display signal to the liquid crystal corresponding to each display digit in a half cycle of the display cycle, as shown in Figure 1. However, in the remaining half period of the display period, a negative display signal is applied to the liquid crystal for display, so that the amount of electricity applied to the liquid crystal is zero for one display period.

However, if a key signal is applied during display execution, the display is immediately erased and the calculation processing corresponding to the added key signal is performed to display it. When a key signal is added in the middle of display execution by amount,
Since the display is erased after only a portion of the display is performed using a positive amount of electricity, the amount of electricity applied to the liquid crystal does not become zero over the display cycle, which has the disadvantage of shortening the life of the liquid crystal. . In general, display interrupt signals such as key signals rarely occur at the breakpoints of the display cycle, but usually occur in the middle of the display cycle, so if display interrupt signals occur frequently. is particularly problematic.

An object of the present invention is to provide a liquid crystal display control device that always reduces the amount of electricity applied to the liquid crystal to zero even if a display interrupt signal occurs in the middle of a display cycle.

According to the present invention, when a display interrupt signal is generated, it is temporarily stored, and the stored interrupt signal is read out at the end of the subsequent display cycle, and a display corresponding to the interrupt is performed. Therefore, if the interrupt signal is based on controlling a numerical key, the numerical value will be displayed, and if it is based on the calculation command, the calculation result will be displayed. If necessary arithmetic processing is required for display in such cases, the start of the arithmetic processing will also be delayed until the end of the display cycle.

Next, embodiments of the liquid crystal display control device according to the present invention will be described in detail with reference to the drawings from FIG. 2 onwards.
Four delay type flip-flops (hereinafter referred to as D-F/F)
2, 3, and 4 are connected in series, each output serving as an input to a 3-input NOR gate 1, and the output of this NOR gate 1 serving as an input to DF/F2. In addition, the clock terminals of these D-F/Fs 2 to 4 are connected to clock signal generators 7 to 1.
A clock signal every ms is given. Therefore, NOR gate 1, DF/Fs 2, 3, and 4 constitute a ring counter that generates a clock signal every 1 ms. FIG. 3 shows the operating waveforms of each part in FIG. 2, with the same reference numerals attached to the parts corresponding to those in FIG. 2. As shown in FIG.
(hereinafter referred to as ``0''), the output of NOR gate 1 becomes a logical value 1 (hereinafter referred to as ``1''), and henceforth 1
This "1" is changed to D- by the clock signal every ms.
It is transferred to F/Fs 2, 3, and 4.

Since the output of the exclusive OR gate 5 whose inputs are the outputs of DF/Fs 4 and 6 is input to DF/F6, the output waveform of DF/F6 is D.
- When F/F4 is "1", "1" and "0" are repeated every time a clock signal is generated. In display execution, when the output of D-F/F6 is "1",
Display is performed using a positive quantity of electricity, and when it is "0", a negative quantity of electricity is displayed. Therefore, if you start displaying with a negative amount of electricity, if you end the display with a positive amount of electricity, no electricity will be added to the liquid crystal during the period in which D-F/F6 is from "0" to "1". The amount of electricity will be zero.

The liquid crystal drive circuit 8 includes a Noah gate 1 and a D-F/F.
Outputs 2, 3, 4, and 6 and display information obtained from the terminal 9a of the arithmetic processing device 9 are provided. The display signals shown in FIG. 1 are generated from these signals and supplied to the liquid crystal display 10. The arithmetic processing unit 9 is composed of an arithmetic order signal generation circuit, an arithmetic information register, a display information register, etc., and is a device that receives a key signal from a terminal 15 at a terminal 9c and executes arithmetic processing. When executing the arithmetic processing, the display information to the liquid crystal drive circuit 8 is changed to information for erasing the display.

While the display 10 is displaying, a key signal is sent from the terminal 15 (see also FIG. 4) to the arithmetic processing unit 9.
, the processing unit 9 determines whether the key signal corresponds to a newly pressed key, and if it is detected as a new key, it outputs a key detection signal, that is, an interrupt signal. is generated from terminal 9d. This signal is the input of a two-input AND gate 11 with one input as a key signal, and the output of this AND gate 11 is a set priority flap-flop 12 (hereinafter referred to as R-SF/F).
This is the set side input. Therefore R-SF/
A state in which the Q output of F12 is "1" indicates that the pressed key is a key that should be accepted. In this way, R-SF/F12
An interrupt signal is stored in .

AND gate 13 includes each output of D-F/F4, 6, clock signal from clock generator 7, and R-
This is an AND gate that inputs the Q output of SF/F12. The state in which D-F/Fs 4 and 6 are "1" and the clock signal from the clock generator 7 is generated indicates the end of one cycle of the display, and in this state, the Q output of R-SF/F12 is When it is "1", the output of the AND gate 13 is "1". The output of this AND gate 13 is sent to the arithmetic processing unit 9 via a terminal 9b.
, the arithmetic processing unit 9 is an AND gate 13
When it detects that the output of is "1", the terminal 9a
A display erase signal is then applied to the drive circuit 8 to erase the display up to that point, and the display operation is shifted to arithmetic processing corresponding to the pressed key. The arithmetic processing unit 9 also applies a reset signal to the flip-flop 12 from the terminal 9e to erase the memory of the interrupt signal.

Even if a key signal corresponding to a newly pressed key is applied to the arithmetic processing unit 9 as described above, the process does not immediately proceed to arithmetic processing, but the transition from display operation to arithmetic processing occurs until one cycle of display ends. This means that the amount of electricity applied to the liquid crystal is reduced to zero, and the display operation shifts to arithmetic processing.

As explained above, according to the liquid crystal display control device of the present invention, it is possible to always reduce the amount of electricity applied to the liquid crystal to zero, which has a great effect on extending the life of the liquid crystal.

[Brief explanation of the drawing]

Fig. 1 is a waveform diagram showing the relationship between conventional display and display erasing, Fig. 2 is a block diagram showing an embodiment of the liquid crystal display control method according to the present invention, and Fig. 3 shows operating waveforms of each part in Fig. 2. Waveform diagram, Figure 4 is the 2nd
FIG. 6 is a waveform diagram showing the relationship between display and display erasure in the figure. 7: clock signal generator, 8: liquid crystal drive circuit, 9: arithmetic processing unit, 12: flip-flop for storing interrupt signals, 13: circuit for storing interrupt signals and detecting that the display period is divided.

Claims (1)

[Claims] 1. One display cycle is determined so that the supply period of the positive display signal and the supply period of the negative display signal are equal,
The liquid crystal display control device that performs display control by alternately supplying positive display signals and negative display signals to the liquid crystal drive circuit includes a key input section for inputting information and arithmetic processing for the input information. an interrupt signal generating section that generates an interrupt signal in response to a key input; a storage section that temporarily stores the generated interrupt signal; and a signal that generates a signal indicating the break of one display period. means for causing the interrupt signal to be held in the storage section until the signal indicating the break is generated from the generating means, and causing the interrupt signal held in the storage unit to be suspended by the generation of the signal indicating the break. The arithmetic processing section has a means for transmitting the data to the arithmetic processing section, and a means for erasing the display based on the interrupt signal received from the transfer means, and the arithmetic processing section is configured to transmit the data to the arithmetic processing section until the interrupt signal is inputted from the transfer means. A liquid crystal display control device characterized by suspending execution of a process corresponding to an input key.