JPS63152002A - Erasing device - Google Patents

Abstract

PURPOSE:To freely select a range in setting an erasing range by respectively specifying a block where erasure should be started and a block where deletion should be completed and automatically erasing the range. CONSTITUTION:An erasure means is provided, which erases in the specified range of the block where the erasure should be started and the block where the erasure should be completed. In a field erasure, for example in the case of erasing only a track reproduced by a magnetic head 3-1, a control signal is transmitted from a CPU 40 in order that a SW 2 is switched to a recording amplifier side and a SW 3 is switched to be in a middle state on starting the erasure. Moreover an erasure signal trigger pulse is transmitted from the CPU 40 to an erasure signal generator 85 in order to send the erasure signal only to the head 3-1. Since the erasure signals are simultaneously sent to the heads 3-1 and 3-2 at the time of erasing a frame, the control signal is transmitted from the CPU 40 in order that the SW 2 and SW 3 are simultaneously switched to the recording amplifier side. And the erasure signal is generated with the trigger pulse and sent to both heads through the recording amplifier. Thus an erasing device, which is easy to be used, can be obtained.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to an erasing device.

[Conventional technology]

Conventionally, when erasing information recorded on concentric tracks of a disk-shaped recording medium, a technique for erasing a plurality of consecutive tracks is known, for example, as disclosed in Japanese Patent Laid-Open No. 60-98505.

[Problem to be solved by the invention]

However, in the case of the above-mentioned technique, when erasing a plurality of consecutive tracks, it is necessary to manually move the erasing head in advance to the first track on the medium to be continuously erased.

Therefore, there is a problem in that the erase operation is not easy to use.

It is an object of the present invention to solve these problems and provide an easy-to-use erasing device.

[Means for solving problems]

In order to solve the above-mentioned problems, the present invention provides an erasing device for erasing information recorded on a medium having a plurality of storage blocks, which specifies a block to start erasing and a block to end erasing. and means for erasing blocks within a range specified by the specifying means.

[For production]

In the above configuration, each block from the block to start erasing designated by the designating means to the block to end erasing is erased by the erasing means.

〔Example〕

The present invention will be described in detail below with reference to the drawings. In the embodiments of the present invention described below, still image video signals are recorded or recorded on a disk-shaped recording medium, specifically, a disk-shaped magnetic sheet. A recording and reproducing apparatus for reproducing and erasing still image video signals will be described.

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

In FIG. 1, reference numeral 1 denotes a magnetic sheet on which recording/reproducing tracks, track pitches, and track positions for video signals are predetermined, and the tracks are formed in concentric circles, and one field of video signals is stored in one track. In the case of a frame video signal, one field of video signal is recorded on each of two adjacent tracks to form a frame video signal. The magnetic sheet l is placed in a jacket (not shown) in advance, and the jacket is provided with a claw to prevent accidental erasure. 2.
is a DC motor for rotating the magnetic sheet l at a constant speed, 3
-1.3-2 is an inline type head that accesses two adjacent tracks, 3-1 accesses the outer circumferential side, and 3-2 accesses the inner circumferential side. 4 is a magnetic head 3-1.3-2
A magnetic head moving mechanism 5 moves the magnetic head 3-1 so as to access the track formed on the magnetic sheet l, and a magnetic head moving mechanism 5 moves the magnetic head 3-1 by the magnetic head moving mechanism 4 to access the innermost track on the magnetic sheet l. The state switches from off to on, and the microcomputer (hereinafter CP
(referred to as U) 40 is an innermost detection switch that outputs an L level signal, 6 is a reproducing amplifier for amplifying the signal detected by the magnetic head 3-1.3-2, and 7 is a signal from the reproducing amplifier 6. Level detector for detecting the average value of the output signal, 8
is a comparator that detects whether the output of the level detector 7 is higher than a threshold value set by a reference voltage source (not shown);
9 is a demodulation circuit that demodulates the output signal of the reproduction amplifier 6; 10
172H delay circuit delays the output of the demodulation circuit 9 by 1/2 horizontal scanning period (hereinafter referred to as 1/2H); 11 receives synchronization signals such as horizontal synchronization signal Hsync and vertical synchronization signal Vsync from the output of the demodulation circuit 9; The synchronizing signal separating circuit 12 is a data demodulator that detects a predetermined data signal from the output of the reproduction amplifier 6 in accordance with the timing of the synchronizing signal separated from the synchronizing signal separating circuit 11 and demodulates the data signal. The data signal is a signal for determining what kind of information is recorded on the track, for example, whether it is a field video signal or a frame video signal, and a signal for the date set by the user. , is a signal indicating an 11-digit number freely set by the user, and is recorded in a frequency band lower than that of the video signal at a position having a predetermined relationship with the part where the synchronization signal of the track is recorded. The reason why the demodulation circuit 9 and the data demodulation circuit 12 are provided separately here is as follows. In other words, the video signal recorded on the magnetic sheet l is FM modulated, but the data signals other than the video signal are FM modulated.
PSK modulation method (%) is adopted. Therefore, the demodulation circuit 9 described above is an FM demodulation circuit, and the data demodulation circuit 12 is a DPSK demodulation circuit.

Reference numeral 13 denotes a monitor for reproducing and observing video signals, and reference numeral 13' denotes a printer connected to print the video signals. Note that the printer 13' starts operating when the signal at the start signal input terminal becomes H level, and during operation, the busy signal output terminal is set to L and a bell is set. The printer 13' is also provided with an E/F signal output terminal that indicates whether or not the printer is equipped with a memory device.

The E/F signal is at H level while the printer is operating, but becomes L level if an error occurs after the printer starts operating. In contrast to the data demodulator 12, 14 converts data output from a CPU 40 (described later) into a DPS.
It is a modulator that performs K modulation, and outputs modulated data to the recording amplifier 16 at a timing corresponding to Hsyn and Vsync separated by a synchronization signal separation circuit 17 from a video signal input from a video input terminal 18.

15 is F for the video signal input from the video signal input terminal 18.
This is a recording amplifier that performs processing necessary for recording such as M modulation and outputs it to the recording amplifier 16. A reference signal generator 19 generates accurate reference pulses (60 Hz) for rotating the magnetic sheet 1 and an alternating signal for erasing.

Reference numeral 20 denotes a magnetic piece provided on the magnetic sheet 1 described above, and the DC motor 2 is synchronized with a reference signal generated by a reference signal generator 19 using a signal from the magnetic piece 20 as described later. Rotation control is performed. 21 is a magnetic piece 20 when the magnetic sheet 1 is rotated by the DC motor 2.
This is a PG coil for detecting signals from.

22 is a waveform shaping circuit that shapes the waveform of the signal output from the PG coil 21, and the output of the waveform shaping circuit 22 is input to a CPU 40 and a motor control circuit 23, which will be described later.

Reference numeral 23 denotes a control circuit for controlling the rotation of the DC motor 2, which outputs Vsync from the synchronization signal separation circuit 17 or the output signal of the reference signal generator 19, and the waveform shaping circuit 2.
The rotation of the DC motor 2 is controlled so that the output of the DC motor 2, that is, the phase relationship with the signal from the magnetic piece provided on the magnetic sheet l is in a predetermined relationship, for example, the phase of both is always shifted by 7H. . Here, when a recording operation is performed by the magnetic head 3-1.3-2, SWI is switched to the synchronization signal separation circuit 17 side in advance, and Vsync+! : The rotation of the DC motor 2 is controlled based on the signal input from the waveform shaping circuit 22, that is, the signal from the magnetic piece 20 provided on the magnetic sheet 1, and the reproduction is performed by the magnetic head 3-1.3-2. When an operation is performed, SWI is the reference signal generator 1
9 side, and the reference signal from the reference signal generator 19 and the signal input from the waveform shaping circuit 22, that is,
The rotation of the DC motor 2 is controlled based on signals from the magnetic piece 20 provided on the magnetic sheet l.

23' is a driver that drives the step motor 24 for controlling the position of the head 3-1, 3-2 based on a signal from the CPU 40, which will be described later;
4 is a head 3-1.3- via the head moving mechanism 4.
Move 2.

25' is a display circuit driven by a signal from the CPU 40, and as a display element, as shown in FIG. 1.3-2 7-segment display element to display the feed speed in 2 digits, PB and LED to display the playback mode, REC and LED to indicate the recording mode, FRAM to display the frame mode
E, LED, FIELD that displays field mode,
LED lights up during interval playback, and blinks during print operation when a printer is connected as an external device.INT, LED, ALL-BRASE 5T- indicates all track erase standby state.
It is composed of BY LED.

26 is a ROM in which programs for the CPU 40 are stored.

27 is a RAM in which data of the CPU 40 is temporarily stored.
It is. 28 is a timer driven by the CPU 40, and 29 is a crystal oscillator that generates a reference clock for the CPU 40. Incidentally, 80 is a detection circuit connected to photocouplers 81' and 82' forming a detection switch for detecting whether or not the magnetic sheet 1 is inserted.

83, 84 and SW6 are circuits for displaying a data signal (hereinafter referred to as ID) such as a signal such as January 9, 2015, or a signal freely set by the user on the monitor 13 and printer 13'. 1 is a synchronization separation circuit that separates Vsync and Hsync of a video signal input via SW5 for adjusting the timing of data characters to be generated, and has the same configuration as the synchronization separation circuit shown as 17. 84 is Vs separated by the synchronization separation circuit 83
This is a character generator for generating characters corresponding to data signals in synchronization with ync and Hsync. monitor 13
When displaying the ID signal superimposed on the video signal on the printer 13', a control signal is given from the CPU 40, SW6 is turned on, and the synchronization signal and data signal are added by the adder shown as ■ in FIG. , is displayed at a specific position on the monitor 13 or printer 13'. The details will be described later.

85 is an erasing signal generator for erasing signals on arbitrary tracks of the magnetic sheet 1. Note that the AC signal for erasing is provided from the reference signal generator 19.

Here, the erasure signal generator 85 has a constant amplitude period T1 as shown in FIG. 29, and a subsequent attenuation period T.
2 and is connected to the recording amplifier 16.

SWI is a switch whose state is changed by a signal from the control circuit 30 that is driven based on a signal from the CPU 40. A video signal is input from the video signal input terminal 18, and Hsync is input from the synchronization signal separation circuit 17. When the signal is output and a signal indicating that the recording mode is input from the CPU, the synchronization signal separation circuit 1
7 and the motor control circuit 23, if Hsync is not output from the synchronization signal separation circuit 17, or if the CPU 4
A signal indicating the reproduction mode is input from 0, or the reference signal generator 19 and the motor control circuit 23 are connected in the erase mode.

SW2 is a switch whose state is changed based on a signal from the CPU 40, and is connected to the state where the head 3-1 is connected to the recording amplifier 16, the state where it is connected to the playback amplifier 6, and whether the head 3-1 is connected to the recording amplifier 16 or the playback amplifier 6. Switch between an intermediate state in which no connections are made.

Like SW2, SW3 is a switch whose state changes based on a signal from the CPU 40, and there are two states: connecting the head 3-2 to the recording amplifier 16, connecting the head 3-2 to the reproducing amplifier 6, and connecting the head 3-2 to the recording amplifier 16 and the reproducing amplifier. 6 and an intermediate state in which it is not connected to any of

When reproducing a video signal from the magnetic sheet 1, the SW4 is switched to the upper position in FIG. When the head 3-1 is connected and a field video signal is reproduced using only the head 3-1, the demodulation circuit 9 is switched to the upper side and the lower side in FIG.
The state where the CPU is connected to the CPU and the state where it is connected to the 1/2H delay circuit are alternately switched for each field.
This is a switch driven by 40.

SW5 connects the monitor 13 to the video signal input terminal 18 during recording.
This is a switch driven by the CPU 40 to connect the monitor 13 to SW4 during playback.

By the way, the video signal recorded on the magnetic sheet 1 or reproduced from the magnetic sheet 1 can be a field video signal consisting of only one field as described above, or a frame video signal consisting of two fields in a pair. However, in such a case, SW2. SW3゜SW4. Switching of the state of SW5 will be explained using FIG. 2.

Figure 2 shows SW2. SW3. SW4. It is a figure which shows the combination of the switching state of SW5.

In field playback, it' SW 2 is head 3
-1 is connected to the playback amplifier 6, SW3 is in an intermediate state, that is, the head 3-2 is not connected to the playback amplifier 6 or the recording amplifier 16, and SW4 is odd, and the few fields are directly monitored from the demodulation circuit 9. 13, and in even fields, the signal is outputted to the monitor 13 via the 1/2H delay circuit 1o.
Prevents skew distortion.

Next, in frame reproduction, SW2 connects the head 3-1 to the reproduction amplifier 6 in odd fields, and is in an intermediate state in even fields, SW3 is in an intermediate state in odd fields, and connects the head 3-2 to the reproduction amplifier 6 in even fields. Connect to. Therefore, during frame playback, head 3-1. Any one of the signals 3-2 is alternately output to the reproduction amplifier 6 for each field.

In this case, SW4 is switched to the upper side in FIG. 1, and the signal from demodulation circuit 9 is directly output to monitor 13.

In any of the above-described field reproduction and frame reproduction states, SW5 is driven so that the monitor 13 is connected to SW4.

Next, in field recording, SW2 connects the head 3-1 to the recording amplifier 16, and SW3 is in an intermediate state.

Therefore, during field recording, recording is performed by the head 3-1.

In frame recording, SW2 connects the head 3-1 to the recording amplifier 16 in odd fields and is in an intermediate state in even fields; SW3 is in an intermediate state in odd fields, and connects the head 3-2 to the recording amplifier 16 in even fields. Connecting. In frame recording, the combination of heads 3-1 and 3-2 can also be reversed.

In addition, in the case of field recording and frame recording, during recording, the SW 5 connects the monitor 13 to the video signal input terminal 18 and sends the video signal to be recorded to the monitor 13.
It changes so that you can observe it. In such cases, S
W4 may be in any state.

Next, the erase mode will be explained. In the erase standby state, which will be described later, SWl is on the reference signal generator side;
5 is connected to the upper side in FIG. 1, that is, it is in exactly the same state as the playback mode. At this time, a case will be described in which field erasing is performed, for example, erasing only the track being reproduced by the magnetic head 3-1. In this case, at the same time as erasing starts, a control signal is sent from the CPU 40 so that SW2 is placed on the recording amplifier side and SW3 is placed in an intermediate state.Furthermore, an erase signal trigger pulse is sent from the CPU 40 to the erase signal generator 85, and the erase signal trigger pulse is sent to the head 3-1. The erase signal is sent only when the

Next, a description will be given of frame erasing in which tracks being accessed by heads 3-1 and 3-2 are simultaneously erased. When erasing a frame, an erasing signal is sent to the heads 3-1 and 3-2 at the same time, so the CPU 40 sends a control signal so that SW2 and SW3 are both on the recording amplifier side. and cp
A trigger pulse from u40 generates an erase signal, which flows to both heads via the recording amplifier.

Furthermore, in this embodiment, when field erasing is performed, the erasure is performed by head 3-1, but when field erasing is performed using head 3-2, SW2 is in the intermediate state, and SW2 is in the intermediate state.
It is only necessary to control W3 so that it is on the recording amplifier side.

Next, the switches 51 to 78 shown in FIG. 1 will be explained.

In giving this explanation, the external appearance of the apparatus of this embodiment shown in FIGS. 3 and 4 will also be explained.

FIG. 3 is a front view of the apparatus of this embodiment, and FIG. 4 is a front view of a remote control device used in the apparatus of this embodiment.

The switches 51 to 79 and 72 shown in FIG. 1 are the switch group provided in the device shown in FIG. 3, the switch group provided in the remote control device shown in FIG. The switches are divided into groups of switches provided in both the remote control device shown in FIG. 4 and the remote control device shown in FIG. Furthermore, the third
A first switch provided in the device shown in the figure.
In the figure, the switch provided only on the remote control device shown in Figure 4 is connected to the CPU via a line.
40 is shown for convenience, the signal generated by operating the switch provided only in the remote control device shown in FIG. The light is converted into light and input to the CPU 40 of the device shown in FIG. 3 via the remote control light receiving section 45 provided in the device.

In addition, switches 51 to 79, 81. 82. Regarding the arrangement method of 90, various other variations of this embodiment can be considered,
The present invention is not limited to this embodiment.

In FIGS. 1 to 4, 41 is a power switch, 42
is a slot for inserting the magnetic sheet 1; when the inject button 43 is turned on while the magnetic sheet 1 is inserted into the slot 42, the slot 42 automatically opens and the magnetic sheet 1 is injected. 43 is the above-mentioned inject button, 44A, 44B are the above-mentioned PB, LED, RE, respectively.
C, LED, 45 is a remote control light receiving unit that receives a signal from the remote control device shown in FIG. 4; 46 is an interval mode display LED that lights up when interval playback is executed; 48 is a field playback or recording;
A display LED 25 indicates whether frame playback or recording is set, and 25 is the aforementioned 2-digit 7-segment LED.

50A, 50B, and 50C are LEDs that display the operating states of a program playback setting switch 58, an interval time setting switch 57, and a program track setting switch 62, which will be described later, respectively.

51 is a REC mode switch for setting the recording mode and checking whether the track accessed by the head in the recording mode is recorded or unrecorded; when the switch is turned on, the track accessed by the head is (If the track being accessed by head 3-1 has already been recorded during field recording, or the track being accessed by head 3-1 or 3-2 during frame recording) REC if already recorded).

The LED flashes to indicate that the track that the head is accessing is unrecordable, and if the track that the head is accessing is not recorded, or if the control circuit 30 determines that no video signal is input, the REC and LED lights. Lights up to indicate that recording is possible.

52 is a REC that determines the timing to perform the recording operation.
switch and the recording mode is set by the REC mode setting switch 51, and the switch 5
When 1 is turned on, recording is performed on the magnetic sheet 1. Furthermore, if continuous recording is set in advance by a track feed speed setting switch 56, which will be described later, the switch 5
During the period when 1 is on, head 3-1.3-2 is automatically turned on.
Continuous recording is performed while shifting.

53 is a PB mode setting switch for setting the playback mode, and when the switch 53 is turned on, the PB and LED indicating the playback mode are lit.

54 is a track UP switch, and by operating the switch 54, the driver 23' is controlled, the step motor 24 is rotated, and the head moving mechanism 4 moves the head 3-1, 3-2, so that the head 3- 1.
3-2 to change the track that the head is accessing more toward the inner circumference.

Further, when recording is performed in frames using a field/frame setting switch 59, which will be described later, the recording progresses two tracks at a time.

When playback is set, press the track UP switch 54.
When turned on, the heads 3-1, 3-2 are shifted by 2 tracks, and the 7-segment LED 25 also displays the 1-track number, which is shifted by 2 tracks, instead of the track number shifted by 1 track. When field recording or playback is set, when the track UP switch 54 is turned on, the head 3-1.3-
2 is shifted toward the inner circumferential direction one track at a time, and the shift number shifted one track at a time is also displayed on the seven segment LED 25.

In addition, when the recording mode is set and the track UP switch 54 is operated, the head 3-1°3-2
When the head 3-1.3-2 is shifted, if the track accessed by the head 3-1.3-2 has already been recorded, RFC0RED44
B performs a blinking display. 55 is a track UP switch 54
On the contrary, this is a track DOWN switch for changing the access of the head 3-1, 3-2 toward the outer circumference.

When the switch 55 is also set to frame playback in the same way as the track UP switch 54, when the switch 55 is operated and frames are being recorded on the outermost track of track 1 and the track on the outer circumference of track 2. The track number shifted by 2 tracks is displayed on the 7 segment LED 25 instead of the track number shifted by 1 track, and when the switch 55 is operated when field recording or playback is set, 1 track is displayed. The shifted track number will be displayed.

Also, in the case where the recording mode has been set in advance as described above with respect to the track UP switch 54, and when the head 3-1.3-2 is shifted by operating the track DOWN switch 55, REC if the track has already been recorded.

The LED 44B performs a blinking display.

56, when recording and reproducing, it automatically switches whether to perform such operations continuously or sporadically while shifting the head, and also determines how many times per second the operations are performed when performing them continuously. This is a track feed speed setting switch for setting the track feed speed shown in FIG.

When the switch 56 is pressed once and turned on, the track feed speed is displayed instead of the track number on the 7-segment LED 25, and in this state, the track feed speed setting switch 56 is turned on again within the predetermined time clocked by the timer 28 shown in FIG. is turned on, each time the switch 56 is turned on, the 7-segment LED 2
For example, "5" indicates continuous recording or playback of 2 screens per second, "5" indicates continuous recording or playback of 5 screens per second, or continuous recording or playback of 10 screens per second. Cyclically displays "f (1" indicating that playback is to be performed, and "a" indicating that recording or playback is performed singly. Also, by turning on and then turning off the switch 56, the 7-segment LED 25 is displayed. After the track feed speed is displayed instead of the track number, the switch 56 is not turned on again and the timer 2
When the predetermined time measurement by 8 is completed, the LED 25
returns from the state where the track feed speed is displayed to the state where the normal track number is displayed.

Furthermore, when the track feed speed is changed by the switch 56, if frame video recording is set in advance by the field/frame setting switch 59 and the REC mode setting switch 51, continuous recording of 10 screens per second is not set. .

57 is an interval time setting switch. That is, the interval time setting switch is used to set the interval time for track forwarding when continuous playback is performed but the playback interval time is relatively long, or when program playback is set by the program track setting switch 58 described later. and
An interval time is set using the ten key switches 63 to 72 within 10 seconds after the switch is turned on.

Incidentally, when any switch other than the 10 key switches 62 to 72 is turned on after the interval time setting switch 57 is turned on, the interval time setting is automatically canceled. Reference numeral 58 denotes a program playback setting switch for setting a program playback mode in which the order of playback tracks is programmed in advance and the playback operation is performed continuously at the interval time interval set by the interval time setting switch 57.

To specify the order of playback tracks, first turn on the switch 58 to set the program playback mode, and then operate the track UP switch 54 and track DOWN switch 55 to select the track being accessed by the heads 3-1 and 3-2. This is done by changing the number of the track being checked on the monitor 13 by turning on a program track setting switch 62, which will be described later, while playing back the video of the desired track and checking it on the monitor 13. Reference numeral 59 denotes the aforementioned field/frame setting switch, and each time the switch is turned on, the field recording or reproduction mode and the frame recording or reproduction mode are alternately switched.

Note that if the continuous recording mode of 10 screens per second is set in advance by the REC mode setting switch 51 and the track feed speed setting switch 56, and the frame recording is selected by the field/frame setting switch 59, the track feed will start. The speed is automatically changed to continuous recording mode of 5 screens per second.

That is, compared to field recording, during frame recording the head 3-1.3-2 must be shifted two tracks at a time, so when recording 10 screens per second, 20 tracks per second are required. In other words, taking into consideration the time to record the video signal, the head shift for two tracks must be performed in 4/60 seconds, but such a high-speed head shift is difficult, so this implementation was carried out. In the example, continuous recording of frames for 10 screens per second is prohibited.

Reference numeral 60 is a start switch for performing continuous interval playback or program playback. When the start switch is turned on, if interval playback is set, the recorded tracks will be played back sequentially starting from the first track during the interval time. Interval playback is started according to the interval time set by the setting switch 57 and the ten key switches 63 to 72, and when program playback is set, program playback is started. Reference numeral 61 denotes a stop switch for stopping the reproduction operation started by the start switch 60, and when the switch 61 is turned on during program reproduction, the reproduction of the program is stopped while the track being reproduced at the time is being reproduced.

62 is the aforementioned program track setting switch.

Reference numeral 73 is a switch for starting ID setting in the recording mode and for switching whether or not to display the ID contents in the playback mode. That is, by turning on the switch 73 in the recording mode, it becomes the ID setting mode, and by turning on the switch 73 in the playback mode, it is possible to switch between displaying or not displaying the contents of the ID. 74, 75.
Reference numerals 76 denote a switch that is turned on when setting the year as the ID when the ID setting mode is entered by the switch 73, a switch that is turned on when setting the month, and a switch that is turned on when setting the day. In FIG. 1, for convenience, the switches 74, 75, 76 and the aforementioned switches 57, 58, 62 are shown as independent switches, but in this embodiment, the switches 74, 75, 76, and 57, 58, 62 are shown as independent switches as shown in the remote control device of FIG. 75° and 76 are also used as switches 58, 57, and 62, respectively. That is, the program setting by the switch 57 and the program setting by the interval time setting switch 58 and the program track setting by the switch 62 are performed according to the year of the ID.

Since this is done independently of the setting of the 1st of the month, the switch is also used in this embodiment.

This reduces the number of switch members and improves operability and reliability.

In addition, various other combinations can be considered when the switch is also used.

77 is an erase standby switch for temporarily placing the device in an erase standby state when erasing information recorded on the magnetic sheet l; 78 is for executing an erase operation in the erase standby state set by the erase standby switch 77; This is the erase switch. Reference numeral 79 is an all-track erase standby switch that sets a mode for erasing all tracks.

When erasing the information recorded on the sheet I, the switch 77 is first turned on to set an erasing standby state. In such a state, the reproduction mode is automatically set, so that the video recorded on the track to be erased can be confirmed on the monitor 13 or on the printer 13' before erasure is executed.

Furthermore, the range to be erased can be specified by operating the 10 key switches 63-72 in the standby state. Next, by turning on the erase switch 78, the head 3-
At least one of the signals 1 and 3-2 is connected to the recording amplifier 16, and the information recorded on the track is erased by the erase signal shown in FIG. 32 generated from the erase signal generator 85. If all tracks are erased, the standby switch 79 is turned on and then the erase switch 78 is turned on, all tracks are automatically erased.

81 is an erase start track number setting switch, and 82 is an erase end track number setting switch, which is used to set the track where continuous erasing should start and the track where continuous erasing should end with the erase standby switch 77 turned on. This is the switch used.

90 counts each field-recorded video signal and frame-recorded video signal as one unit, and calculates the counting result as 7.
This is a switch for confirming the number of remaining recording sheets to be displayed on the segment LED 25.

Next, the operation of the embodiment of the present invention will be explained using flowcharts shown in FIGS. 5 to 20, 23, 25 to 27, 29, and 30.

First, when the power switch 41 shown in FIG. 3 is pushed in, the power of the device shown in FIG. 1 is turned on, power is supplied to each part of the circuit, and operation is started.

#1: Then, in FIG. 5, a register S to be described later is reset to "0", a PB mode flag is set, and the track feed speed is initially set to 2 screens per second and the interval time to 3 seconds. Therefore, when the power is turned on, the continuous playback mode is automatically set in advance.

#2: The photocoupler 81' checks whether the jacket with the magnetic sheet 1 is pushed in or not.

Detected by 82'. When the jacket is pushed in, the flow branches to #3, and when it is not pushed in, the flow branches to #3.
Skip 3 and branch to #4.

#3: When the jacket having the magnetic sheet 1 is being pushed in in #2, the DC motor 3 is driven.

#4: By detecting whether the switch 5 shown in FIG. 1 is turned on, it is detected whether the head 3-1 is accessing the 50th track. When the head 3-1 is accessing the 50th track, the flow branches to #6, and when the 50th track is not accessed by the head 3-1, the flow branches to #5, which drives the step motor 24 shown in FIG. Then, the loop of #4 and #5 is repeated so that the head 3-1 accesses the 50th track.

#6: When the head 3-11 accesses the 50th track, the flow reaches this step, and in this step, the register N for accessing the memory (RAM 27) is set to 50.

#7: In this step, it is detected whether the DC motor 2 is being driven. When the jacket having the aforementioned magnetic sheet 1 is inserted, the DC motor 2 is being driven by executing #3, so the flow advances to step #8 and the field flag is set. When the jacket is not inserted, the flow proceeds without passing through #3, so the DC motor 2 is not driven.

Therefore, the flow returns to #2 to detect whether a jacket is inserted or not.

#8: When the DC motor 4 is being driven in #7, a field flag is set. Therefore, the third
The LED 44A shown in the figure indicating the field mode lights up, and a display indicating the field mode is performed. That is, in this embodiment, when the power is turned on and the jacket is inserted, the field mode is automatically set.

#9: Detect the output of the level detection circuit 7 shown in FIG. 1 to determine whether the track being accessed by the head 3-1 is a recorded track. Here, head 3-1
Since the track being accessed has already been recorded, when the output of the level detection circuit 7 becomes H level, the flow is #1.
0, and when the output of the level detection circuit 7 becomes L level, the flow advances to #16.

Here, #16 will be explained first.

#16: Set “0000” to address N in memory. Here, "oooo" indicates that the track corresponding to the memory address is unrecorded.

Next, the flow from #IO onwards will be explained.

#10: At #9, the output of the level detection circuit 7 is H
When the level is determined, the signal recorded on the track is reproduced, and the ID signal is taken in from the data demodulator 12.

#11: Detect the contents of the ID signal to determine whether the video signal recorded on the track is a field video signal or a frame video signal.

Here, if it is a field video signal, the flow is #1
Proceed to step 5, and if it is a frame video signal, the flow is #
Proceed to step 12.

#12=In this step, it is determined whether the video signal of the track that the head 3-1 is accessing is an inside track or an outside track of the frame video signal.

If it is the inside track, the flow goes to #14;
If it is an outside track, the flow advances to #13.

#13: If the video signal of the track that the head 3-1 is accessing is a track outside the frame video signal, set the memory address N to "0011". still#
If this step is entered for the first time from #1, N is set to 50 in #6.

#14: In the case of the inner track of the frame video signal, set the memory address N to "0010".

#17: When the head 3-1 is shifted to the first track and it is detected that N=1, the flow is #1.
The flow advances to #20, and if N=1, the flow advances to #18.

#18: When it is detected in #17 that N=1 is not true, the head 3-1 is shifted by one track toward the outer circumferential side.

#19: When the head 3-1 is shifted to the outer peripheral side in #18, it is subtracted from N and set as N.

#20: When N=1 is detected in #17, that is, when the head 3-1 accesses the first track provided on the outermost circumference and the presence or absence of recording is set in the memory, the memory is set here. If you read the data at the N address, that is, the first address of the memory, and it is "0011", specifically, if the first track is the outer track of the two tracks that make up the frame video signal, it will flow to #21. otherwise, the flow advances to #23.

$21: If it is detected in #20 that the first track is a track outside of the tracks constituting the frame video signal, the flow advances to this step. In this step, if the data at memory address 〇N+1, that is, the second address of the memory, is read and it is "0010", specifically, if the second track is the inner track of the two tracks constituting the frame video signal. Then proceed to #22.

#22: When frame video signals are being recorded on two tracks, the first track and the second track, the flow moves to this step. Therefore, the field flag set in #8 is cleared and the field mode is changed to frame mode. Therefore, in the field frame display LE048 shown in FIG. 3, the LED indicating the frame mode is lit.

@23. #24: The register N indicating the address of the memory mentioned above is written as the 2-digit 7-segment L shown in Figures 1 and 3.
Display on ED25.

This display allows the user to recognize the track number that the head 3-1 is accessing.

When this flow ends, the process jumps to the next flow shown in A. The flowchart shown in FIG. 6 will be explained below.

#A-1: Detects whether the REC mode setting switch 51 is turned on, and when the switch 51 is turned on, the flow calls subroutine ■ to set the recording mode, and when it is not turned on, the flow calls #A-1. Proceed to A-2.

#A-2: Detect whether the REC switch 57 is turned on. If the switch 52 is turned on, call subroutine (2); if not, proceed to #A-3.

#A-3: Detects whether the PB mode setting switch 53 is turned on, calls subroutine ◎ when the switch 53 is turned on, and calls # when it is not turned on.
Proceed to A-4.

#A-4 When the Nidorak UP switch 54 is turned on, the flow calls subroutine (2), and when it is not turned on, the flow advances to #A-5.

#A-5: When the track DOWN switch 55 is turned on, the flow calls subroutine (2), and when it is not turned on, the flow advances to #A-6.

#A-6: When the track feed speed setting switch 56 is turned on, the flow calls subroutine [F], and when it is not turned on, the flow advances to #A-7.

#A-7: When the interval time setting switch 57 is turned on, the subroutine ◎ is called, and when it is not turned on, the process proceeds to #A-8.

#A-8 When the nib program setting switch 58 is turned on, subroutine (2) is called, and when it is not turned on, the process advances to #A-9.

#A-9 When the nib program track setting switch 62 is turned on, subroutine (2) is called, and when it is not turned on, the process advances to #A-10.

#A-10: When the field frame setting switch 59 is turned on, the subroutine is called, and when it is not turned on, the process advances to #A-11.

#A-11 When the start switch 60 is turned on, subroutine (2) is called, and when it is not turned on, the process advances to #A-12.

#A-12 When the stop switch 61 is not turned on, subroutine (2) is called, and when it is not turned on, the process advances to #A-13.

#A-13: When the jacket detection switch (corresponding to the detection circuit 80 in Fig. 1) detects that there is no jacket, jump to #2, and when something is detected, jump to #A-14. Proceed to.

#A-14 Clear the Niprogram playback mode flag and the program playback execution flag.

#A-15: When any of the 10 key switches 63 to 72 is turned on, subroutine (2) is called, and when it is turned on, the process proceeds to #A-16.

HA-16; When the ID switch 73 is on, call subroutine ◎; when it is on, call subroutine #A
Proceed to -17.

#A-17: When the year setting switch 74 is on, call subroutine ■; when it is on, call #
Proceed to A-18.

#A-18: When the month setting switch 75 is on, subroutine ■ is called, and when it is on, #
Proceed to A-19.

#A-19: When the date setting switch 76 is on, call subroutine 0, and when it is on, call #A-19.
Proceed to A-20.

#A-20: When the erase standby switch 77 is turned on, call subroutine V' shown in FIG. 27 or subroutine V' shown in FIG. 30, and when it is turned on, proceed to #A-21. .

#A-21: All/track erase standby switch 79
When the subroutine W' is turned on, subroutine W' is called, and when it is turned on, the process advances to #A-13.

As explained above, after the head 3-1 accesses the first track of the magnetic sheet by executing the flow shown in FIG. 5, the flow jumps to the flow shown in FIG. While detecting the state of each switch shown in FIGS. 3 and 4, the flow shown in FIG. 3 is repeatedly executed until the state of each switch changes, and a subroutine corresponding to the operated switch is called.

Here, the subroutine [F] called when the track setting feed speed switch 56 is turned on will be explained using FIG.

FIG. 7 is a flowchart showing a subroutine executed when the switch 56 for changing the track setting feed speed is turned on.

#F-1, #F-2: The set value of the track feed speed is read from the memory, and the set value is set in a track number display buffer (not shown).

Therefore, the two-digit 7-segment LE shown in Figure 3
The track feed speed is displayed on D25. If the flow comes to this step for the first time, 2 per second in #1.
Since the track advance speed on the screen is set, select “2”.
” is displayed.

#F-3: When the track feed speed setting switch 56 is on, the flow repeats #F-3, and when the switch 56 is turned off, the flow moves to #F-4.

As mentioned above, once the track feed speed setting switch 56 is turned on, the 2-digit 7-segment LED 25 shown in the third column switches from displaying the track number to displaying the track feed speed.
Next, the track feeding speed is changed by turning on the switch 56 again.

#F-3 is provided so that the track feed speed is switched only when the switch 56 is turned on, turned off, and then turned on again as described above.

#F-4, #F-5, #F-6, #F-7: In these steps, the track feed speed setting switch 56 is turned on, and the 2-digit 7-segment LED shown in FIG.
If the switch 56 or any other switch is not turned on for a predetermined period of time (2 seconds) after the display 25 switches from displaying the track number to displaying the track feed speed, the track feed speed setting is disabled. This is a step provided to cancel the process.

Predetermined time (2 seconds) after timer 1 starts counting
When the track feed speed setting switch 56 is turned on during this period, the flow advances from #F-7 to #F-10, and when the timer 1 completes timing, or when another switch is turned on, the flow advances from #F-7 to #F-10. The flow advances from -6 to #F-8.

#F-8; Clear the count value of timer l.

#, F-9; Contrary to #F-1, the display of the two-digit 7-segment LED 25 shown in FIG. 3 is returned to displaying the track number.

#F-10: Clear the count value of timer l.

#F-11 The setting value of the Ni-track feed speed is single (once recorded or played back, the head is shifted by 1 track in field mode, and 2 tracks in frame mode)
If it is a single, the flow advances to #F-12, and if it is not a single, the flow advances to #F-13.

Note that, as described above, when the flow reaches this step after the power switch 41 is turned on, the track feed speed is previously set at 2 screens per second in #l.

#F-12 If the track feed speed setting value is single, change the setting value to 2 screens per second, return to #F-1, display the changed track feed speed, and return to # above.
Execute F-3 to #F-7.

9F-13:) Detects whether the rack feed speed setting value is 2 screens per second, and if it is 2 screens per second, the flow proceeds to #F-14, and if it is not 2 screens per second, the flow proceeds to #F-15.

#F-14:) Change the rack feed speed setting value to 5 screens per second, return to #F-1, display the changed track feed speed, and execute the above steps #F-3 to #F-7. .

#F-15 Detects whether the NiDrac feed speed setting value is 5 screens per second. If it is 5 screens per second, go to #F-16. If it is not 5 screens per second, that is, if 10 screens per second is set. The flow advances to #F-17.

#F-16: Determine whether the PB mode flag is set. If the PB mode flag is set, that is, if the playback mode is set, #F-18
If the PB mode flag is reset, that is, if the recording mode is set, the flow advances to #F-19.

$F-17: Change the track feed speed setting value to single, return to #F-1, display the changed track feed speed, and execute steps #F-3 to #F-7 described above.

#F-18: In the playback mode, regardless of whether the video signal recorded on the track of the magnetic sheet l is a field video signal or a frame video signal, field playback is performed during continuous track feeding. Therefore, in such a case, change the track feed speed setting value to 10 screens per second,
The flow returns to #F-1.

#F-19: Detects whether or not the field flag is set, and if the field flag is set, that is, track advance of 5 screens per second is set in recording mode, and in field mode, 9F-19. The flow branches to 18.

Also, if the field flag is not set, that is, the track feed speed setting value of 5 screens per second is set in recording mode, and in frame mode, @F-17
The flow advances to change the track feed speed setting to single.

Therefore, in the above-mentioned subroutine [F], when the track feed speed setting switch 56 is turned on, the track feed speed is displayed on the two-digit 7-segment LED 25 shown in FIG. 3 for a predetermined period of time (2 seconds). The track advance speed is changed by turning on the switch 56 again within the time.

In addition, the range of changes is single, 2 screens per second, and 5 screens per second when in frame recording mode, and single, 2 screens per second, and 5 screens per second when in other than frame recording mode.
There are 4 types of screens, 10 screens per second.

The range of such changes is the head 3-1°3-2 shown in FIG.
This is related to the track shifting ability of the moving mechanism, etc., and is set in advance to an appropriate range depending on the track shifting ability.

Next, using FIG. 8, while executing the subroutine shown in FIG. 6, the track UP switch 54. TRACK DOWN
The subroutines ① and ② that are called when the switch 55 is turned on will be explained. First, a flow called when the track UP switch 54 is turned on will be explained.

#D-1 When the Niflow 1 reaches this step, detect whether the track being accessed by the head 3-1 is the innermost track or not by detecting whether the register N is 50 or not. Determine by.

As a result, if N is not 50, go to #D-2;
If it is 0, the flow advances to #D-34, which will be described later.

#D-2: Determine whether the PB mode flag is set. When the PB mode flag is set,
That is, when the PB mode flag is not set to #D-8 in the playback mode, that is, in the recording mode, the flag is #D-3.
Heflo advances.

@D-3: Memory address N+1 is “0000”, i.e. N+1) Detect whether or not the rack is unrecorded;
If not recorded, #D-4 If already recorded, #D-7
Flow branches.

#D-4: No. N+1) U. If it is determined in #D-3 that the field flag has not been recorded, it is determined in this step whether or not the field flag is set, and if it is set, the field flag is transferred to #D-6. If not, the flow advances to #D-5.

#D-5: When it is determined that the field flag is not set in #D-4 and the mode is frame mode, this step is reached. In this step, it is detected whether the N+2nd content of the memory is "oooo", and if it is "0000", that is, the N+2nd content is detected.
If the track is unrecorded, go to #D-6 and “00
00'', that is, if the N+2 track has been recorded, the flow advances to #D-7.

By executing steps #D-3 to #D-5, if both consecutive two tracks are unrecorded in frame mode, at least one of the two consecutive tracks will be moved to #D-6. #D- if it has been recorded
The flow advances to 7.

#D to 6: In the field mode, the track that the head 3-1 is accessing; in the frame mode, the track that the head 3-1 is accessing, and the track that is one track inner than the said track. If the track being accessed by the head 3-2 is unrecorded, that is, if it is recordable, the flow reaches this step, and the RECLED shown in FIG.
44B lights up.

#D-7: Head 3-1.3-”2 opposite to #D-6
When the track to be accessed and recorded has already been recorded, the RECLED 44B shown in Figure 3 blinks to make the user aware that recording is not possible. Displays a warning.

#D-8: If the PB mode flag is set in #D-2, the flow reaches this step and the field flag is set.

For the meaning of this step, see #D-9゜#D-10.
#D=13 will be explained.

#D-9: Memory address N is “0011”, that is #
As explained in Section 13, it is detected whether the track being accessed by the head 3-1 is the outer track of the two tracks that make up the frame video signal, and it is determined whether the track is the outer track of the two tracks. If so, the flow proceeds to #D-10, and if the track is not on the outer circumferential side, the flow proceeds to @D-13.

#D-10: Detects whether address N+1 of the memory is "0010", that is, whether the track being accessed by the head 3-2 is the inner track of the two tracks making up the frame video signal. The inner circumference of the two tracks (1111
If the track is on the outer track, the flow proceeds to #])-11, and if it is not an outer track, the flow proceeds to #D-13.

That is, if the inner track of the two tracks making up the full seam video signal is erased or a new video signal is recorded after erasing, the track accessed by the head 3-1 constitutes the frame video signal. Even if it is the outer track of the two tracks, the track that the head 3-2 is accessing may not be the inner track of the two tracks. Therefore, in this case, when shifting the head 3-1, 3-2 to the inner circumferential side, it is necessary to shift only one track and reproduce the track on which the video signal is newly recorded after erasing or erasing.

However, in such a case, the head 3-1°3-2 is
When only the track is shifted to the inner circumferential side, the head 3
-1.3-2 does not necessarily have a frame video signal recorded on the track that is being accessed, and may also have a whole (different field video signal) recorded on it. In this case, the field flag is reset. If this happens, a problem arises in that two separate field video signals are reproduced as a frame video signal.Therefore, the above #D
In this embodiment, by providing the step -8, when the head is shifted to the inner circumferential side, a field flag is set in advance in this step to set the field mode, and even in the above case, a completely different field image is generated. The problem that the signal is reproduced as a frame video signal can be solved.

#D-11: In this step, it is detected whether the register N is 49 or not, and if N is 49, #
If N is not 49, the flow branches to #D-12.

#D-12: 2 accessed by head 3-33-2
The flow reaches this step when a frame video signal is recorded on one track. When such recording is being performed, when the track UP switch is turned on, the driver 23 is driven to shift the head 3-1, 3-2 by one track in this step, and then #D-
At step 13, the l track head 3-1.3-2 is further shifted. Also, as mentioned above, head 3-1.3-
Every time 2 is shifted, N is updated by l.

#D-13; Similar to #D-12, head 3-1.3-
2 by one track.

#D-14; Similarly to #23, display N on the 2-digit 7-segment LED 25 shown in FIG.

In this embodiment, such steps are @D-12 and #D-13.
Heads 3-1 and 3- are installed in the later population.
When a frame video signal is recorded on the accessed track 2, the track number displayed on the LED 25 is updated by 2, and when a field video signal is recorded, the track number displayed on the LED 25 is updated. The number is updated by l, and it is possible to display whether a field video signal or a frame video signal is recorded on the magnetic sheet l.

Also, if this step is provided between #D-12 and #D-13, if frame video signals are recorded on the two tracks accessed by heads 3-1 and 3-2, Even if there is, when the track UP switch 54 is turned on, the track number displayed on the LED 25 will be updated one by one.

#D-15; Determine whether the PB mode flag is set. If it is set, go to @D-16,
If it is not set, the flow branches to #D-19. If set, branch to #D-15-1.

#D-15-1; Here, the CPU 40 stores the reproduced ID signal output from the data demodulator 12 in FIG.
Incorporate into 27. The flow advances to #D-15-2.

#D-15-2; Here, it is determined whether the mode is one in which the ID is superimposed on the video signal and monitored. Details of this mode will be explained using FIG. 20. If it is in this mode, proceed to #D-15-3; otherwise, proceed to #D-15-4.

#D-15-3; When the flow reaches this step, the mode is in which the ID is superimposed on the video signal and monitored, so the CPU reads the reproduced ID signal from the RAM 27,
A character pattern is generated by controlling the character generator 40 and superimposed on the reproduced video signal on the monitor. The flow advances to #D-15-4. That is, at this point, the ID DATA signal recorded in the currently accessed track is displayed on the monitor.

#D-15-4; If the automatic track feed flag is not set, the flow branches to #D-20, and if it is, the flow branches to #D-16.

#D-16; Memory N address is “0011” Head 3
It is determined whether the track being accessed by -1 is one of the tracks on the outer circumferential side where frame video signals are recorded. Here, N means that the head 3 is moved after the heads 3-1 and 3-2 have already been moved, as repeated above.
-1 corresponds to the number of the track being accessed. Here, if the content at address N of the memory is "0011", the flow branches to #D-17, and if it is not "0011", the flow branches to #D-19.

#D-17; The contents of memory address N+1 are “0010”
That is, it is determined whether the track being accessed by head-3-1 is the inner track of the two tracks on which the frame video signal is recorded.

Here, if the N+1 address of the memory is "0010", the flow branches to #D-18; if it is not "001O", the flow branches to #D-19.

If the flow reaches this step via #D-18, #D-16, and #D-17, frame video signals are recorded on the two tracks being accessed after the head 3-113-2 moves. Therefore, the field flag set in #D-8 is cleared and the frame playback mode is set. Note that this step is executed only if the automatic track advance flag is set. (If the automatic track feed flag is not set, @D
Since the flow branches from -15-4 to #D-20, #D
Since the field flag remains set at -8, field reproduction is performed. ) #D-19; In this step, it is determined whether the automatic track feed flag is set, and if it is set, #D-19;
If D-20 is set, the subroutine returns (RTS).

The automatic track advance flag is a flag that is set in subroutine ■, which will be described later. When calling subroutine ■ or ■, which will be described later, while running a program that repeats playback while automatically forwarding tracks, the automatic track advance flag is set by subroutine ■, which will be described later. , ■ is provided for extraction.

#D-20; Load the track feed speed setting value from memory.

#D-21; Determine whether the track feed speed setting value is single, and if it is single, check #D-34
However, if it is not single, the flow branches to @D-22.

#D, -22, track feed speed setting value is 2 per second
Determine whether it is a screen or not, and if there are 2 screens per second, #D
-23, if there are not two screens per second, the flow branches to #D-24.

#D-23; WAIT TIM in CPU 40
Set the ER register to 28.

#D-24; Determine whether the track feed speed setting value is 5 screens per second, and if it is 5 screens per second, check #D-2
If there are not 5 screens per second, the flow branches to #D-26.

#D-25; Set the WAIT TIMER register to lO.

HD-26; 1 per second as track feed speed setting value
If 0 screen is set, the flow reaches this step and the WAIT TIMER register is set to 4.

The WAIT TIMER registers set in #D-23, #D-25, and #D-26 are used to control the track feed speed, and the WAIT TIMER registers set in #D-31 and #D-32, which will be described later, are The value is subtracted every time the magnetic sheet 1 rotates once by the motor 2.

#D-27; Determine whether or not the REC execution flag is set. If it is set, the flow branches to #D-28; if not, the flow branches to #D-31.

Here, the REC execution flag is a flag set in subroutine ■, and WAITTIM is set when subroutine ■ is called during execution of a program that repeats recording while automatically sending tracks.
2 in HD 29, #D-30 from ER register
Or, by subtracting 5, it is provided to obtain the time equivalent to the time required for recording. That is, in the recording mode, the rotation state of the magnetic sheet 1 is detected from the PG coil 21 to determine the timing for recording the signal to be recorded from a predetermined position on the magnetic sheet, and to record the signal on the magnetic sheet 1. It is set up for the purpose of

#D-28;, :, (7) Determine whether the field @D-29 flag is set by three steps #
D-30 separate, WAITTIM when set
Subtract 2 from the ER register, and subtract 5 from the WAIT TIMER register if it is not set.

Here, if 10 screens per second is set as the track feed speed, the WIT TIMER register is set to 4, but such a setting is possible only in field mode, so in this case, 5 is set from the WAIT TIMER register. is never subtracted.

#D-31: Detects whether or not there is a pulse from the reference signal generator 19 shown in FIG. 1. If there is a pulse, go to #D-32; if not branch, go to #
Repeat the flow of D-31.

#D-32; Subtract 1 from the contents of the WAIT TIMER register.

#D-33; Determine whether the content of the WAIT TIMER register has become O, and if it is 0, #D-34
If it is not 0, branch to #D-31.

In steps @D-32 to #D-33, the timer for controlling the track feed speed is set to WAITTI.
A MER register and a reference signal generator 19 were used. Therefore, compared to the method of configuring a timer by subtracting the contents of the WAIT TIMER register according to the output of the waveform shaping circuit 22 that shapes the output of the PG coil 21, stable and more accurate clock operation can be performed. . That is, P
Although the output of the G coil 21 may include errors due to causes such as uneven rotation of the magnetic sheet 1, the output of the reference signal generator 19 has substantially no such errors. Further, when performing interval recording, it is desirable to stop the rotation of the DC motor 2 during the interval time in order to save power consumption.

When performing such an operation, the method of subtracting the WAIT TIMER register according to the output of the waveform shaping circuit 22 is as follows.
Although it is not possible to measure the interval time over time, the method of this embodiment makes it possible to perform a stable timekeeping operation even when such an operation is performed.

#D-34; Determine whether or not the REC execution flag is set, and if it is set, return (RTS) to the original program that called the subroutine ■; if it is not set, # Branch to D-35.

#D-35; Determine whether or not the track UP switch 54 is on, and if it is on, further shift the track accessed by the head 3-1, 3-2 to the inner circumference side. Therefore, the flow branches to #D-1, and when it is off, the flow branches to #D-36.

#D-36; To determine whether or not the track DOWN switch 55 is on, and when it is on, shift the track accessed by the head 3-1.3-2 to the outer circumferential side. Then, it branches to #E-1 of subroutine (2), and when it is off, it branches to #D-37.

#D-37; If the PB mode flag is set, go to #D-38; otherwise, go to the corresponding subroutine ■
Return to the program that called.

@D-38; In the case of a video signal recorded at frame #D-39 in the same manner as D-6, 17, and 18, frame @D
- Clear the field flag to play 40 frames. After that, return to the porogram that called the diaphragm subroutine ■.

In the above example, #D-23 is passed regardless of whether it passes through #D-12 in PB mode or not.
, 25, and 26, the value set in WAIT TIMER is not changed, and if #D-12 is passed by the time required to perform one track feed, the track feed speed will be delayed. However, in order to match this, in #D-27, #D-12
If it passes through, there is no problem at all if you subtract the time required to feed the head for one track from WATE TIMER (track feeding speed can be matched).

Next, the subroutine [F] executed when the track DOWN switch 55 is turned on will be explained.

Steps #E-1 to @E-13 of subroutine (2) are similar to steps #D-1 to #D-13 of subroutine (◎), so a detailed explanation will be omitted.

However, subroutine ■ is track DOWN switch 55.
For example, #E-
1, it is detected whether N=1, and in #E-9, the memory (N-1) battery is 0010", that is, the (N-th)
1)) Detect whether the rack is the inner track of the two tracks constituting the frame video signal, and in #E-10, the memory address (N-2) is "0011", that is, the (N-2)th track. ) The rack constitutes the frame video signal 2
It detects whether the track is outside the tracks, and also detects whether N=2 in @E-11, and #E-11 detects whether N=2.
12, #E-13 has 1 track head 3-1.3-
2 to the outer circumference.

Next, with reference to FIG. 9, subroutine (2) which is called when the field/frame changeover switch 59 and the REC mode setting switch 51 are turned on will be explained.

#J-1: When it is detected in #A-10 shown in FIG. 6 that the field/frame changeover switch 59 is turned on, the flow advances to this step, and in this step, the field flag is set. If it is set, the flow branches to #J-2, and if it is not set, the flow branches to #J-4.

#J-2; When the field flag is set in #J-1, the field flag is cleared in this step.

#J-3: Determine whether or not the PB mode flag is set. If it is set, the flow branches to #J-8; if not, the flow branches to #J-5.

#J-4; When it is detected in #J-1 that the field flag is not set, the field flag is set in this step.

If the PB mode is not set, that is, in the recording mode, and the field flag is cleared in #J-2, the frame recording mode is entered, and as explained in subroutine O9■, [F], the frame recording mode is
Continuous recording of the screen is not possible.

Therefore, when switching from field mode to frame mode in the subroutine, if a track feeding speed of 10 screens per second is set as the track feeding speed, it is necessary to prohibit such switching.

Therefore, according to this embodiment, #J-6 and #
When a track feed speed of 10 screens per second is set by J-7, the track feed speed setting value is automatically changed to a track feed of 5 screens per second.

#J-5: Set track feed speed to CPU4
Take it into 0.

#J-6; If the track feed speed setting value imported in #J-5 is 10 screens per second, #J
-7, and if it is not 10 screens per second, the flow branches to #J-8.

#J-7; Change the track feed speed setting value to 5 screens per second.

#J-8; Field/frame setting switch 51
If the switch continues to be turned on, this step is repeated, and only when the switch turns off from on, returns to the step shown in #A-1 in FIG.

Next, subroutine (2) called when the REC mode setting switch 51 is turned on will be explained.

#B-1; REC in #A-1 shown in Figure 6
When it is detected that the mode setting switch 51 is turned on, the flow branches to this step, and the PB shown in FIG.
, LED44A goes out and the PB mode flag is cleared.

#B-2; These five steps are similar to #B-3 and #D-3 to #D-7 shown in FIG.
4th explanation will be omitted.

#B-5 #B-6 #B-5-1 In this step, the CPU 40 controls the character generator 84 to temporarily stop generating characters.

#B-5-2; Determine whether or not it is the ID setting mode. If it is the setting mode, proceed to #B-5-3; otherwise, proceed to #B-6'.

#B-5-3; The CPU 40 reads the set ID from the RAM 27 and controls the character generator 84 to generate a character pattern. Therefore, the ID is displayed on the monitor 13 superimposed on the video signal input from the video signal input terminal 18. The flow then proceeds to #B-6'.

@B-6': This step is repeated while the REC mode setting switch 51 continues to be turned on, and when the switch is turned off, the flow branches to #B-7.

#B-7; When the REC mode setting switch 51 is turned off, it is determined in this step whether the field flag is set, and if the field flag is set, the process goes to #A-1 in FIG. The flow returns to the step shown, and if the field flag is not set, jumps to #J-5 of subroutine ■, and steps #J-6 to #J-
By executing step 8, when the track feed speed setting value is 10 screens per second, it is automatically corrected to 5 screens per second. Therefore, when the REC mode is set by the REC mode setting switch 51 and the frame mode is set, the track feed speed setting value is limited to a maximum of 5 screens per second.

Next, the subroutine ◎ called when the PB mode setting switch 53 is turned on will be explained using FIG.

#C-1; When it is detected that the PB mode setting switch 53 is turned on in #A-3 shown in FIG. 6, the flow branches to this step, the RECLED is turned off, and the field flag is temporarily set. . That is, separate field video signals are recorded on the two tracks being accessed by heads 3-1 and 3-2, and P
When the frame recording mode in which the B mode flag is cleared and the field flag is reset is set, the heads 3-1 and 3-2 are accessed by detecting that the PB mode setting switch 53 is turned on. In order to prevent separate field video signals from being interlaced and played back when the track is played back immediately, field flags are set once in this step.

#C-2; Detects whether the memory address is "001", that is, the track being accessed by the head 3-1 is the outermost track of the two tracks where the frame video signal is recorded, and is set to "0011". In some cases, go to #C-3 “0011”
If not, the flow branches to #C-5.

#C-3, it is detected whether the memory address N+1 is "0010", that is, the track that the head 3-2 is accessing is the inner track of the two tracks where the frame video signal is recorded, and it is set to "0010". If so, send “001O” to #C-4.
'', the flow branches to #C-5.

#C-4; Head 3- in #C-2 and #C-3
When it is detected that frame video signals are recorded in the two tracks that are being accessed by 113-2, the flow reaches this step, the field flag is cleared, and the frame mode is set.

#C-57 The PB LED 44A shown in FIG. 3 lights up, the PB mode flag is set, and the playback operation is started.

#C-5-1: In this step, the CPU 40 controls the character generator 84 to temporarily stop generating characters. The CPU 40 also uses the ID demodulated by the data demodulator 12.
DATA is stored in the RAM 27.

#B-5-2: Determine whether or not it is the ID display mode. If it is the display mode, proceed to #C-5-3; otherwise, proceed to #C-6'.

#C-5-3, the CPU 40 reads the ID demodulated by the data demodulator 12 from the RAM 27, and controls the character generator 84 to generate a character pattern. Therefore, the ID is displayed on the monitor 13 superimposed on the video signal reproduced from the magnetic sheet.

Flow then proceeds to #C-6.

#C-a; If the PB mode setting switch 53 continues to be turned on, this step is repeated, and when it is turned off, the $A-14 shown in FIG.
Returns to 9 through -1.

Next, using Fig. 11, set the interval time setting switch 5.
The subroutine ① that is called when 7 is turned on will be explained. First, in the subroutine @@G-0, the timer T' is initialized to O and the interval time Ti is displayed on the 7-segment LED 25.

#G-1; In #A-7 of FIG. 6, when it is detected that the interval time setting switch 57 is turned on, the timer T' is initialized to O, and then the flow reaches this step, Further, when the 10 key switches 63 to 72 are turned on, the flow branches to #G-2, and when the 10 key switches 63 to 72 are not turned on, the flow branches to #G-3.

3G-2; Change the interval time Ti to the interval time Ti set by the 10 key switches 63-72.

#G-3; It is determined whether any switches other than the 10 key switches 63 to 72 are turned on. If they are turned on, the process branches to #G-4. If they are not turned on, the process branches to #G-5.

#G-4; Detects whether or not the interval time setting switch 57 is turned on, and when it is turned on, #G-1 and when it is not turned on, the sixth
The flow branches to #A-1 shown in the figure.

#G-5; Increase the aforementioned T' by 1. The flow moves to #G-6 every second.

However, T' is a timer that is incremented by 1 every second, and no addition is made if less than one second has elapsed.

#G-6; Determine whether T' is lO or not. If T' is IO, change to #A-1 shown in FIG.
If it is not O, branch to #G-1 and return to #G-1 described above.
．． Repeat the loop of #G-3, #G-5 and #G-6, and when T' reaches 10, return to #A-1.

Therefore, in the above-mentioned subroutine ◎, if no other switch is turned on within 10 seconds after the interval time setting switch 57 is turned on, #A shown in FIG.
The value returns to -1 and the interval time setting is canceled. While executing the subroutine ◎, the interval time Ti is of course displayed on the 2-digit 7-segment LED 25, but #
At G-6, the display of the interval time Ti required when returning to #A-1 is stopped.

Also, in this subroutine @, the interval time T
When i is set to "0", an external trigger mode is set for performing an operation when connecting to a printer, for example, as described in subroutine (2) as a reproduction operation.

Next, subroutine (2) called when the REC switch is turned on will be explained using FIG. 12.

#N-1; When it is detected in #A-2 of FIG. 6 that the REC switch 52 is turned on, the flow reaches this step, and it is detected whether the PB mode flag is cleared, When it is not cleared, the flow returns to #A-14 shown in FIG. 6 (RTS) because it is in the playback mode, and when it is cleared, the flow branches to #N-2.

Therefore, if the REC mode is not set, no recording will be performed even if the RFC switch 52 is turned on.

#N-2; It is determined whether the N address of the memory is "oooo", that is, whether the track being accessed by the head 3-1 is unrecorded or not. If it is not unrecorded, the process shown in FIG. 6 is performed. The flow returns to #A-14, and if it is unrecorded, the flow branches to #N-3.

#N-3; It is determined whether the field flag is set, and if it is set, the flow branches to #N-5; if it is not set, the flow branches to #N-4.

#N-4; This step is entered when the frame recording mode is set, but if address N+1 of the memory is "0000", that is, the track being accessed by head 3-2 has not been recorded yet. #A-1 shown in Figure 6 if it is not unrecorded.
The flow returns to 4. In addition, in such a case, REC, L
ED44B is blinking.

This track was also unrecorded. In this case, the flow branches to #N-6.

#N-5: A video signal for one field is recorded on one track on the magnetic sheet l by the head 3-1. At this time, SW6 shown in FIG. 1 is turned off, and the output of the character generator 84 is not output to the monitor. Also, 0001 is set in the memory address N.

@N-6; When the flow reaches this step, the frame recording mode is set, so the video signal for one field is sent to each of the two tracks on the magnetic sheet 1 to the head 3-1.3-. Recorded by 2. 0011 at memory address N and 001 at address SN+1
0 is set and SW6 is turned off similarly to #N-5. Next, the step motor 24 is driven to move the head 3-1.3-
2 to the inner circumferential side by one track.

Note that when #N-5 and #N-6 are executed, SW2 to SW5 are driven as explained in FIG. Also #N-6
When recording is executed in the CPU 40, the RA
The set ID is read from M27, and by outputting it to the data modulator 14, the data modulator 14
The ID modulated into a DPSK signal is input to the recording amplifier 16, where it is superimposed on the video signal and ID recording is performed. However, the ID display mode is shown in Figure 20C, which will be described later.
), no ID is recorded even if data is set. However, DATA indicating whether the frame is recorded on an inner track, an outer track, or a field is simply recorded together with the video signal. Also, even in the display mode of Fig. 20 a) and b), #N-5 and #N-6
By executing this, the ID DATA signal will not be displayed on the monitor because SW6 is turned off during recording.

#N-7; The REC execution flag is set and SW6 in FIG. 1 is turned on.

By executing #N-1 to #N-7, when the set ID is generated by the character generator 84, superimposed on the video signal, and output to the monitor, the RFC
The character signal that is generated only during execution is SW in Figure 1.
6 will turn it off and the characters will disappear. At #N-7, SW 6 is turned on again, so ID DATA is displayed again.

#N-8, calls subroutine O, and if head 3-1 is accessing a rack other than the 50th'), #D
The flow moves from -11D-2 to #D-3. Then #D-3 to #D-
14 and move the head 3-1.3 to the inner circumference side by l track.
-Move 2. If in frame recording mode, head 3-1 is placed on the inner circumference side by l track in advance with #N-6.
．． Since the head 3-2 has been moved, the head 3-1 accesses the track adjacent to the track recorded in #D-14 even in the frame recording mode. If the track recorded by the head 3-113-2 has already been recorded, the RFC and LED 44B shown in FIG. 3 flash to warn the user.

The flow then branches from #D-15 to #D-19 and #
The flows shown in #D-20 to #D-34 are executed via D-19.

That is, if the track feed speed setting value is single, the flow branches from #D-21 to #D-34, and returns to #N-9 according to the REC execution flag set in advance in #N-7. .

#D-2 if 2 or 5 screens per second is set
WAIT TI for the time necessary to record at 8.
When the MER register is subtracted and the WAIT TIMER register is counted down and the WAIT TIMER register becomes O, the flow changes from #D-33 to #D-3.
4 and then returns to #N-9 in accordance with the REC execution flag set in #N-7 in the same manner as described above.

#N-9, clear the REC execution flag.

#N-10: This step is similar to #D-20, and the set value of the track feed speed is taken in from the memory.

#N-11;) If the set value of the rack feed speed is single, go to #N-12; if not, go back to #A-14 shown in FIG. 6.

3N-12;) When the rack feed speed is set to single, this step is controlled so that as long as the REC switch 52 is on, subroutine (2) is executed again and no recording is performed. .

When the track feed speed is set to other than single and the REC switch 52 is turned on, #N-
11 calls subroutine ■ from #A-1 through #A-14, and the above flow is executed, and the RFC is executed.
As long as the switch 52 is on, recording continues at the set track feed speed. If the RFC switch 52 is turned off, the flows #A-14, #A-1 . #
The process advances to A-2, but the continuous recording ends without calling subroutine (2) at #A-2.

Next, the subroutine (2) called when the program setting switch 58 is turned on will be explained using FIG.

#H-1; When it is detected in #A-8 of FIG. 6 that the program setting switch 58 is turned on, this step is reached, and it is determined whether or not the PB mode flag is set, and the When the setting is set, it returns to #H-2, and when it is not set, it returns to #A-1 shown in Fig. 6 (RTS
). This step is provided to prohibit program settings in the recording mode.

That is, in this embodiment, when setting a program, a playback mode is selected in advance, so that the program is set while checking the image recorded on the magnetic sheet 1 on a monitor, for example.

Further, by automatically setting the PB mode flag when the program setting switch 58 is turned on, the operation to the reproduction mode can be performed automatically. In this case, a CALLC may be provided to call the subroutine ◎ to perform a step similar to the step shown in the subroutine ◎, that is, instead of the step shown in #H-1.

#H-2; When a program is reproduced in the program track memory shown in FIG. 14 where the program is stored, the I register indicating the address where the next track number to be reproduced is stored is set to 0.

#H-3; Set the program playback mode flag indicating that it is the program playback mode and return to #A-1.

Next, the 15th subroutine ■ is called when the program track setting switch 62 is turned on after the program playback mode is set by the subroutine ■.
This will be explained using figures.

#I-1: It is determined whether the program reproduction mode flag is set, and if it is set, the flow branches to #I-2, and if it is not set, the flow branches to #A-1. Therefore, when the program playback mode is not set by the program setting switch 58, no program setting operation is performed even if the program track setting switch 62 is turned on.

#I-2; Register S (
In #1, the same contents as those of S20 (initialized as S20 when the power is turned on) are written to register M.

@I-3; Change the program track memory data at the address stored in register M by 1 from that address.
stored at a larger address. In other words, the data indicating the track number stored in the program track memory is stored at an address larger by l than the address where the data is stored.

#I-4・; Write the value obtained by adding 1 to the contents of register M to register I.

@I-5; Subtract 1 from the contents of register M.

@1-6; Determine whether the contents of register M are 0 or not,
If it is 0, the flow branches to #I-7, and if it is not 0, the flow branches to #■-3.

Repeat the flow from #I-3 to #I-6, and when the contents of register M become 0, all data stored at each address in the program track memory is transferred to an address that is 1 larger. Therefore, when this flow is repeatedly executed and the flow branches from #I-6 to #I-7, no data is stored at address l of the program track memory.

#I-7; The number of the track that the head 3-1 is accessing is stored at address l of the program track memory. Therefore, by turning on the program track setting switch 62, the number of the track where the video being accessed by the head 3-1 and being reproduced is recorded is programmed.

#I-8; Add 1 to the contents of register S. By executing this step, the first address (largest address) where the program track memory data moved by executing the flow from #■-3 to #I-6 is stored is always stored in register S. It turns out.

#I-9; If the program track setting switch 62 is turned on, repeat this step; if it is turned off, return to #A-1.

If the user wants to continue setting the program, turn on the track UP switch 54 or the track DOWN switch 55 to set the head 3-1.3.
-2, the track being accessed can be changed, and program settings can be made by turning on the program setting switch 62 while checking the reproduced video when the desired track has been reproduced.

Note that each time the program setting switch 62 is turned on, the 14th
The data stored at each address of the program track memory shown in the figure will be stored at addresses one by one. Also, during program setting, all registers (S) and register (2) have the same contents.

Next, program playback is performed to play back the program set by turning on the program setting switch 58 and the program track setting switch 62, and the head 3-1
The first part about the program executed when performing interval playback, which plays recorded tracks sequentially at a set interval time, starting from the track being accessed.
This will be explained using FIGS. 6 to 18.

First, the subroutine (2) called when the start switch 60 is turned on will be explained with reference to FIG.

#-1; When it is detected that the start switch 60 is turned on in #A-11 of FIG. 6, the flow reaches this step, and it is detected whether the PB mode flag is set and the PB When the mode flag is not set, the flow branches to #A-1, and when the PB mode flag is set, the flow branches to #-2. Therefore, in this embodiment, if the playback mode is not set in advance, interval playback or program playback cannot be performed, so even if the start switch 60 is turned on by mistake during the recording mode, interval playback or program playback will start. It is possible to prevent this from happening. Also, by providing a step similar to the step shown in subroutine ◎ instead of -1 in #, it is possible to immediately start playing the interval playback program by simply turning on the start switch 60 without having to set the playback mode in advance. .

@Ni1': Lights up the INT and LED indicating that interval playback is in progress.

-2 to @; It is determined whether or not the program playback mode flag is set. If it is set, the flow branches to #-13. If it is not set, the flow branches to #-4.

Here the program playback mode flag is not set, i.e. Regarding the flow when performing virtual playback I will explain.

# -4; Memo') - (7) Determine whether the N address is 0000n1, that is, the track accessed by head 3-1, is unrecorded or not, and if it is unrecorded, set # to 16 unrecorded. Otherwise, the flow branches to #-5. First, the flow from #16 onward will be described assuming that the track being accessed by the head 3-1 is unrecorded.

According to this embodiment described below, when the track being accessed by the head 3-1 is other than the 49th or 50th track, the interval playback is performed from the track to the track being accessed by the head 3-1. When it is the 49th or 50th track, only the tracks that have been recorded sequentially from the 1st track are played back, but when the head 3-1 is moved to the 1st track with -2 in # and -4 in #, If a step of driving the step motor 24 is inserted to access the tracks, only the tracks that have been recorded sequentially from the first track are always reproduced.

Therefore, when the head 3-1 is not accessing the first track but is accessing another track, it is extremely effective for automatically performing interval playback sequentially from the first track and performing a search.

-6 to 9; Sets the automatic track advance flag indicating that interval playback is in progress.

It is determined whether the field flag is set to -7 in #, and if it is set, the flow branches to -9 in # if it is set to -8 in #.

#-8: It is determined whether the track that the head 3-1 is accessing is the innermost track by detecting whether N is 50, and it is detected that N is 50. In this case, the flow branches to #K-10, and if 50 is not detected, the flow branches to @K-11.

-9 to #: Indicates whether the track being accessed by head 3-1 is one track outside the innermost circumference.
The determination is made by detecting whether or not 49.
When 9 is detected, the flow branches to #-10 and when 48 is not detected, the flow branches to #-11.

-10 to #: In this step, it is determined whether or not the interval time Ti set by executing subroutine O is "0".

As will be described later, when the interval time Ti is "O", it is a mode in which the head 3-1 is shifted according to a preset program according to an external trigger signal, and for this mode, the interval time Ti is "O". When set to 0'', the INT LED is turned off at #-26, and track N is set.

After turning off the display and ejecting the jacket, the flow branches to #A-1, and if it is not set to "0", the flow branches to #-12.

#-11; Call subroutine ■, #D-1~
The flow shown in #D-18 is executed.

When subroutine ■ is called in subroutine ■, the PB mode flag is set, so the flow branches from #D-2 to #D-9, and then #
The track that the head 3-1 accessed in -4 is on the outer circumference side of the frame and one track inner circumference than this track is the inner track of the two tracks on which the frame video signal is recorded, and the head 3-1 When it is determined that the 49th track is not being accessed, heads 3-1 and 3-2 access #D-12 and #D-.
When the head 3-1.13 is shifted to the inner circumferential side by two tracks and no discrimination is made, the head 3-1.1 is shifted by one track by #D-13.
3-2 is shifted to the inner circumferential side. Also head 3-1.3
If a frame video signal is recorded in the track being accessed by -2, the field flag is cleared and the flow changes from #D-19 to #-14.
Move to.

#-12; Call subroutine ■#E-1~#
The flows shown in E-13 and #D-14 to #D-19 are executed, and in #K-4, the track on the outer circumference adjacent to the track accessed by the head 3-1 and the track on the outer circumference for another one track are executed. If frame video signals are recorded on two tracks, heads 3-1 and 3-2 are shifted to the outer circumference by two tracks by #E-12 and #E-13; otherwise, With #E-13, only one track is shifted to the outer circumferential side.

Also, if # is the same as -11, if frame video signals are recorded in the accessed tracks 3-1 and 3-2, the field flag will be cleared and the flow will change from #D-19 to #-
Move on to 13.

-13 to #1; It is determined whether the track being accessed by the head 3-1 is the outermost track by detecting whether the content of register N is 1, and it is determined that the track is l. When detected, the flow branches to #-14, and when 1 is not detected, the flow branches to #-12. Therefore, when the flow branches to #-12 at #-8 or #-9, that is, when the head 3-1 is accessing the 49th track or the 50th track, the flow branches to #-12 when # is -8 or # is -9.
By repeating steps 12 and -13, the head 3-1 is controlled to access the first track.

-14 to #; Clear the automatic track feed flag.

As explained above, when the flow from #-14 to #-14 is executed, and the flow branches from #-4 to #-5, Hella F3-1 is set to the track where the video signal is recorded. Tracks on which no video signals are recorded are essentially skipped without being played back.

Furthermore, by executing the flow from -4 on # to -14 on 9, when the flow branches from -4 on # to -5 on #, the two tracks accessed by heads 3-1 and 3-2 are If a frame video signal is recorded, the field flag is cleared in #D-18, so the frame playback mode is automatically set. Also head 3-
When a field video signal is recorded in the accessed tracks 1 and 3-2, the field playback mode is automatically set. Therefore, during interval playback, the most appropriate playback mode is automatically set according to the recording method of the video signal.

-5 to #: The interval time Ti set in subroutine O is fetched from the memory into the register T' of the CPU 40.

-15 to #; Interval time T in the same way as -10 to #
Detects whether i is “0” and if it is “0”, -
17, and if it is not "0", the flow branches to #-16. Here, the following explanation will be given on the assumption that the external trigger mode is not set.

#K-16; Start the timing operation of timer l,
Go to -18 in #.

-18 to #; It is detected whether or not the timer l has clocked for 1 second. If the timer is being counted, the flow branches to -19 to #, and if it is in the middle of counting, the flow branches to -20 to #.

-20 to #; Detects whether the stop switch 61 is on; if it is on, turns off the INT LED via -25 to #A-1; if not, #A-1; The flow branches to -21. Here, when the flow branches to #A-1, from #A-1 to #A-12 again
Since the step is executed, when the stop switch 61 is turned on in the normal state, the flow calls the subroutine (2) from #A-12. Below, subroutine (2) will be explained using FIG. 17.

#M-1; Detects whether or not the program playback mode flag is set. If it is not set, go to #A-14; if it is set, go to 9M.
The flow branches to -2.

9M-2; Detect whether the program playback execution flag is set and if it is set, go to 8M-3; if not set, go to #M-4
Flow branches.

8M-3; Make the contents of register I the same as the contents of register S.

9M-4; Set register S to O and then execute 8M-3.

This subroutine [phase] will be described in more detail in the program playback mode. The following will be described in detail in #121 and subsequent sections.

-21 to #: Detects whether the track UP switch 54 is on, and when it is detected that it is on, calls subroutine ■ and shifts the head 3-1, 3-2 to the inner circumferential side and turns it on. If it is not detected, the flow branches to #-22.

#-22;) It is detected whether the rack DOWN switch 55 is on, and when it is detected that it is on, subroutine (2) is called, the heads 3-1, 3-2 are shifted to the outer circumferential side, When it is not detected that it is on, the flow branches to #-18.

-19 to @; subtract 1 from T'.

-23 to #; When T' is "0" -, -24 to #, T
When ' is not O', the flow branches to #-16.

Therefore, by executing the above-mentioned steps #15 to #23, turning on the track UP switch 54 and track DOWN switch 55 during interval playback will record data on the track adjacent to the track being played. You can play videos that are on the screen. In that case, by keeping switch 54 or switch 55 on, the tracks being played can be automatically updated sequentially according to the track feed speed set in subroutine [F], and the number of tracks during interval playback can be updated automatically. You can also easily play back the video before the screen is placed.

Furthermore, when playing back a video recorded on a track adjacent to the track being played back by turning on the track UP switch 54 and the track DOWN switch 55, in this embodiment, before turning on the switches 54 and 55, When the remaining time of the interval time Ti of the track being played is played back in , the flow moves from # -23 to # -24 and is updated to play a new track. As shown by the dotted line,
If the flow jumps to -5 at #, the interval time T' can be reset to ensure that the image updated by the switches 54 and 55 can be observed for a certain period of time.

-24 to #; When updating the track to be played after the interval time T' ends, it is detected whether or not the program playback mode is set, and if it is set, it changes to -3 to #. If not, the flow branches to #-6.

Next, about the routine ◎ that branches when the program playback mode flag is set at -2 in #, the 18th
This will be explained using figures.

#O-1; Detects whether the contents of register S is “0” and when “On” is detected, sends “O” to #A-1.
When it is detected that this is not the case, the flow branches to #O-2. As mentioned above, register S stores the start address of the program in the program track memory, and the content of register S is "0" if no program is stored in the program track memory. Therefore, when the value is "0", the process returns to A in FIG.

#O-2, detects whether the contents of register I are 0", and when "0" is detected, goes to #O-3; when it is detected that it is not "0", goes to #O-3. The flow branches to 0-3.

As mentioned above, register ■ stores the address of the track memory where the next track number to be played is stored when executing program playback, and as shown in #0-14 below when executing program playback. 1 is subtracted each time one step program playback is executed. Therefore, the reason why the flow branches to #0-2 and register ■ is detected as 0 is because the program has been set and register S is not 0, and the program playback steps have been executed. In other words, when the program playback has been executed - times, the flow branches to #O-3, and when the program playback is executed - times, the flow branches to #0-5.

#O-3; Take the interval time Ti set in subroutine ◎, detect whether the interval time Ti is "0", and if it is "0", execute #0-15, that is, turn off the INTLED, After the track number display is turned off and the jacket is ejected, the flow returns from routine ◎ to #A-1 and ends the program playback operation.

Therefore, in the external trigger mode set by setting the interval time to "0", the program playback operation is stopped after the program playback has been executed twice.

Further, during normal program playback when the interval time Ti is set to a value other than "0", the flow shifts to #0-4.

#O-4; Write the contents of register S to register ■.

Program operation is started again.

#O-5; Data (■) at the address of the program track memory set in register ■ (the data written to the address set in register I of the program track memory is shown by adding parentheses to I) read out.

#O-6, subtract data (I) from N, which indicates the track number currently being accessed by head 3-1, and get "0"
If it is not smaller, go to #0-7, if it is smaller, go to #0-8.
The flow branches.

#O-7; Set field flag. This set is for prohibiting head feeding in the frame mode like #D-8.

#O-8: Shift the heads 3-1 and 3-2 by one track in the outer circumferential direction.

#O-9, detect whether data (1) is equal from N indicating the track number accessed by the head 3-1;
If they are equal, the flow branches to #0-10; if they are not equal, that is, if data (1) is larger than N indicating the track number, the flow branches to #0-11.

#0-10; Shift the heads 3-1 and 3-2 by one track in the inner circumferential direction.

#0-11; #D-16, #D-17, @D-1
Similar to #8, the steps are @0-12, and frame playback and field playback are automatically performed depending on whether the video signal recorded from #0-13 is a frame video signal or a field video signal.

By repeating steps #0-6 to #0-10, head 3
-1 is controlled to access the track programmed in the program track memory.

#0-14; Subtract 1 from register I.

@0-15; The program playback execution flag is set. With this step, the flow can be branched by determining whether the program reproduction mode flag is set at -24 in #. Then the flow is #
Jump to 15.

Therefore, when branching to the routine ◎ at -3 in #, it is first determined whether or not a playback program is actually set, and then it is determined whether or not the external trigger mode is set, and the external trigger mode is selected.

When is set, the program will only be executed once, otherwise the program will be played repeatedly.

Next, a flow when the external trigger mode is set will be explained. When the external trigger mode is set, the flow branches from #-15 to #-15'-1.

#115'-1; Print flag is set here
Determine whether or not.

If it is set, proceed to #K-15'-3; if not, proceed to #K-15'-2.

#115'-2; Here, print track N
FF is set to 5ETL in the buffer NP of O, and O is set in the buffer Pv for counting the number of consecutive prints on the same track.

(Initialize) #115'-3; Here, it is determined whether the buffers N and NP of the track number accessed by the current head are equal. If equal, add 15'-4 to #; if not, add 1 to @
The flow advances to 5'-5.

Note that when the print operation starts, since N has been set in the buffer NP at #115'-5, the flow advances to #115'-4.

Add PVI:l to # at -15'-4,,m,:. Therefore, when the print operation is started, the number of prints is counted in the buffer Pv. #-17
Proceed to.

# to 15'-5; Here, NP has the current head 3
- Enter the track number N that i is accessing,
SET pvt,=o. Proceed to -17' to #.

At #117', it is determined whether the print busy signal is at H level or not. If it is H level, connect # to -17'-
Go to 1. If it is not at H level, proceed to #-21'-1. Note that the H level means that the printer is not connected or that there is an abnormality in the printer.

@117'-t; Here, it is determined whether the E/F signal is at H level or not.

The E/F signal is a signal input from an externally connected printer in this case, and when the print busy signal is at L level, it is a signal that determines whether the printer has frame memory or field memory. This is a valid signal. That is, it is predetermined in advance that when the signal shown in FIG. 16-3 3) a), that is, the E/F signal, is at H level, it is a printer with memory, and when it is at L level, it is a printer without memory. Therefore, by determining the level of this signal, the type of printer can be determined. Here, the flow branches to #-117'-3 when the signal is at H level, and to #-17'-2 when the signal is at L level.

@117'-2; Set the UP flag. This indicates a case where the connected printer is equipped with memory. Flow then proceeds to #118'.

#117'-3; Clear the UP flag. This indicates that the connected printer does not have memory. #117'-3'
Proceed to.

3 to 117'-3': Determine whether PV is 11 or more. That is, it is determined whether the number of identical prints is 11 or more.

$118': Outputs print start signal. 1st
The rise of the print start signal shown as 1) in Figure 6-3 serves as a print start trigger signal for the printer.

-19 to #, now TO: 150m5ec WAIT.

(To is shown in Figure 16-3, and T.<150m5e
c) #K-20; Determine the level of the print busy signal. When the print busy level is at the high level, it indicates that the printer has entered the printing operation, and when it is at the H level, it indicates that the printer has not entered the printing operation. When at L level, it goes to -20'-1 to @, and when it goes to H level, goes to -21'-1 to #.

At #-20'-1, it is determined whether the UP flag is set.

If it is set, go to -20-2; if not, go to #-20'-3.

#20'-2; Since the UP flag was set here, the printer has memory,
Moreover, the change of print busy to H indicates that printing has started, that is, freezing of the video signal to the memory has been completed. In other words, the timing at which the printer outputs the print busy signal is determined after the freeze in the memory is completed (the above-mentioned 150 m5ec is sufficient for the freeze). Here, a mechanism is used to stop the motor 2 that rotates the magnetic sheet 1 and to separate the JACKET and head. That is, this may be done by raising the head, lowering the magnetic sheet, or in this embodiment, by moving the heads 3-1 and 3-2 to a position other than the video recording track by the head moving mechanism 4.

After that, proceed to #-120'-3.

@20'-a; Set print flag. Next, the INTLED is made to blink to indicate that the printing operation is in progress. Go to #-20'-4.

# to 20' -4, when the print busy signal is at H level, to # to 21'; when it is L level, to # to 21'
Proceed to -2.

#121'; Determine whether the 5TOP switch is turned on. If it is not turned on, #120
Branches to '-1, and if turned on, proceeds to #-21'-6.

#21'-1: This is reached when the busy signal is not at the L level at #120'. This is a case where the printer avoids the print start signal and indicates that it did not enter the print operation. Here, it is determined whether the print flag is set. If set, it indicates that print busy has changed to H level once.
If the printer starts operating at 119' and 120', the print flag is set at -20-3 at #), indicating that the printer has started operating. If it is not set, it indicates that the printer was not operated. If set, proceed to #-21'-4; if not set, proceed to #-21'-7.

3 to 21'-2; Here, it is determined whether the E/F signal is at H level or not.

Here, the function of the E/F signal will be explained.

As explained above, the E/F signal is a signal that indicates whether or not there is memory in the printer when the printer busy signal is at H level, that is, when no printing operation is performed. At time T1 after the signal changes from L level to H level when the signal is at L level, it functions as a determination signal to determine whether or not an error has occurred on the printer side. That is, when the print busy signal is at L level, if an error occurs on the printer side, the E/F signal changes to L level.

Then, on the printer side, the print busy signal changes from L level to H level, but when this device reads this change, this device determines the level of the E/F signal at that time within time T1, and the printer operates normally. It is determined whether the printing operation was not completed completely due to an error in the printer. In other words, the level of the E/F signal must be determined within T1 time after it is detected that the printer busy signal has changed from the L level to the H level (#121'-2). ), when the level is H, it is assumed that printing has been performed normally and the flow advances to #-121'-3, and then the flow advances to #-124', thereby repeating the printing operation.

On the other hand, if the E/F signal is detected to be at L level at #121'-2, an error such as running out of ink or printing paper has occurred on the printer side, and printing is not performed normally. , proceed to #-21'-4 to stop continuous printing.

@121'-3; At this point, bring the jacket into contact with the head and rotate the MOTOR. Also, set the print start signal to H level.

This timing is assumed to be later than TI. Then the first
6-11 changes to # and the flow advances to -24.

$121'-4; This step ends up injecting the jacket. Next, the track number is displayed on the display device 25'.

#21'-5; Clear the print flag.

#121'-6; This step is executed when the 5TOPSW is turned on during printing, but the jacket and head are placed in the normal position, SET L is set, and the motor 2 is rotated.

In other words, in the case of a printer with a memory, the motor 2 is stopped at #-20'-2, but the stop switch 61
When turned on, the motor 2 is rotated to perform normal reproduction from the magnetic sheet 1.

Return to the flow of #121'-7; ■.

As explained above, continuous printing is automatically performed by using the print busy, print start, and E/F signals in the interface with the printer. At this time, the E/F signal is used to determine whether the printer has memory or not before outputting the print start signal. After the printer operates, that is, after the video signal is frozen in the memory, the operation of the motor 2 is stopped and the head 3-1.3-2 is
The contact between the sheet L and the sheet L is released to reduce damage to the sheet.

Also, if the printer does not have memory, use the E
The /F signal is at H level, and if the number of identical prints exceeds 10 at #17'-3', #
21'-3, and the print track is moved to the next print track. That is, the same track cannot be printed on more than 10 sheets.

This is important to avoid damaging the magnetic sheet. However, this is not the case with printers that have a memory, and in this embodiment as well, it is possible to print more than 10 sheets at the same time.

In addition, it is determined whether or not the print flag is set in #121'-1, which determines whether the printer has printed even one sheet, and the print is completed. # if done
Go to step 21'-4 and the jacket is inkjet, otherwise go to step 21'-7.

As a result, if the first sheet is not printed, the print mode is canceled, the process proceeds to step #121'-7, and the process returns to step 2.

On the other hand, if the first print is already done and the print is started while automatic printing is in progress,
If the print busy level does not reach the L level, that is, if the print operation does not start, it is assumed that there is some abnormality on the printer side, and the jacket is injected and reproduction of the jacket is stopped. However, if no sheets are printed, no injection is performed and the print mode is canceled. That is, for example, even if a printer is connected, there are cases where the power of the printer is not turned on, and in such a case, it is customary to assume that there is a malfunction when the jacket is injected. Therefore, there is no need for such an operation. Also, #21'
- Track No. LED when injecting at 4
Since the track number is displayed on the screen, you can check the track number where the abnormality occurred. If all printing is completed normally, turn off the track number LED and inject, making it easy to distinguish between error occurrence and normality, making it extremely easy to use.

Furthermore, if the printer connected as an external device is busy when executing steps #K-17' to #K-21'-7 described above, the flow returns to #A-1 as described above and another printer is executed again. The flow shown in FIG. 16 is repeated until the switch is turned on. If the start switch 60 is turned on again while repeating the flow shown in 16th (g), the above-mentioned flow will be repeated and step 17' will be executed again.

In addition, when a printer is not connected as an external device, the printer 13 shown in FIG.
The terminal into which the signal from the busy signal output terminal of ' is input becomes open and becomes H level. Therefore, if a device such as a printer is not connected even though the external trigger mode is set, the track being accessed by head 3-1, 3-2 will continue to be played, and the track being played will is not updated.

Also, if a printer is connected as an external device and the printer is not busy (, @K-17' to #
When the flow advances to K-18', send the print start signal to the printer at #-18' and then #
The printer operation starts after waiting for 150 msec as shown in 19', and if the printer becomes busy, the printer waits for # until the printer operation is finished or the stop switch 61 is turned on. 20'-1゜20' -2, 20' -3, 121' in # (Repeat, when the printer operation is finished, the flow is 12 in #
Program playback is set by branching from 0'-4 to #-24 through #21'-2 and #21'-3, and detecting whether the program playback mode flag is set. Determine if there are any. Here, if program playback is set, the flow branches to #-3 mentioned above, and if program playback is not set, the flow branches to #-6. Further, when the stop switch 60 is turned on, the flow is as described above.

Further, if the external trigger mode is selected when program playback is set, the program playback operation is stopped after the program playback has been executed several times as described in #o-3.

Further, according to this embodiment, even if the external trigger mode is selected and program playback is not set, since -10 is set in #, the head 3 -
1. When the playback is performed sequentially from the accessed track 3-2 to the final track, the playback operation is stopped.

Therefore, in external trigger mode, regardless of whether programmed playback is set or not, the playback operation stops after the normal playback is performed, so the printer is used as a device that performs external triggers. When using , only −-way printing is performed.

On the other hand, in modes other than external trigger mode, even if program playback is set or not, playback starts again from the beginning after playback is performed in a predetermined order. will be held. Therefore, when such a playback device is used in a mode other than the external trigger mode, so-called endless playback can be performed because playback is performed repeatedly in a predetermined order.

Further, although a printer is shown as the external trigger device in this embodiment, it may be a device having an electric transmission function, or any other device as long as it processes a reproduced signal.

Next, the case of setting an ID will be explained.

When the 10 key switches 63 to 72 are turned on in the flow, the flow branches to subroutine (2) shown in FIG.

#R-1; If the PB mode flag is set, the process branches to #R-10 and returns to the flowchart (2). Therefore, in a mode other than the recording mode, even if the IO key is turned on, virtually nothing is executed in this subroutine. If the PB mode flag is not set, that is, in recording mode, the flow changes from #R-1 to #R-
Branches into 2.

@R-2; Here, ID setting mode, that is, video □
An ID is superimposed on the signal to determine whether the mode is being monitored. The method for setting this mode will be described in detail with reference to FIG. 20. If this mode is not selected, the process branches to #R-10 and returns to #A-1 in the flowchart shown in FIG. If this mode is selected, the process branches to #R-3.

#R-3; The CPU 40 reads the set position from the register P of the RAM 27 for storing the set position indicating where on the monitor the ID set here is to be displayed, and presses the 10 key switches 63-
Data corresponding to the switch 72 that has been turned on is written to the address of the RAM 27 corresponding to the set position. Next, the CPU 40 controls the character generator 84 to display the data on the monitor B according to the read set position.

#R-4; Here, the process waits until the IO main key switches 63 to 72 are turned off once. If the switch that was turned on is turned off, the flow advances to #R-5.

#R-5, here, the setting position of the data other than the date in the ID is 11 points from O to 10 as shown in Fig. 21, so if register P is equal to 10, then Branch to #R-6, otherwise branch to #R-7.

#R-6; Here, register P is set to 0, and D
The setting position of ATA is initialized.

#R-7; Here, 1 is added to the value of register P and D
The ATA setting position moves to the next setting position.

#R-7-1. The data at the position stored in register P blinks.

#R-8; In this step, it is determined whether the IO key switches 63 to 72 are turned on, and if they are turned on, the process branches to #R-3 and the 10 key switches are activated according to the flow described above. Set ID
is displayed on the motor 13.

If it is not turned on, the process branches to #R-9.

#R-9; Here, it is determined whether any switches other than the IO key switches 63 to 72 are turned on, and if they are not turned on, the process branches to R-8.

if it is turned on Branch to #R-11.

#R-9-1; Stop blinking of the ID displayed on the monitor. Flow proceeds to #R-10.

#R-11; Here, O is placed in the register P at the ID setting position.
, initialize the ID setting position, and proceed to #R-9-1.

#R-10; Return to the flow.

- As explained above, when the PB mode flag is not set and the ID setting mode is in the ID setting mode, that is, the mode in which the set ID can be monitored, each time the 10 key switches 63 to 72 are turned on, the data corresponding to that switch is is generated at a position determined by register P by controlling character generator 84 by CPU 40.

Next, the ID switch 73 will be explained.

When the switch 73 is turned on, the subroutine ◎ shown in FIG. 20 is called from the flow shown in . Here, subroutine ◎ will be explained.

#Q-1; Here, it is determined whether or not the PB mode flag is set, and if it is set, the process branches to #Q-2; otherwise, the process branches to #Q-7.

#Q-2: Here, it is determined whether or not the mode is ID display mode, that is, whether the mode is such that the ID is output on the monitor superimposed on the video signal. # if in ID display mode
If not, branch to #Q-3.

#Q-3; Here, the CPU 40 controls the character generator 84 to stop displaying the ID output from the generator 84. From here, the flow advances to #Q-6.

#Q-4; Here, the CPU 40 reads from the RAM 27,
The reproduced ID is taken into the CPU 40 and the flow is #Q
-Proceed to 5.

#Q-5: Here, the CPU 40 controls the character generator 84 based on the reproduced ID, and causes the character generator 84 to output the reproduced ID as a character pattern as shown in FIG. 21(a).

The flow then proceeds to #Q-6.

#Q-6, here, if the switch 73 is on, wait; if it is off, the flow proceeds to the next step,
You will return to the flow of

#Q-7: When the PB mode flag is not set and the recording mode is selected, it is determined whether the mode is the ID setting mode or not. That is, if the ID is in a mode in which the character generator 84 outputs a character pattern superimposed on the video signal, the flow advances to #Q-9. Otherwise, the flow advances to #Q-8.

#Q-8; Here, if it is likely to be determined whether or not the mode in which the character "ID" is output by the character generator 84 is determined, go to #Q-10; otherwise, go to #Q-
The flow advances to step 11.

#Q-9; In this step, the CPU 40 controls the character generator 84 to stop displaying the ID, and generates a two-character pattern "ID" by the character generator 84 as shown in FIG. 21(b). to enter the “ID” character display mode. The flow then proceeds to #Q-6. That is, when the ID switch 73 is turned on in the ID setting mode, the "ID" character display mode is set.

#Q-10; In this step, the CPU 40 controls the character generator 84 to stop displaying all character patterns as shown in FIG. 21(c). The flow then proceeds to #Q-6.

#Q-11; If the flow reaches this step, I
Since it is neither the D setting mode nor the "ID" character display mode, that is, the mode is set to stop displaying the ID on the monitor, the CPU 40 takes in the set ID from the RAM 27, controls the character generator 84, and displays the set ID. The character generator 8 uses the ID as a character pattern as shown in Fig. 21(a).
Output from 4. That is, the ID setting mode is set by this step. The flow then proceeds to #Q-6.

As explained above, each time the ID switch 73 is turned on, the I
The display format of D will be rewritten.

In other words, in the playback mode, the ID switch 73
ID display mode in which playback ID DATA is superimposed on the video signal and monitored every time you turn on the playback ID
The ID non-display mode in which no data is output will be repeated. Specifically, the ID shown in FIG. 21(a)
The ID non-display mode shown in display mode (C) will be repeated. In addition, when in recording mode, there is an ID setting mode that displays all IDs to be set, and an “ID setting mode” that displays all IDs to be set.
The "ID" character display mode in which only characters are displayed and the mode in which no ID is displayed on the monitor are repeatedly switched each time the ID switch 73 is turned on. Specifically, as shown in FIG. 21(a). .

The modes shown in (b) and (C) will be switched repeatedly. The ID display in the recording mode will be further described below. FIG. 21(a) in recording mode.

When recording a video signal in the mode shown in (b), the ID is modulated with the video signal in #N-5 and #N-6 in FIG. 12, is modulated into DPS, and is further frequency-multiplexed with the video signal and recorded. It turns out. Also, No. 201D(c)
), ID data is not recorded when recording a video signal. However, DATA indicating whether the recording is inside or outside the frame, or whether it is field recording, is always truncated along with the video signal.

That is, in this embodiment, depending on the number of times the ID switch is pressed, the monitor 1 is
It is possible to switch the display related to ID 3.

In addition, in this embodiment, in the recording mode in which the ID is recorded together with the video signal, there is an ID setting mode in which the display shown in FIG. 21(a) is performed, and in the ID setting mode in which the display shown in FIG.
The reason for providing these two display modes will be explained below.
It is possible to set the year, month, date and 11-digit number, but if you try to display all of the ID information as shown in Figure 21(a), it will occupy a considerable area on the screen of the monitor 13. Therefore, there is a problem that the viewing of the image may be obstructed, so a display mode as shown in FIG. 21(b) is provided to solve this problem.

Next, a method of displaying the reproduced ID in the reproduction mode will be explained. That is, in the recording mode, the image shown in FIG. 21 (
ID recorded along with the video signal when the modes shown in a) and (b) are set by the ID switch 73
We will explain the display method when playing. In the playback mode, when the head is moved to a new track, the ID recorded on that track will be changed to monitor 1.
3 will be played on top. This is done by demodulating the ID reproduced by the data demodulator 12 shown in FIG. 1, reading this output by the CPU 40, and further driving the character generator 84. The ID read by the CPU 40 is held in the RAM 27 by the CPU 40. The display of such ID has been explained using FIG. 21(a), but in this embodiment, the RAM
The following I), n is the display mode of the characters held in 27.
It has two modes shown in ).

I) Only the year, month, and day are set as ID data,
ID recorded without any other data set
The first display mode displayed when playing.

II) A second display mode when playing back an ID in which the year, month, date and other numerical data are both set as ID DATA.

FIG. 22(a) shows the ID display in (2).

FIG. 22(b) shows the ID display in (2).

In other words, for (1), only the year, month, and day are displayed in the lower right corner of the monitor, and for (2), the year, month, date, and other data are displayed in the lower right corner of the monitor. Therefore, the ID information is always displayed in the lower right corner of the monitor screen, so that it can be prevented from interfering with the video signal as much as possible. Further, in this embodiment, the display is displayed in the lower right corner of the screen, but it may be displayed anywhere as long as it is in the corner of the screen.

In order to execute this operation, after reading the output signal of the data demodulator 12 shown in FIG.
It is sufficient to generate a character after confirming that all data other than 8 is not set. In other words, above I), II
), the CPU 40
controls character generator 84.

Also, if it is determined that data other than the date is not the DATA recorded by this device, the 22nd
The display shown in Figure (b) is performed.

This is ok (known check code ID DATA
This can be determined by recording it as such.

Next, a case will be described in which the year, month, and day are set as the ID. In the flow (2), when the year setting switch 74 is turned on, the flow jumps to the subroutine (2) shown in FIG.

#S-1; If the PB mode flag is set here, the flow advances to #5-14 and returns to the flow. If not set, proceed to #S-2.

#S-2; Here, it is determined whether the mode is ID setting mode, that is, a mode in which ID data is superimposed on a video signal and output to a monitor or printer. If it is not in this mode, proceed to #5-14 and return to the flow of (2). If this mode is selected, proceed to #S-3.

#S-3; Here, the year setting position 1 on the monitor 13
The blinking of the number in the 10th digit of the year setting position means that the character in the position shown in ■ in FIG. 24(a) blinks. This means that the CPU 40 84 to generate or not generate a character at this position. This is done by well-known interrupt processing.The flow then proceeds to #S-4.

#S-4; At this point, wait until the switch 74 is turned off. When switch 74 is turned off, the flow is #S-
Proceed to step 5.

#S-5; Here, it is determined whether the 10 key switches 63 to 72 are turned on. If the 10 key switch is on, the flow advances to #S-6. If not, proceed to #5-12.

#S-6; Here, the CPU 40 writes the input data from the lO key switch to the RAM 27, and controls the character generator 84 to generate a character pattern at the year setting position shown as ■ in FIG. 24(a). generate. The flow then proceeds to #S-7.

#S-7; Blink the first digit of the year setting position. This means that the characters at the position shown in Figure 24 (■) blink.

Blinking is performed by CPU 40 controlling character generator 84. The flow proceeds to #S-8.

#S-8, wait until the 10 key switch is turned off. When the 10 key switch is turned off, the flow is #S
Proceed to -9.

#S9; Here, it is determined whether the 10 key switch is turned on. If turned on, flow goes to #5-10, otherwise #5
Proceed to -13.

#5-10; When the 10 key switch is turned on, the CPU 40 writes the data input by the 10 key switch to the RAM 27, and writes it to the position shown in ■ in FIG. 24 (a), which is the first digit of the year setting position. Then, the character generator 84 is controlled to generate a character pattern.

The flow then proceeds to #5-11.

#5-11; CP the blink of the character at the year setting position
U40 controls character generator 84 to stop it. This allows the user to know that the year setting has been completed. Flow proceeds to #5-14.

#5-12; If the IO key switch is not turned on in #S-5, it is determined whether any switches other than the 10 key are turned on. If it is not turned on, the flow will branch to #S-5, #S-5, #5-
Repeat step 12, and if switches other than the 10 key are turned on, proceed to #5-11.

#S-13; Here, it is determined whether any switches other than the 10 key are turned on. If it is not turned on, the flow branches to #S-9, and if it is turned on, the flow branches to #5-11. Therefore I.O.
#S-9゜#5 until the switch outside the primary key is turned on
By repeating step -13, the characters at the year setting position continue to blink, prompting the user to set the year using the IO key switch.

#5-14; If the PB mode flag is set, if the mode is ID setting mode, and if the blinking is stopped by #5-11, the flow returns to step #5-14.

As explained above, when the year setting switch 74 is turned on, the number in the 10th digit of the year setting position starts blinking, thereby informing the operator of the position where data is set. Here, by inputting a number using the IO main key switch, the data input at the blinking position is generated as a character pattern by the character generator 84, and the CPU holds the data in the RAM 27.

When the setting of the IO place digit is completed, the number in the first digit position starts blinking, and the DAT is placed at this position in the same way.
Settings for A are performed. Here, when the setting of the first digit is completed, the year setting mode ends and the process returns to the flow shown in ■, but it is also possible to proceed to the flow shown in ■ and enter the month setting mode.

Next, the setting of the month's DATA will be described in detail with reference to subroutine (2) shown in FIG.

In the flow of (2), when the switch 75 is turned on, subroutine (2) is called and the month DATA setting mode is entered.

#T-1; If the PB mode flag is set here, the flow advances to #T-16 and returns to the flow of (2).

If the PB mode flag is not set, the flow advances to #T-2.

@T-2, here the ID setting mode, that is, the I
It is determined whether the mode is to superimpose D data and output it to a monitor or printer. If it is not in this mode, proceed to @T-16 and return to the flow of ①.

is in this mode If so, proceed to #T-3.

#T-3, here', blink the 10th digit of the month setting position on the monitor. Figure 24 (a) What is the blink of the 10th digit number at the month setting position?
It means that the character in the position indicated by ■ blinks.

This is done by the CPU 40 controlling the character generator 84.
This is done by causing characters to occur or not to occur. The flow then proceeds to #T-4.

#T-4; At this point, wait until the month setting switch 75 is turned off. When the switch 75 is turned off, the flow advances to #T-5.

#T-5; Here, 1-0 key switch 63-72
Determine whether or not it is turned on. If the 10 key switch is on, the flow proceeds to #T-6, otherwise to #T-13.
Proceed to.

#T-6; Here, it is determined whether the data input by the 10 key switch is 2 or more. If the number is 2 or more, the flow proceeds to #T-14, otherwise the flow proceeds to #T-7. In other words, in the case of month setting, the flow is branched according to the number set in this step in order to accept the first digit number only when the first number input is "1" or "0'". .

#T-7; Here, the CPU 40 stores the input data in the RAM.
27 and controls the character generator 84 to write the character pattern to the position shown in ■ in FIG. 24(a), that is, #.
It is generated at the position blinked at T-3. Flow proceeds to #T-8.

#T-8; Here, blink the first digit number at the month setting position. This means that the character at the position indicated by ■ in FIG. 24(a) blinks. The flow proceeds to #T-9.

#T-9; At this point, wait until the 10 key switch is turned off. When the 10 key switch is turned off, flow proceeds to @T-10.

#T-1o, it is determined whether the 10 key switch is turned on or not. If it is on, the flow goes to #T-11, otherwise it goes to #T
Proceed to -15.

@T-11; Here, the CPU 40 writes the data inputted by the lO main key switch in #T-5 or #T-10 to the RAM 27, and writes it to the month setting position 1.
The character generator 84 is controlled to generate a character pattern at the position shown in FIG. In addition, when branching to this step from #T-14, by executing #T-14 and #T-11, the data inputted by the lO main key switch in #T-5 will be displayed in the first digit and 10 “0” is displayed in the place digit.

#T-12; Stop blinking the data at the month setting position,
Displays that month setting is completed.

Flow proceeds to #T-16.

#T-13: Branches to this step if the 10 key switch is not turned on in #T-5. Here, it is determined whether any switches other than the 10 key are turned on. If it is not turned on, #T-
Branches to @T-12 if turned on. That is, until the IO main key switch or other switch is turned on, #T-5. #T-13 flow (repeat, l
If the O primary key switch is turned on, the flow is #T-6
If a key switch other than 10 is turned on, the flow branches to #T-12.

@T-14; This step branches when it is determined in #T-6 that the input data is "2' or more." Here, the CPU 40 stores data "0" in the RAM 27.
Write the character generator 84 in the 10th digit of the month setting position.
is controlled to generate the character pattern "0". The flow advances to #T-11.

#T-15; Here, it is determined whether any switches other than the 10 key are turned on. If it is not turned on, it branches to #T-10, and if it is turned on, it branches to #T-12.

#T-16; Return to the flow of ■.

As explained above, when the switch 75 is turned on, the 10th digit at the month setting position first blinks, thereby first indicating the position where data to be input using the IO main key switch is to be set. If two or more pieces of data are input here, "0" is automatically set in the 10th digit and the input data is automatically set in the 1st digit. Of course, if there is an input of 1 or less, 10
Needless to say, the next blinking position that is input in the 1st digit moves to the 1st digit, and the next data input using the 10 key is set to the 1st digit. Therefore, according to this embodiment, when setting the month, it is possible to easily set the month by taking advantage of the fact that 2 or more is never set in the 10th digit.

Further, in #T-3, only the 10th digit is blinked here, but the 10th digit and the 1st digit may be blinked together.

Furthermore, when the setting of the next first digit is completed, the process returns to the flow in this example, but it is also possible to proceed directly to the subroutine (3) shown in FIG. 26 and enter the day setting mode.

Next, the day data setting will be described in detail with reference to FIG. When the switch 76 is turned on in the flow (2), the day data setting mode is called and the flow jumps to (2).

#U-1; If the PB mode flag is set here, the flow advances to #U-16 and returns to the flow of (2). If the PB mode flag is not set, proceed to #U-2.

#U-2; Here, ID data SET mode,
That is, it is determined whether the mode is such that ID data is superimposed on a video signal and output to a monitor or printer. If it is not in this mode, proceed to #U-16 and return to the flow of (2). If this mode is selected, proceed to #U-3.

#U-3, here, blinking the number in the 10th place of the date setting position on the monitor. Blinking the number in the 10th place of the month setting position means that the character at the position shown in ■ in Figure 24 (a) It means to blink. This is accomplished by the CPU 40 controlling the character generator 84 to generate or not generate characters. The flow then proceeds to #U-4.

#U-4; At this point, wait until the date setting switch 76 is turned off. When switch 76 is turned off, the flow advances to #U-5.

#U-5; Here, it is determined whether the lO key switches 63 to 72 are turned on. If the IO key switch is turned on, the flow advances to #U-6; otherwise, the flow advances to #U-13.

#U-6; Here, it is determined by the 10 key switch whether the input data is 4 or more. If it is 4 or more, the flow proceeds to #U-14; otherwise, the flow proceeds to #U-7. That is, in the case of month setting, the first numbers input are "3", "2", and "1".

In order to accept the first digit only in the case of "0", the branch is branched according to the number set in this step.

#U-7; Here, the CPU 40 stores the input data in the RAM.
27 and controls the character generator 84 to write the character pattern to the position shown in ■ in FIG. 21(a), that is, #.
In U-3, it is generated at the blinking position.

The flow proceeds to #U-8.

#U-8; Here, blink the first digit of the date setting position. This means that the characters at the positions indicated by ■ in FIG. 24(a) blink. The flow proceeds to #U-9.

#U-9; At this point, wait until the 10 key switch is turned off. When the 10 key switch is turned off, the flow advances to #U-10.

#U-10, it is determined whether the 10 key switch is turned on or not. If turned on, the flow goes to #U-11, otherwise #U
Proceed to -15.

#U-11; Here, the CPU 40 writes the data input by the 10 key switch in #U-5 or #-1O to the RAM 27, and generates a character at the position shown in Figure 24 ■, which is the first digit of the fixed sunset position. 84 to generate a character pattern, and the flow then proceeds to #U-12. In addition, when branching to this step from #U-14, by executing #U-14゜#U-11, the data input by the 10 key switch in #U-75 will be displayed in the first digit, and the 10 “0” is displayed in the place digit.

#U-12; Stops blinking of the sunset fixed position data and displays that the date setting is completed.

Flow proceeds to #U-16.

#U-13; This step includes 10 in #U-5.
Branches if the key switch is not turned on. Here, it is determined whether any switches other than the 10 key are turned on. If it is not turned on, it branches to #U-5, and if it is turned on, it branches to #U-12. In other words, the flow of #U-5 and #U-13 is repeated until the 10 key switch or other switch is turned on.
If the lO key switch is turned on, the flow is #T-
If keys other than 6 and 10 are turned on, the flow branches to #U-12.

#U-14; The process branches to this step when it is determined in #U-6 that the input data is "4" or more. Here, the CPU 40 stores data in the RAM 27.
0" is written, and the character generator 84 is controlled to generate a character pattern "0" in the 10th digit of the month setting position. The flow advances to #U-11.

#U-15; Here, it is determined whether any switches other than the IO key are turned on. If it is not turned on, it branches to #U-10, and if it is turned on, it branches to #U-12.

#U-16; Return to the flow of ■.

As explained above, when the switch 76 is turned on, the 10th digit at the date setting position first blinks, thereby first indicating the position where the data to be input using the 10 key switch is to be set. If 4 or more data is entered here, "O" will be automatically set in the 10th digit and the input data will be set in the 1st digit.Of course, if 3 or less is entered 10 for
Needless to say, the next blinking position that is input in the 1st digit moves to the 1st digit, and the next data input using the 10 key is set to the 1st digit. Therefore, according to this embodiment, when setting the day, it is possible to easily set the day by taking advantage of the fact that 4 or more is never set in the 10th digit.

Further, in #U-3, only the 10th digit is blinked here, but the 10th digit and the 1st digit may be blinked together.

In the embodiment described above, the display is blinked to indicate the setting position, but the setting position may be indicated by other methods such as changing the brightness or changing the color.

Next, the erase sequence will be explained. When erasing data, the erase execution switch 78 and erase standby switch 77 shown in FIG. 1 are used. That is, when erasing is to be executed, the switch 77 is used to put the data into an erase standby state in advance, and then the erasure is executed only when the erase execution switch 78 is turned on. Furthermore, there are two modes for erasing: a mode in which a plurality of tracks are continuously erased, and a mode in which only a single track is erased. Hereinafter, the above operation will be described in detail based on the flowchart (2) shown in FIG. In the flowchart of A in FIG. 1, when switch 77 is turned on, the flow calls subroutine d and proceeds to #V'-1. The explanation continues below.

When the erase standby switch 77 is turned on, the flow advances to #V'-1 shown in FIG.

9v'-t; Here, subroutine C is called to set the playback mode. As a result, the playback mode is first set as described above. Also, the buffer (ES) of the erase start track number
"50" is the buffer of the end track number of erasing (
EE) is set to 1'', and furthermore, the erase track number buffer (E) is set to "FF".

#V"-2; Here, the 7-segment LED 25 for displaying the track number is blinked at a timing of 2 Hz to notify the operator that the erase mode has been set.

#V'-3; Here, it is determined whether the erase switch 78 is turned on. If it is turned on, go to #V'-10, if it is not turned on, go to #V'-
The flow advances to 4.

#V'-4; Here, it is determined whether the 10 key switch is turned on. If it is turned on, go to #V'-4-1, if it is not turned on, go to @V.
' The flow advances to -5.

#V'-4-1;#V'-, N,: Oite, 1
This flow is reached when the 0 key switch is turned on. Here, the numerical value indicated by the KEY turned on in the buffer (E) of erase track No. is set to the 1's digit.

At this time, as shown in FIG. 28, the numerical value that had been set in the 1's digit before the 10 key switch was turned on moves to the 1O digit of E, and the value that had been set in the 10's digit disappears. However, the value of "F" is replaced with 0 here. Further, the value of buffer E is displayed on the track number display LED 25. Flow is #V'-4
Proceed to -2.

#V'-4-2; Wait until the 10 key switch is turned off. When the 10 key switch is turned off, the flow advances to #V'-5.

#V'-5; Here, the erase start track number setting switch 81 (START TRACK SW
) is turned on. If turned on, go to @V'-6; if not turned on, go to #V'-
The flow advances to 7.

#V'-6; Here, the value set in the buffer E of the erase track number is set in the buffer ES of the erase start track number. Flow proceeds to @V'-7.

#V'-7: Here, it is determined whether the erase end track number setting switch 82 (STOP TRACK SW) is turned on. If it is turned on, proceed to #V'-8; if not, proceed to #V'-9.

#V'-8: Here, the value set in the buffer E of the erased track number is set in the buffer EE of the erased track number. Then the flow is #V'
Proceed to -9.

#V'-9; Here, erase switch 78, erase start track setting switch 81 (START TRACK
SW), erase end track setting switch 82 (STO
P TRACK SW), determines whether any switches other than the IO key switch are turned on. If it is turned on, the flow advances to #V'-30 and the erase mode ends, but if it is not turned on, the flow advances to #V'-3.

Next, the process proceeds to the case where the erase switch 78 is turned on at #V'-3. The flow after #V'-1o will be explained.

#V'-io; Here, it is determined whether or not there is a erroneous erasure prevention claw attached to the magnetic sheet case in advance. If this claw is present, the process advances to #V'-11, and if not, it is determined that the magnetic sheet itself has measures to prevent erroneous erasure, and the flow advances to #V'-30 to end the erasing mode.

#V'-11; Here, it is determined whether the value of the erase track NO buffer E is "FF".

If it is FF, the flow advances to #V'-22.

In other words, if the value of buffer EE is FF, it means that after setting the erase mode, the 10 key switch is not turned on even once, that is, the flow of #V'-4-1 and #V'-4-2 is not passed. In this case, as will be described later, only the video signal of the currently accessed track will be erased. Also, in this case, if field playback is being performed, the field will be erased, and if frame playback is being performed, the frame will be erased.

If the value of buffer E is not FF, the flow is #V'-
Proceed to 1 Rah.

#V'-12; Here, it is determined whether the value of the buffer ES is equal to 0 or not. That is, it is determined whether a value of "0" is set in the buffer ES by the 10 key switch and the erase start track setting switch 81.

#V'-3 if the value of buffer ES is equal to "0"
Proceed to 0 and exit the erase mode. If it is not equal to "0", proceed to #V'-13.

#V'-13; , :, , :: Determine whether the value of buffer ES exceeds 50 or not. If the value of buffer ES is set above 50, the flow proceeds to #V'-30, otherwise the flow proceeds to #V'-30.
Proceed to V'-14.

@V'-14; Here, it is determined whether the value of ES is equal to "FF". That is, it is determined whether or not a value has been set in the buffer ES by the IO main key switch and the erase start track setting switch 81. If the value of buffer ES is equal to FF, the flow proceeds to #V'-30, otherwise the flow proceeds to #V"-15.

#V'-15; Here, the value of buffer EE is “F
F”. In other words, the 10 key switch and the erase end track setting switch 82
It is determined whether a value has been set in the buffer EE. If the value of buffer EE is equal to "FF", the flow advances to @V'-30 and the erase mode ends.

If it is not equal to "FF", proceed to #V'-16.

That is, according to the flow shown from #V'-11 to @V'-15, in the erase mode, if a value is set to ES or EE using the 10 key switch, the erase start track number will be set to a value other than 0, and the erase start track number will be set to a value other than 0. Ending track N
#V'- only when o is set to a value not exceeding 50
The flow advances to 16, but if not, +11 #V'
The flow advances to -30, and continuous erasure, which will be described later, is not performed.

#V'-16; Here, the sizes of buffers EE and ES are compared. That is, if the erasure start track number is greater than the erasure end track number, the flow advances to #V'-30 and continuous erasure is not performed. Only when this is not the case, the flow proceeds to @V'-17 and continuous erasure is performed.

From the above, @V'-11 to #V'-1677) 70-
In other words, the continuous erase mode is set by turning on the IO main key switch. In other words, if the erase switch 78 is turned on without turning on the lO main key switch even once, the value of buffer E will be #V.
'Because it is the value "FF" set with -1, #V'
At -11, the flow advances to #v'=22, where a single video erasing operation is executed, but the buffer EE
If the value is not "FF", that is, if the 10 key switch is turned on even once, the flow advances to #v'-12,
From #V'-12, confirm that both the erase start track number and erase end track number are set correctly, including the size relationship, using the floor of #V'-16.
The flow advances to step 17, and continuous erasure is executed according to the flow shown below. In other words, #V'-14, #V
'-15, #V'-16+,: If the erase start track is not set, the erase end track is not set, and the erase start track number is higher than the erase end track number. If the value is large, erasing is not performed and the flow advances to #V'-30 to end the erasing mode.

#V'-17; Here, the field flag is SE
T and enters field mode. #V' The flow advances to 18.

#V'-18; Here, the track N that the buffer (ES) of the erase start track number is currently accessing is
Determine whether or not the buffer is larger than the buffer N of o. If it is larger, the flow proceeds to #V'-20; otherwise, the flow proceeds to #V'-19.

#V'-19; 1) Move the head toward the inner circumference of the rack.

Add 1 to the value of N and branch to #V'-18.

#V'-20; Here, the buffer (ES) of the erase start track No. and the currently accessed track N
o Determine whether (N) are equal.

If they are equal, the flow proceeds to #V'-22, and if they are not equal, the flow proceeds to $V'-20.

#V'-21; Here, the head is moved one track to the outer circumferential side. Subtract 1 from the value of N and the flow is #V'
Proceed to -19.

To summarize the operations of the flows #V'-18 to #V'-21 explained above, this is the flow of accessing the head to the track address indicated by the value of the buffer ES set as the erase start track number. This is what is shown. The flow from #V'-22 onwards, which is executed after such access is completed, will be described below.

#V'-22; At #V'-20, when the values of the erase start track No. ES and the accessed track address N become equal, the flow reaches this point, and here the track number display LED 25 is set to 5H.
At the same time as blinking at the timing of z, the track number
Display the value of H on the LED. Flow is #V'-23
Proceed to.

#V'-23; Here, the erase signal shown in FIG. 3 is generated.

#V'-24: At this point, wait until erasing is completed.

When erasing is completed, the flow advances to #V'-25.

#V'-25; Here, it is determined whether the value set in the buffer EE is equal to "FF", that is, whether the continuous erase mode is not in effect. If equal to "FF", the flow is #V'-3
0, otherwise the flow goes to #V'-26.

#V'-26; Here, it is determined whether the buffer EE of the erased track number is equal to the buffer N of the currently accessed track number. If equal, the flow is #V'-30
Otherwise, the flow proceeds to @V'-27.

#V'-27; Here, it is determined whether the value of N is equal to 50 or not. If they are equal, the flow advances to #V'-30 and the erase mode is canceled, otherwise @V
' The flow advances to -28.

#V'-28; 1) Head 3- to the inner circumference of the rack
1. Move 3-2. Add 1 to N. The flow proceeds to #V'-29.

#V'-29; Here, it is determined whether the stop switch 61 is turned on. If it is ON, the flow advances to #V'-30, otherwise #V
The flow advances to '-22, and the above operation is repeated.

In other words, erasing is executed while moving the head one track at a time in the direction of the inner circumference of the head according to the flow shown from #V'-22 to #V'-29.

However, once 50 tracks have been erased (#V'-2
7) Continuous erasure is canceled.

#V'-30; Here, the track number display LE
From the flashing of D25, 5TOP is performed and track No. N remains displayed. In other words, this indicates that the erase mode has been canceled. The flow moves to #V'-31.

#V'-31; Here, it is determined whether or not the erase standby switch 77 is turned on, and if it is turned on, the process waits here. If it is off, the flow advances to #V'-32.

#V'-32; Return to the flow of ■.

As explained above, in this embodiment, the erase mode is set by turning on the erase mode setting switch 77 before executing the erase, and the subroutine ◎
is called, enters the playback mode, and changes the track number.
The display LED 25 starts blinking at a timing of 2 Hz to notify the operator that the erase mode has been set. In addition, when the erase mode is set, l
Continuous erasing mode is set by turning on the O key switch. (If the erase switch 78 is turned on, the continuous erase mode will not be activated, and only the track that the head is accessing at that time will be erased.) If frames are being played, erasing will be performed in frame mode,
If field playback is being performed, erasure is performed in field mode. In addition, if the continuous erase mode is set by turning on the 10 key switch, the buffer for the erase start track number (ES) and the buffer for the erase end track number (EE) are both set correctly. Continuously press the set track
Since the head is not moved from the track indicated by S to the track indicated by EE, erasure is automatically executed one track at a time. In addition, in the flow shown here, even if a value exceeding 50 is set as EE, if other conditions are met, deletion will be executed in the same way as when EE is set as 50 tracks. In #V'-13 and #V'-14, EE
Added a routine to determine whether 50 is greater than 50.
If it is greater than 50, branch to #V'-30 and end the erase mode; if it is less than 50, branch to #V'-14.
If a value exceeding 50 is set in the buffer EE, it can be easily realized that the erasure is not executed. Also, in #V'-29, it is determined whether or not the stop switch 61 is turned on, and if it is turned on, the process branches to #V'-30, otherwise, #V'-
Since the process branches to 22, even if continuous erasing is in progress, erasing can be interrupted by the stop switch 61.

In addition, by setting a WAIT time of a certain time between #V'-28 and #V'-29, the reproduced video signal of the track to be erased next is maintained for the certain period (W) determined above.
A'IT time) can be checked on the monitor. In this way, even if continuous erasing is in progress, if a video signal that you do not want to erase is included in the track range of continuous erasing, you can stop it. Since erasing can be interrupted at @V'-29 by turning on the switch 61, there is almost no possibility of erroneous erasing.

Furthermore, in the flow shown here, subroutine ◎ is called in #V'-1 and the playback mode is set so that the playback signal can be checked on the monitor immediately after the track is moved even during continuous erasing. Are you doing it?
In #V'-1, if you do not set the playback mode, that is, if you omit the step of calling subroutine ◎, the operation shown in the flow below will not cause any problems even if you are not in the playback mode, that is, in the REC mode. (Executed. However, in this case, it is not possible to check the reproduced video signal before erasing is executed.)

However, only when the REC mode is set and continuous erasing is performed, it is extremely effective to have the head access the starting track position of continuous erasing after the end of continuous erasing, considering the operation after erasing. The flow in this case is shown at 0 in FIG.

The flow shown in ■ is the flow shown in V, with the part that calls subroutine ◎ in #V'-1 omitted #W-
33, @W-34, but only the main parts are shown here.

#V'-26, #V'-27 (
7) From the flow, this is the case where all continuous erasing is completed.

#W-33; Here, it is determined whether the PB mode flag is set. If SET, the flow goes to #V-30, which is the same as the flow shown in V.

If the PB mode flag is not set, the flow is #
Proceed to W-34.

#W-34; Here, it is determined whether the values of the buffer ES of the erase start track number and the buffer N of the currently accessed track number are equal. If they are equal, the flow advances to #V'-30, and if they are not equal, the flow advances to #W-35.

#W -35, the head is now moved by one track in the outer circumferential direction and 1 is subtracted from N. The flow advances to #W-34.

In other words, if continuous erasing is executed without the PB mode flag being set, #W-34 and #W-35
By repeating (), the head accesses the track address where continuous erasing started.

According to this embodiment, as a method of setting the execution track range for continuous erasing, the erasing start track number and the erasing end track N are
Since o is set, the erasure range for continuous erasure can be easily set.

Furthermore, according to this embodiment, continuous erasure is performed only when the set values of the erase start track number and erase end track number are both appropriate values, so there is a probability that erroneous erasure will occur. can be reduced.

In the flowchart of Fig. 27, continuous erasing is performed by setting both the start and end positions of continuous erasing, but next, each field recorded screen and frame recorded screen are treated as one screen. A flowchart of an erasing device that counts, presets the number of screens rather than the number of tracks, and then controls the set number of images to be continuously erased will be described with reference to FIG.

In such a case, the remaining recording number confirmation switch 9o is used.

When the erase mode standby switch 77 is turned on, the flow moves to V'.

#V'-t; First, PB mode is set. here,
It is set in the erased video number buffer E from FF. Additionally, the track number display LED blinks at a timing of 2 Hz, allowing the operator to confirm that the erase mode has been set.

#V'-2; Here, it is determined whether the erase switch 78 is turned on. If it is turned on, go to #V'-6, if it is not turned on, go to #V'
-Proceed to 3.

#V'-3: Here, it is determined whether or not the recording number confirmation switch 9o is turned on. If it is turned on, the process goes to #V'-3-1; if it is not turned on, the process goes to #V'-4.

#V'-4; Here, it is determined whether the 10 key switch is turned on. If it is turned on, go to #V'-4-1, if it is not turned on, go to #V.
The flow advances to '-5.

#V'-5; Ko: Te, switch 78.90. It is determined whether a switch other than the 10 key is turned on. If it is turned on, it branches to #V'-23, and if it is not turned on, it branches to #V'-2.

Next, the case where the process branches from #V'-3 to #V'-3-1, that is, the case where the recording number confirmation switch 9o is turned on, will be explained.

#V'-3-1; : Iron, memo IJ - (RA
M27) In (7) Buffer V (recorded number of sheets) is O,
Set N' to N. Therefore, N' has register N
, that is, the track number that the head is accessing.

#V'-3-2; Memory +7) It is determined whether 0011 is set by referring to the N' address, that is, whether the track whose track number is N' is on the outer circumference side of frame recording.

If it is 0011, branch to #V'-3-3; otherwise, branch to @V'-3-5.

#V'-3-3; Here, refer to the memory address N'+1 and check whether 0010 is set at that address, that is, whether the track whose track number is N'+1 is on the inner circumference side of frame recording. Determine whether or not. If it is 0010, proceed to #V'-3-4; otherwise, proceed to #V'-3-5.

#V'-3-4; Here, 1 is added to buffer N'.

#V'-3-5; Here, 1 is added to buffer V and 1 is added to buffer N'. In other words, the buffer V represents the number of recorded videos. In this embodiment, one field video signal is counted per track, and one frame video signal is counted per two tracks.

@V'-3-6; , :, : Te, N' (7)
Determine whether the value is equal to 51. If equal to 51, proceed to #V'-3-7; otherwise, proceed to #V'-3
The flow branches to -2.

In other words, by repeating the flow from #V'-3-2 to #V'-3-6, how many video signals have been recorded from the currently accessed track number N to the final track address 50? The number of dolphins is counted in buffer V.

#V'-3-7; Here, the value counted in the buffer V is displayed on the LED 25 which is displaying the track number.

#V'-3-8; Wait here while 5W90 is turned on. When turned off, it branches to #V'-4.

#V'-4; Here, it is determined whether the IO main key switch is turned on. If it is turned on, the flow branches to @V'-4-1, otherwise it branches to #V'-5.

#V'-5;::Te, switch 78.90. It is determined whether any switches other than the 10-key switch are turned on. If it is turned on, branch to #V'-23 to end the erase mode, and if it is not turned on, @V
The flow branches to '-2.

Next, #V'-4-1, which branches when the 10 key switch is turned on in #V'-4, will be explained.

#V'-4-1; Here, the numerical value corresponding to the switch turned on among the 10 key switches is set in the 1's digit of the erased video number buffer E. Before that 1
The numerical value that was set in the digit was moved to the IO digit and became 10.
The value set in the digit will disappear. Such numerical values indicate track XIO as shown in FIG.
The value of buffer E is displayed on ED25.

@V'-4-2; 10 Wait here while the key switch is on. When turned off, the process proceeds to #v'-5.

In this way, the number of video signals to be deleted (number of frames) is set in the deletion video number buffer E, and this is displayed on the 7-segment LED 25.

Next, the flow from #V'-6 will be explained.

#V'-6; This is reached by turning on the erase switch 78 at #V'-2. Here, it is determined whether or not there is an accidental erasure prevention claw provided on the jacket, and if this claw is present, proceed to #V'-7, and if not, branch to #V'-23 to cancel the erase mode. do.

#V'-7; Here, it is determined whether the value of buffer E is O. If it is 0, the process branches to #V'-23 to cancel the erase mode. If not O #V'
Branch to -8.

@V'-8; Here, the value of memory address N is 001
1, that is, whether or not this is the outer track of frame recording. If so, $V'−
If not, proceed to #V'-11.

#V'-9. :,::The value of memory N+1 address is 00
11, that is, whether it is the inner track of frame recording. If so, #V'
Proceed to -10, otherwise proceed to #V'-11.

#V'-1o; The field flag is cleared here and the frame mode is set. Proceed to #V'-12.

#V'-11; The field flag is set here and the field mode is set. #V'-12
Proceed to.

That is, by executing #V'-8, 9, 10, and 11, it is determined whether the recorded video signal is in field mode or frame mode.

#V'-12; At this point, the blinking of the LED 25 indicating the track number changes to 5 (Hz), indicating that erasing is being executed. Also, at this time, the value stored in the track No. buffer N, that is, the track number accessed by the head 3-1, is displayed on the LED.
25. Next, proceed to #V'-13.

#V'-13; Here, the erase signal shown in FIG. 32 is generated.

#V'-t4; At this point, wait until erasing is completed. When erasing is completed, the process advances to #V'-15.

#V'-15; Here, it is determined whether buffer E is FF or not. In the case of FF, that is, if the number of video signals to be erased has not been set, the process advances to #V'-23. If the number of video signals to be erased has been set, the process advances to #v'-16.

#V'-16; Here, the value of buffer E is subtracted by 1.

#V'-17; Determine whether the value of buffer E is greater than 0. If it is larger, proceed to #V'-18,
If not, proceed to #V'-23.

#V', -18; Determine whether or not the stop switch 61 is turned on. If it is turned on, the process branches to #V'-23 and erase mode is canceled. Otherwise, the flow advances to #V'-19.

#V'-19; Here, it is determined whether the field flag is set, that is, whether the data was erased in field mode or frame mode. If the field flag is set, branch to #V'-21; otherwise, branch to #V'-2
Go to 0.

#V'-20; Here, 1 is added to register N and l
Move the head toward the inner circumference of the track. Proceed to #v'-21.

#V'-21; Here, it is determined whether the register N is 50 or more. If so, the process branches to #V'-23 and the erase mode is ended. Otherwise, the process branches to #V'-22.

#V'-22; Here, 1 is added to register N,
The heads 10-1 and 10-2 are moved inward by one track. This causes the process to proceed to #V'-8.

In other words, by repeating #V'-8 to #V'-22, erasing is performed continuously, and the erased video is transferred to the buffer E.
This continues until the number becomes equal to the number set in , or until 50 tracks have been erased, or until the stop switch 61 is turned on.

#V'-23; Here, the blinking of the LED 25 indicating the number of the track that the head 10-1 is accessing is 5TO.
The track number being accessed by the head 10-1 is displayed on the LED 25. At this point, the erase mode will be canceled. Proceed to #V'-24.

@V'-24; Erase standby switch 7 here
7 is turned on or not. If it is turned on, it waits here, and if it is turned off, it branches to #V'-25.

#V'-25; Return to the flow of ■.

As explained above, according to the flowchart of this embodiment shown in FIG. 30, when the erase standby switch 77 is turned on, the PB mode is set at #V'-1 and the erase mode is set. Here, press the recording number confirmation switch 90.
By turning on, a value indicating how many video signals are recorded on the inner side of the currently accessed track is counted in the buffer V, and this is displayed on the LED 25 for confirmation by the operator. let After confirming this, the operator closes the 10 key switch to set the number of video signals to be erased in buffer E, and then presses the erase switch 78 to set the number of video signals to be erased.
When turned on, the set number of images will be erased. Here, from #V'-3-2 to #V'-3-6, the memory value is 0000, that is, if there is an empty track, it is counted as one, and from #V'-8 to #V'-12, there is also an empty track. Although tracks are erased as field images, empty tracks may not be counted in V and empty tracks may be skipped during erasing.

Further, when the erase standby mode is set by the erase standby mode setting switch 77, the erase switch 78.
When any switch other than the 10-key switch recording number confirmation switch 90 is turned on, this standby mode is canceled and the flow returns to step (2), so there is almost no possibility of erroneous erasure. Furthermore, even when continuous erasing is being performed, the erasing operation can be stopped by turning on the stop switch 61 at #V'-18, so that erroneous erasing can be prevented. Also, before deleting @V'
Since subroutine O is called in -1 to execute erasing in the playback mode, the video signal can be checked before erasing is executed. If the user wishes to stop the erasing operation for some reason during such confirmation, press #V'-
WAITL for a certain period of time between 22 and #V'-8, then it is determined whether the stop switch 61 is on or not, and if it is on, the process proceeds to #V'-23, otherwise #V' This can be easily done by proceeding to -8.

In the embodiment of the present invention described above, when erasing is performed continuously, the number of video signals to be erased is specified using a 10-key switch, and there is no need to distinguish between field video signals and frame video signals. It is counted as one video signal, and it is possible to check how many video signals are on the inner side of the currently accessed track, so the operator does not have to be conscious of fields and frames (and the number of deleted videos). This makes it extremely easy to use.

Next, the subroutine W' executed when the all track erase standby switch 79 is turned on will be explained with reference to FIG.

When the all-track erase standby switch 79 is turned on, the flow shifts to the flow W' shown in FIG.

#W'-1; Here, to indicate that the erase mode has been set, the track number display LED 25 is turned ON and OFF repeatedly at a timing of 2 Hz.

#W'-2: The all-track erase LED lights up to indicate that the all-track erase mode has been set.

#W'-3; Here, it is determined whether the erase switch 78 is turned on. If it is ON, #W'
-5, and if it is not turned on, the flow proceeds to @W' -4.

#W'-4; Here, it is determined whether any switches other than switch 78 are turned on. If it is turned on, the flow goes to #W'-24, and if it is not turned on, the flow goes to #W'-3.

#W'-5; This is reached when the erase switch 78 is turned on at #W'-3. Here, in order to erase all tracks, the head is moved to the first track and the track number buffer N is set to 1.
, and display N on the track number display LED. The flow advances to #W'-6.

@W'-6; Here, it is determined whether the PB mode flag is set. If the PB mode flag is set, the flow advances to @W'-7, and if it is not set, the flow advances to #W'-10.

#W'-7; Here, it is determined whether the memory address N is 0011, that is, whether it is on the outer circumference side of frame recording. If it is 0011, #W'-8
Otherwise, proceed to #W'-9.

#W'-8: Here memory address N+1 is 0010
Determine whether or not. #W' if 0010
Proceed to -10, otherwise proceed to #W'-9.

#W'-9; The field flag is set here. Next, proceed to #W'-11.

#W'-10, the field flag is cleared here. The flow then proceeds to #W'-11.

In other words, if the recording mode is set in advance by the flow from #W'-6 to #W'-10, the field flag is cleared, and if the playback mode is set in advance, the recorded video Field flags are set or cleared by determining the type of signal. In other words, as explained below, in recording mode, erasing is performed in frame mode, and in playback mode, the recorded video signal is in frames if frame recording is being performed, and in frames if field recording is being performed. Erasing will be performed in field mode.

#W'-11; Here the 7 segment LED 25 is 5
It turns on and off (repeatedly) at a timing of Hz, indicating that all track erasing is being executed. Also, an erasing signal is generated here.

#W'-12; Wait until erasing is completed.

#W'-13; Here, the branch destination is determined depending on whether or not the field flag is set. If it is set, go to #W'-16; if not, go to #W'-14.

@W'-14; Here, it is determined whether the track No. N accessed by the head 3-1 is 49 or more. The flow reaches this point only when erasing is performed in frame mode, so if N is 49 or more, it is determined that all tracks have been erased.In that case, the flow goes to #W'-23. If N is less than 49, the flow goes to #W'-15.

@W'-15; Here, add 1 to N and move Rad 3-1, 3-2 in the inner circumferential direction by l track.

#W'-16; Here, determines whether the track number accessed by the head 3-1, that is, the buffer N, is 50 or more. If it is 50 or more, it is determined that erasing of all tracks has been completed, and the flow advances to #W'-23.

If not, proceed to #W'-17.

#W'-17; Here, 1 is added to N, and the head 3-1. 3-2 is moved to the inner circumferential side. N
Although there were 7 segments, it is displayed in 25. The flow is #W
Move to '-18.

#W'-ts; Determine whether the stop switch 61 is turned on. If it is turned on, the flow advances to #W'-24 to stop the execution of all track erasure. If it is not turned on, proceed to #W'-19.

#W'-19; Here, REC mode setting switch 5
1 is turned on or not. If it is turned on, the flow advances to #W'-21.

If it is not turned on, the flow advances to #W'-20.

#W'-20; Here, PB mode setting switch 53
Determine whether or not is turned on. If turned on, go to #W'-22; if not turned on, go to #W'
The flow advances to -6 and the above flow is repeated.

#W'-21, subroutine (2) is called here and the RFC mode is set. The flow advances to #W'-27.

#W'-22; Here, the subroutine ◎ is called and the PB mode is set. The flow advances to #W'-27.

#W'-23: This is the case when all tracks have been erased, and here the head is moved to the first track. Therefore, the next time recording is performed, it is very easy to use. Also, N is set to 1, and N is displayed on the 7-segment LED 25. Next #W'-2
The flow advances to 4.

#W'-24; At this point, the all-track erase mode is canceled. In other words, the all track erase LED goes out, and 7
The segment LED 25 stops blinking.

#W'-25; Here, it is determined whether the all-track erase standby switch is turned on. If it is turned on, it waits here, and if it is turned off, the flow advances to #W'-26.

#W'-26; Return to the main flow of ■.

@W'-27; In this step, it is determined whether or not the PB mode flag is set, and if it is not set and the REC mode is set, $V'
The flow branches to -10.

All track erasure is executed in the above manner. Once the all track erase mode is set, if any switch other than the erase switch 78 is turned on, the flow branches from #W'-4 to #W'-24, cancels this mode, and returns to the main screen. That's what I do. Also, #W' -19, #W' -20 even during all track erasing.
, #W'-21, #W'-22, it is possible to set the RFC mode and the PB mode, so you can set the REC mode and monitor the input video signal as recording standby while all track erase is being executed. Furthermore, in the PB mode, the video signal can be confirmed before erasure is executed. Such confirmation can be ensured by recognizing a certain WAIT TIME between #W'-17 and #W'-18. Furthermore, if the REC mode is set, the flow branches from #W'-27 to #W'-10 and the field flag is cleared, so erasure is always performed in frame mode, that is, for two adjacent tracks. will be erased at the same time, and in PB mode #W'-2
7 to #W'-6 to @W'-10, frames recorded in frame mode are used, and those recorded in field mode are erased in field mode, so all tracks are erased. The time required has been reduced. Note that even if all tracks are being erased, turning on the stop switch 61 will erase the entire track.
Since it is possible to cancel, it can also be used even if there is a video signal that is not deleted in PB mode.

In addition, when all track erasure is completed, #W'-23
It is very effective to set the head on the first track in order to prepare for the next operation.

As explained above, according to this embodiment, when the all track erase mode is set, continuous track erase can be executed without switching to the playback mode, so even during continuous erase, the input video signal can be erased. Monitoring is now possible.

Furthermore, in the case of the all-track mode, which is not the reproduction mode, since two adjacent tracks are erased at the same time, the erasing time is shortened.

Furthermore, in this embodiment, in the all-track erasing mode, after erasing all tracks, the head is moved to the first track, which is the outermost track, so this effect is extremely convenient when performing new recording next time. play.

Furthermore, in this embodiment, in the all-track erase mode, the head was sequentially erased while moving from the outermost track to the innermost track, but conversely, the head was erased sequentially from the innermost track to the outermost track. Of course, erasing may be performed sequentially while moving the head. In such a case, send the head to the 50th track at @W'-5, set N=N-1 at #W'-15, #W'-, and 17, and move the head by l track toward the outer circumference. Instead, in #W'-14 it is determined whether N≦2, and in #W'-16 it is determined whether N≦1.

In such a case, #W'-23 can be omitted, which is extremely effective.

In the embodiments described above, the magnetic sheet 1 is used as the recording medium, but an optical recording medium may be used. A magneto-optical recording medium or other recording medium may also be used. As the recording means, means depending on the recording medium may be used, for example, in the case of an optical disc, an optical head may be used.

In the embodiment of the present invention described above, the means for specifying the block to start erasing and the block to end erasing is provided by the switches 81, 82, .
10 key switches 63-72 and #V shown in Fig. 27
Although the CPU 40 executes steps '-4 to #V'-8, other methods may be used as long as the erase start and end positions are set.

Furthermore, the means for specifying erase start track N for erasing blocks within the specified range.

buffer ES, buffer E of the erase end track number
The CPU 40 executes #V'-11 to #V'-29 shown in FIG. 27 to erase the range stored in E.
and erase signal generator 85. The head was set as 3-1.3-2.

Furthermore, although this embodiment is configured to perform erasing using a recording/reproducing head, it is of course possible to use an erasing-only head. Further, although the head is made movable relative to the medium, the present invention does not require that the head be movable; for example, a multi-head may be provided corresponding to each track on the medium.

〔Effect of the invention〕

As explained above, according to the present invention, the block to start erasing and the block to end erasing are respectively specified, and the range is automatically erased, so that the range of the erase range setting can be changed. This has the effect of allowing free selection and improving usability.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention, FIG. 2 is a diagram showing combinations of switching states of SW2 to SW5 shown in FIG. 1, and FIG. 3 is a front view of the device of this embodiment. Figure, 4th
The figure is a front view of a remote control device used with the device, and FIGS. 5 to 15. Figures 16-1 to 16-3 and Figures 17 to 20. 23, 25 to 27, and 29 to 31 are flowcharts of the CPU 40 shown in FIG. 1, and FIGS. 21, 22, and 24 are the ID displayed on the monitor 28 is a diagram for explaining the flow of FIG. 27, and FIG. 32 is a diagram for explaining the signal generated from the erase signal generator 85 shown in FIG. 1. It is.

Claims (2)

[Claims] (1) An erasing device that erases information recorded on a medium having a plurality of storage blocks, a means for specifying a block to start erasing and a block to end erasing, and a block specified by the specifying means. An erasing device comprising: means for erasing blocks within a range. (2) The erasing device according to claim 1, wherein the erasing means is a means for stopping erasing when each block is not properly designated by the specifying means.