JPS6317263Y2 - - Google Patents
Info
- Publication number
- JPS6317263Y2 JPS6317263Y2 JP1982021307U JP2130782U JPS6317263Y2 JP S6317263 Y2 JPS6317263 Y2 JP S6317263Y2 JP 1982021307 U JP1982021307 U JP 1982021307U JP 2130782 U JP2130782 U JP 2130782U JP S6317263 Y2 JPS6317263 Y2 JP S6317263Y2
- Authority
- JP
- Japan
- Prior art keywords
- printed circuit
- circuit board
- insulating plate
- ceramic
- laminated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Insulated Metal Substrates For Printed Circuits (AREA)
Description
【考案の詳細な説明】
本考案は高密度実装可能なプリント基板に関す
る。[Detailed Description of the Invention] The present invention relates to a printed circuit board that can be mounted at high density.
近年、電子部品の実装密度向上の要求が強く
種々の方式が使用されている。特に半導体チツプ
やチツプキヤリア型ICをセラミツク基板上に直
接搭載する方法は高密度実装を可能とする方式と
して多用されている。しかしながらこの方式は製
造上、導体材料としてMoやＷを用いなければな
らず、導体抵抗が高くなるとか、工程中焼結過程
で大きな収縮を生じる為基板の精度に問題がある
とか、表面平滑度の優れた大型基板の製造が困難
である等の問題がある。 In recent years, there has been a strong demand for increased packaging density of electronic components, and various methods have been used. In particular, the method of directly mounting semiconductor chips and chip carrier type ICs on ceramic substrates is often used as a method that enables high-density packaging. However, in manufacturing, this method requires the use of Mo or W as the conductor material, which increases the conductor resistance, causes problems in the accuracy of the substrate due to large shrinkage during the sintering process, and problems with surface smoothness. There are problems such as difficulty in manufacturing large substrates with excellent quality.
一方基板としてエポキシ等の有機材料を使用す
る所謂プリント基板が採用され得るが、致命的な
問題として熱膨張係数が大略15×10-6／℃と大き
い為大型ICやチツプキヤリアを塔載することが
できない問題がある。 On the other hand, so-called printed circuit boards that use organic materials such as epoxy can be used as substrates, but the critical problem is that they have a large thermal expansion coefficient of approximately 15 x 10 -6 /℃, making it difficult to mount large ICs and chip carriers. There is a problem that cannot be done.
本考案はこれらの問題を解決でき、低膨脹で、
導体抵抗が小さく、かつ大型基板を安価に供給可
能とするものである。 The present invention can solve these problems, has low expansion,
The conductor resistance is low, and a large substrate can be supplied at low cost.
本考案のプリント基板は従来のプリント基板と
表面に絶縁性セラミツク被覆層を有する低熱膨脹
の金属板（これを絶縁板と称す）との複合プリン
ト基板であり、該被覆層上に印刷回路が形成され
てあり、内部のプリント基板の回路とが上記絶縁
板に適宜設けたスルーホールを通じて連結されて
いることを特徴とするものである。 The printed circuit board of the present invention is a composite printed circuit board consisting of a conventional printed circuit board and a low thermal expansion metal plate (referred to as an insulating plate) having an insulating ceramic coating layer on the surface, and a printed circuit is formed on the coating layer. The device is characterized in that it is connected to a circuit on an internal printed circuit board through a through hole appropriately provided in the insulating plate.
熱膨脹の問題は、プリント基板の表面に熱膨張
係数が３〜８×10-6／℃の低膨張係数のFe−Ni
系合金を積層することによつて改善される。この
合金は塔載する半導体素子やパツケージ用セラミ
ツクの膨脹に合わせて選定すればよく、通常のセ
ラミツクチツプキヤリア（熱膨張係数４〜７×
10-6／℃）を塔載する場合にはFe−42〜48％Ni
合金やFe−Ni−Co合金を用い、特に放熱性を要
求される場合はMo，Ｗ板を用いるとよい。 The problem of thermal expansion is that Fe-Ni, which has a low coefficient of thermal expansion of 3 to 8 x 10 -6 /℃, is used on the surface of the printed circuit board.
This can be improved by stacking alloys. This alloy can be selected according to the expansion of the semiconductor device mounted on the chip carrier or the ceramic chip carrier for the package.
10 -6 /℃), Fe-42~48%Ni
An alloy or a Fe-Ni-Co alloy is used, and if heat dissipation is particularly required, a Mo or W plate is preferably used.
上記低膨脹金属又は合金の表面には予め薄いセ
ラミツク被覆層を形成してあり絶縁処理してあ
る。セラミツクとしてはAl2O3，Si3N4，AlN，
Y2O3等が使用される。 A thin ceramic coating layer is previously formed on the surface of the low expansion metal or alloy for insulation treatment. Ceramics include Al 2 O 3 , Si 3 N 4 , AlN,
Y 2 O 3 etc. are used.
この複合プリント基板のセラミツク被覆層の上
に厚膜又は薄膜法によつて所定の回路を形成した
ものである。貼合せるプリント基板は望ましくは
フレキシブル基板が良い。 A predetermined circuit is formed on the ceramic coating layer of this composite printed circuit board by a thick film or thin film method. The printed circuit board to be bonded is preferably a flexible circuit board.
そしてプリント基板上の回路とセラミツク被覆
層上に形成された回路とがセラミツク被覆金属板
内に設けられたスルーホールを通して接続させる
ことによつて複合積層板が見掛け上一体のプリン
ト基板としての機能を発揮させることができる。
この場合、ベースのプリント基板の回路は通常、
Cu又はAuで形成されているので回路抵抗は充分
小さくなる。又金属板をその上に積層してあるの
で表面平滑度が高く、大型基板を容易に安価に作
製することも可能である。 By connecting the circuit on the printed circuit board and the circuit formed on the ceramic coating layer through the through holes provided in the ceramic coating metal plate, the composite laminate appears to function as an integrated printed circuit board. It can be demonstrated.
In this case, the circuit on the base printed circuit board is usually
Since it is made of Cu or Au, the circuit resistance is sufficiently small. Further, since the metal plate is laminated thereon, the surface smoothness is high, and it is also possible to easily produce a large substrate at a low cost.
又、従来のプリント基板の上面のみでなく裏面
にもセラミツク被覆の金属板を貼付けることによ
つて、バイメタル効果によるそりを防止すると共
に両面への部品塔載を可能として実装密度を更に
向上することが出来るのも特徴である。 In addition, by attaching a ceramic-coated metal plate not only to the top surface of the conventional printed circuit board but also to the back surface, it is possible to prevent warpage due to the bimetal effect and further improve packaging density by making it possible to mount components on both sides. Another feature is that it can be done.
第１図は、この実施例を示す断面図であり、積
層プリント基板１の表面及び裏面に、セラミツク
絶縁被覆層５，５′を有するFe−Ni合金板３，
３′が絶縁板として貼付けられ、ベースの基板１
の回路と絶縁板上の回路とはスルホール７を通し
てNi電極回路４によつて電気的に連結されてい
る。そして最表面にセラミツクチツプキヤリア２
が半田付け６によつて接続塔載されている。 FIG. 1 is a sectional view showing this embodiment, in which an Fe-Ni alloy plate 3, which has ceramic insulation coating layers 5, 5' on the front and back surfaces of a laminated printed circuit board 1,
3' is pasted as an insulating plate, and the base board 1
The circuit and the circuit on the insulating plate are electrically connected through the through hole 7 by the Ni electrode circuit 4. And on the top surface is a ceramic chip carrier 2.
are connected by soldering 6.
次に実施例を挙げる。 Next, examples will be given.
板厚0.25mmの42％Ni−Feを所定の回路基板の
形状に打抜き加工とスルーホール用穴明け加工を
プレスによつて施した後、PVD法によつてAl2O3
を厚さ1μmの全面絶縁コーテングを行つた。これ
によつてスルーホール部内面まで充分絶縁被覆が
行われた。このAl2O3被覆Fe−Ni板上にNiによ
り回路形成とスルホールメツキを行つた。これを
従来の積層プリント基板に貼り付けた。このよう
に作製した複合プリント基板上にセラミツクチツ
プキヤリアを第１図に示す如く直接半田付法によ
つて塔載した結果、熱膨脹係数によるハクリも認
められず、この種用途に用いられる基板として極
めて有効であることが確認された。
After punching 42% Ni-Fe with a thickness of 0.25 mm into the shape of the specified circuit board and drilling for through holes using a press, Al 2 O 3 was formed using the PVD method.
A 1 μm thick insulating coating was applied to the entire surface. As a result, the inner surface of the through-hole portion was sufficiently insulated. On this Al 2 O 3 coated Fe-Ni plate, circuit formation and through hole plating were performed using Ni. This was attached to a conventional laminated printed circuit board. As a result of mounting the ceramic chip carrier on the composite printed circuit board prepared in this way by direct soldering as shown in Figure 1, no peeling due to the coefficient of thermal expansion was observed, making it extremely suitable for a board used for this type of application. It has been confirmed that it is valid.
第１図は本考案の実施例の複合プリント基板の
使用状態を示す１例の断面図である。
１……積層プリント基板、２……セラミツクチ
ツプキヤリア、３，３′……低膨脹金属、４……
電極回路、５，５′……セラミツク絶縁層、６…
…半田、７……スルーホール。
FIG. 1 is a sectional view of an example of a composite printed circuit board according to an embodiment of the present invention showing how it is used. 1... Laminated printed circuit board, 2... Ceramic chip carrier, 3, 3'... Low expansion metal, 4...
Electrode circuit, 5, 5'... Ceramic insulating layer, 6...
...Solder, 7...Through hole.
Claims (1)
基板表面と裏面の両面に、30乃至48％のNiを含
む鉄−ニツケル合金、29％ Ni−18％ Co−53
％ Fe合金、Mo、及びＷから選ばれた１種の金
属板上にセラミツク被覆層を設けた絶縁板を貼付
け、この絶縁板上に印刷回路が形成されてあり、
この印刷回路と上記積層プリント基板の回路とが
該絶縁板に開孔したスルーホールを通じて連結さ
れていることを特徴とするプリント基板。 An iron-nickel alloy containing 30 to 48% Ni, 29% Ni-18% Co-53 is used on both the front and back sides of a laminated printed circuit board made of organic synthetic resin.
% An insulating plate provided with a ceramic coating layer is pasted on one metal plate selected from Fe alloy, Mo, and W, and a printed circuit is formed on this insulating plate,
A printed circuit board characterized in that the printed circuit and the circuit of the laminated printed circuit board are connected through a through hole formed in the insulating plate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2130782U JPS58124985U (en) | 1982-02-16 | 1982-02-16 | Printed board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2130782U JPS58124985U (en) | 1982-02-16 | 1982-02-16 | Printed board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58124985U JPS58124985U (en) | 1983-08-25 |
| JPS6317263Y2 true JPS6317263Y2 (en) | 1988-05-16 |
Family
ID=30033434
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2130782U Granted JPS58124985U (en) | 1982-02-16 | 1982-02-16 | Printed board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58124985U (en) |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50147575A (en) * | 1974-05-17 | 1975-11-26 | ||
| JPS5917880B2 (en) * | 1976-09-07 | 1984-04-24 | 株式会社東芝 | Board for electrical equipment |
| JPS56155585A (en) * | 1980-04-30 | 1981-12-01 | Shin Kobe Electric Machinery | Printed circuit board |
-
1982
- 1982-02-16 JP JP2130782U patent/JPS58124985U/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS58124985U (en) | 1983-08-25 |
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