JPS631832B2 - - Google Patents

Info

Publication number
JPS631832B2
JPS631832B2 JP55141254A JP14125480A JPS631832B2 JP S631832 B2 JPS631832 B2 JP S631832B2 JP 55141254 A JP55141254 A JP 55141254A JP 14125480 A JP14125480 A JP 14125480A JP S631832 B2 JPS631832 B2 JP S631832B2
Authority
JP
Japan
Prior art keywords
phase
current
power
admittance
main circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55141254A
Other languages
Japanese (ja)
Other versions
JPS5765274A (en
Inventor
Seiji Nakazawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Meidensha Electric Manufacturing Co Ltd
Original Assignee
Meidensha Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Meidensha Electric Manufacturing Co Ltd filed Critical Meidensha Electric Manufacturing Co Ltd
Priority to JP14125480A priority Critical patent/JPS5765274A/en
Publication of JPS5765274A publication Critical patent/JPS5765274A/en
Publication of JPS631832B2 publication Critical patent/JPS631832B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
    • H02M7/02Conversion of AC power input into DC power output without possibility of reversal
    • H02M7/04Conversion of AC power input into DC power output without possibility of reversal by static converters
    • H02M7/12Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/145Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means
    • H02M7/155Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only
    • H02M7/162Conversion of AC power input into DC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only in a bridge configuration

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Rectifiers (AREA)
  • Control Of Electrical Variables (AREA)
  • Power Conversion In General (AREA)

Description

【発明の詳細な説明】 本発明は、サイリスタ等の制御整流素子を用い
た電力変換装置の制御方式に関し、特に電力系統
に接続して3相電力の平衡や高調波抑制に好適な
制御方式に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a control method for a power conversion device using a controlled rectifying element such as a thyristor, and particularly to a control method suitable for connecting to an electric power system and balancing three-phase power and suppressing harmonics. .

従来の電力変換方式は、第1図に主回路構成を
示すように、電力系統のA,B,Cの3相にサイ
リスタa,b,c,a′,b′,c′のブリツジ回路を
接続し、ブリツジ回路の直流側に定電流Id源とし
てのリアクトルLを設け、サイリスタa,b,
c,a′,b′,c′を点弧及び消弧を120度づつ位相を
ずらせ導通期間はPWM制御して電力系統との間
で対称3相交流の電力授受を行ない、PWM制御
によるその搬送波成分は系統の相間に設ける高調
波リツプル除去フイルタFで除去する。
The conventional power conversion system uses a bridge circuit of thyristors a, b, c, a', b', and c' for the three phases A, B, and C of the power system, as shown in the main circuit configuration in Figure 1. A reactor L as a constant current Id source is provided on the DC side of the bridge circuit, and thyristors a, b,
The ignition and extinguishing of c, a', b', and c' are shifted by 120 degrees in phase, and the conduction period is controlled by PWM to transfer symmetrical three-phase AC power to and from the power grid. The carrier wave component is removed by a harmonic ripple removal filter F provided between the phases of the system.

この従来方式は、対称3相交流を発生させてお
り、各相毎に独立した任意の電流を流すものでな
く、各相間の電力融通ができず3相平衡装置とし
て使用できない。また、電力変換装置自体は等価
的には電流源であり、等価インピーダンスとして
取扱えるものでないため、系統に接続するにはそ
の電源に同期させた制御を必要とし、電源が不安
定なものには適用できない。
This conventional method generates a symmetrical three-phase alternating current, does not flow any independent current for each phase, and cannot be used as a three-phase balancing device because power cannot be exchanged between the phases. In addition, since the power converter itself is equivalently a current source and cannot be treated as an equivalent impedance, it requires control synchronized with the power supply in order to connect it to the grid, and if the power supply is unstable, Not applicable.

本発明は、各相毎に独立した電力授受の制御を
可能にし、従来の問題点を解消すると共に後に示
す効果を有する制御方式を提供することを目的と
する。
SUMMARY OF THE INVENTION An object of the present invention is to provide a control method that makes it possible to independently control power transfer for each phase, solves the conventional problems, and has the effects described later.

本発明方式は、第1図の主回路を具え、交流側
電圧vab,vbc,vcaに応じて制御整流素子a,b,
c,a′,b′,c′を適当にスイツチング制御するこ
とにより第2図に示すように等価的に各相間に任
意に指定したアドミツタンスYab,Ybc,Ycaを有
し、さらに第3図に示すように各アドミツタンス
には直列に電圧源vabp,vbcp,vcapおよび並列に電
流源iabp,ibcp,icapを含むことを可能とし、指定
された等価電流源、電圧源、アドミツタンス(イ
ンピーダンス)により各相毎に流すべき電流ia
ib,icを算出し、その電流が流れるように各制御
整流素子をPWM制御することを特徴とする。
The system of the present invention includes the main circuit shown in FIG. 1, and controls rectifying elements a, b , and
By appropriately switching and controlling c, a', b', c', as shown in Fig. 2, arbitrarily designated admittances Y ab , Y bc , Y ca can be obtained between each phase. As shown in Figure 3, each admittance can include voltage sources v abp , v bcp , v cap in series and current sources i abp , i bcp , i cap in parallel, and the specified equivalent current source and voltage The current that should flow in each phase depending on the source and admittance (impedance), i a ,
It is characterized by calculating i b and i c and performing PWM control on each control rectifying element so that the current flows.

以下、本発明方式を詳細に説明する。 The method of the present invention will be explained in detail below.

本発明方式における条件としては、直流側の電
流Idは一定にし、制御整流素子のスイツチングに
はブリツジの上側の3素子a,b,c及び下側の
3素子a′,b′,c′のうち上側、下側夫々1つの素
子が必ず導通し、スイツチング周波数は一定とす
る。
The conditions for the method of the present invention are that the current I d on the DC side is constant, and the switching of the control rectifier is performed using three elements a, b, c on the upper side of the bridge and three elements a', b', c' on the lower side. One element on the upper side and one element on the lower side are always conductive, and the switching frequency is constant.

こうした条件において、交流側電流ia,ib,ic
は、 として重み関数fa(t),fb(t),fc(t)で表わす
ことができ、この重み関数は素子のPWM制御に
おけるスイツチング周期内の通流時間によつて決
まる。スイツチング周期内の素子の通流している
時間の割合を夫々λa(t),λb(t),λc(t)及

λa′(t),λb′(t),λc′(t)とすると、前

条件から下記式を満足する。
Under these conditions, the AC side currents i a , i b , i c
teeth, The weighting functions can be expressed as weighting functions f a (t), f b (t), and f c (t), and these weighting functions are determined by the conduction time within the switching period in PWM control of the element. The proportion of time during which the elements are conducting within the switching period is expressed as λ a (t), λ b (t), λ c (t), and λ a ′ (t), λ b ′ (t), λ c ′, respectively. (t), the following formula is satisfied from the above conditions.

0<λa(t),λb(t),……,λc′(t)<1
…(2.2) 次に、1スイツチング周期内の交流側電流の平
均値は、下記式になる。
0<λ a (t), λ b (t), ..., λ c '(t) < 1
…(2.2) Next, the average value of the AC side current within one switching period is expressed by the following formula.

したがつて、重み関数fa(t),fb(t),fc(t)は fa(t)+fb(t)+fc(t)=0 …(2.6) となる。これは3相の電流の和が0になるのと等
価である。
Therefore, the weighting functions f a (t), f b (t), f c (t) are f a (t) + f b (t) + f c (t) = 0 (2.6). This is equivalent to the sum of the three phase currents becoming zero.

次に、各素子のスイツチング間隔の算出を説明
すると、ia(t),ib(t),ic(t)即ちfa(t),
fb
(t),fc(t)が与えられるも前記(2.3)式及び
(2.5)式には未知数が6つあることから、このま
まではスイツチング間隔λa(t),λb(t),……,
λc′(t)は一意的には求められない。そこで、
各相ごとの素子の通流期間の和を等しくする。
Next, to explain the calculation of the switching interval of each element, i a (t), i b (t), i c (t), that is, f a (t),
f b
(t), f c (t) are given, but since there are six unknowns in equations (2.3) and (2.5), the switching intervals λ a (t), λ b (t),... ...,
λ c '(t) cannot be uniquely determined. Therefore,
The sum of the conduction periods of the elements for each phase is made equal.

この条件を入れるも前記(2.3)式が矛盾する
ことはない。但し、通流期間λa(t),λb(t),
…,λc′(t)の範囲は下記式のように(2.2)式
よりも狭くなる。
Even if this condition is included, the above equation (2.3) does not contradict. However, the flow period λ a (t), λ b (t),
..., the range of λ c '(t) is narrower than in equation (2.2) as shown in the following equation.

0<λa(t),λb(t),…,λc′(t)<2/3
…(2.8) 従つて、前記(2.5)式及び(2.7)式から通流
期間λa(t),λb(t),…,λc′(t)は下記式

ように求められる。
0<λ a (t), λ b (t), ..., λc' (t) < 2/3
...(2.8) Therefore, from the above equations (2.5) and (2.7), the flow periods λ a (t), λ b ( t ), .

ここで、各通流期間λa(t),…,λc′(t)に
は前記(2.8)式の制限があることから、各重み
関数fa(t),fb(t),fc(t)には下記の制限があ
る。
Here, since each flow period λ a (t),..., λ c '(t) is limited by the above equation (2.8), each weighting function f a (t), f b (t), f c (t) has the following limitations.

−2/3<fa(t),fb(t),fc(t)<2/3…(2.10) 上記(2.10)式による制限のもとで、各素子の
通流期間入a(t),λb(t),…,λc′(t)を
(2.9)式により決定することで各相に流れる電流
ia(t),ib(t),ic(t)と独立的に制御でき、換
言すれば各相に流す電流ia(t),ib(t),ic(t)
に対して(2.9)式から各素子の通流期間λa(t),
…,λc′(t)を求めることができる。なお、上
記演算に基づく相電流決定は特定の相だけに電流
を流すように決定するもその特定相が過負荷にな
ることはない。
−2/3<f a (t), f b (t), f c (t)<2/3…(2.10) Under the restrictions of equation (2.10) above, the conduction period of each element a (t), λ b (t), ..., λ c ′ (t) by determining the current flowing in each phase using equation (2.9).
i a (t), i b (t), i c (t) can be controlled independently, in other words, the current flowing in each phase i a (t), i b (t), i c (t)
From equation (2.9), the conduction period of each element λ a (t),
..., λ c '(t) can be obtained. Note that although the phase current is determined based on the above calculation so that the current flows only in a specific phase, the specific phase will not be overloaded.

上記におけるスイツチング方式において、電力
変換装置に指定された等価アドミツタンスを求め
るには、第2図におけるΔ結線の各線間アドミツ
タンスをラプラス変換領域でYab(S),Ybc(S),
Yca(S)とすると、各アドミツタンスの電流は
相間電圧Vab(S),Vbc(S),Vca(S)として、 となり、線路電流Ia(S),Ib(S),Ic(S)は となり、相間電圧Vab(S),Vbc(S),Vca(S)
が与えられることで線路に(3.2)式で表わされ
る電流Ia(S),Ib(S),Ic(S)を流すことで等価
的に第2図で示す任意のアドミツタンスにするこ
とができる。
In the above switching method, to obtain the equivalent admittance specified for the power converter, the line-to-line admittance of the Δ connection in Fig. 2 is converted into the Laplace transform domain by Y ab (S), Y bc (S),
Assuming Y ca (S), the current of each admittance is given by the phase-to-phase voltages V ab (S), V bc (S), V ca (S), The line currents I a (S), I b (S), I c (S) are The phase-to-phase voltages V ab (S), V bc (S), V ca (S)
Given that, by flowing currents I a (S), I b (S), and I c (S) expressed by equation (3.2) through the line, the arbitrary admittance shown in Fig. 2 can be obtained equivalently. Can be done.

次に、電力変換装置を第3図に示すように指定
された等価電流源、電圧源、インピーダンスにな
るように制御するには、a,b相間の電流Iabは、 Iab(S)=Yab(S)〔Vab(S) +Vabp(S)〕+Iabp(S) …(3.3) となるし、他の線間についても同様になる。
Next, in order to control the power converter so that it has the specified equivalent current source, voltage source, and impedance as shown in Figure 3, the current I ab between phases a and b is I ab (S) = Y ab (S) [V ab (S) + V abp (S)] + I ab (S) ... (3.3) The same holds true for other lines.

Ibc(S)=Ybc(S)〔Vbc(S) +Vbcp(S)〕+Ibcp(S) …(3.4) Ica(S)=Yca(S)〔Vcap(S) +Vcap(S)〕+Icap(S) …(3.5) 従つて、線路電流は(3.3)〜(3.5)式より求
められ、線路電流を計算で求められる値にするこ
とで等価的に電圧源及び電流源を含む回路にな
る。
I bc (S) = Y bc (S) [V bc (S) +V bcp (S)] + I bcp (S) ... (3.4) I ca (S) = Y ca (S) [V cap (S) +V cap (S)] + I cap (S) ... (3.5) Therefore, the line current can be found from equations (3.3) to (3.5), and by setting the line current to the calculated value, it can be equivalently calculated as the voltage source and This becomes a circuit that includes a current source.

なお、第2図におけるΔ結線アドミツタンスに
対して、Y結線アドミツタンスとするには、Y結
線で中性点が接地されていない系統であれば、零
相電流が流れないことからY結線をΔ結線に変換
することでΔ結線でのアドミツタンスを求める前
記の(3.1),(3.3)式から演算できる。
Note that in contrast to the Δ-connection admittance in Figure 2, to set it as the Y-connection admittance, if the system is Y-connected and the neutral point is not grounded, zero-sequence current will not flow. By converting to , the admittance in the Δ connection can be calculated from equations (3.1) and (3.3) above.

第4図は等価的に電圧源と電流源及びアドミツ
タンスを含む変換装置を実現するための各相電流
演算回路を示し、相間電圧vab,vbc,vcaに対し
て、前記(3,3),(3.4),(3.5)に基づいて指
定される電圧源電圧vabp,vbcp,vcapと電流源電流
iabp,ibcp,icap及び(3.1)式に基づくアドミツタ
ンス値Yab,Ybc,Ycaを作用させて(3.3)〜
(3.5)式の演算をし、各相電流ia,ib,icを求め
る。
FIG. 4 shows a phase current calculation circuit for realizing a conversion device equivalently including a voltage source , a current source , and an admittance. ), (3.4), (3.5), the voltage source voltages v abp , v bcp , v cap and current source currents specified based on
By applying i abp , i bcp , i cap and admittance values Y ab , Y bc , Y ca based on equation (3.1), (3.3)
Calculate equation (3.5) to find each phase current i a , i b , and i c .

この各相電流ia,ib,icが流れるよう各制御整
流素子a,b,c,a′,b′,c′をPWM制御する
には、第5図に示すようにPWM制御の基準とな
る三角波と電流信号ia,ia+ib(=−ic)より各素
子の通流幅λa,λb,λcが求められる。なお、λa′,
λb′,λc′についても同様の比較により求められ
る。その具体的構成は第6図に示され、電流信号
(ia/2.Id)+1/3と、(ia+ib/2.Id)+2/3を発振器
1と鋸歯状波発生器2による鋸歯状波を夫々比較
器3,4で比較し、そのオン.オフ出力をR.Sフ
リツプフロツプ5,6,7のセツト.リセツト入
力としフリツプフロツプ5,7では発振器1の出
力でセツト.リセツト入力とすることで、該フリ
ツプフロツプ5〜7のQ出力に制御整流素子a,
b,cの点弧信号(λa,λb,λc)を得ることがで
きる。
In order to perform PWM control on each control rectifier element a , b, c , a', b', c' so that each phase current i a , i b , i c flows, PWM control is performed as shown in Figure 5. The conduction widths λ a , λ b , λ c of each element are determined from the reference triangular wave and the current signals i a , i a +i b (= -ic ). Note that λ a ′,
λ b ′ and λ c ′ can also be obtained by similar comparison. Its specific configuration is shown in Figure 6, in which current signals (i a /2.I d ) +1/3 and (i a +i b /2.I d ) +2/3 are sent to oscillator 1 and sawtooth wave generator. The sawtooth waves generated by the device 2 are compared by the comparators 3 and 4, respectively, and the on. The off output is set to RS flip-flops 5, 6, and 7. The output of oscillator 1 is used as a reset input for flip-flops 5 and 7. By using the reset input, the Q outputs of the flip-flops 5 to 7 are connected to the control rectifiers a,
Firing signals (λ a , λ b , λ c ) of b and c can be obtained.

第7図はPWM制御における各部素子a,b,
c,a′,b′,c′の点弧状態及び各相電流ia,ib,ic
を例示する。
Figure 7 shows each element a, b,
Firing status of c, a′, b′, c′ and each phase current i a , i b , i c
exemplify.

以上のとおり、本発明方式によれば、電力変換
装置を等価的に単なる電流源とするのでなく、イ
ンピーダンス要素として使えるため、他の電源に
接続するのにもその電源に同期させる必要がない
し、電源が不安定な場合にも適用できる。また、
各線間毎に任意インピーダンス、任意電流源にで
きるから、各相独立した制御が可能で単相回路を
3組用いて夫々を独立した制御する場合に比して
主回路構成が簡単.安価になる。また、各相電流
の和は零であるから、単相3組使用のものに比し
て直流回路のリアクトルを小容量.小型にでき
る。また、3相ブリツジ回路で各相間の電力の融
通が可能で、3相平衡装置等に適用できる。
As described above, according to the method of the present invention, the power conversion device is not equivalently used as a simple current source, but can be used as an impedance element, so there is no need to synchronize it with another power source when connecting it to that power source. It can also be applied when the power supply is unstable. Also,
Since any impedance and current source can be set for each line, each phase can be controlled independently, and the main circuit configuration is simpler than when three sets of single-phase circuits are used and each is controlled independently. Becomes cheaper. Also, since the sum of the currents in each phase is zero, the reactor of the DC circuit has a smaller capacity than the one using three single-phase sets. Can be made small. Furthermore, the three-phase bridge circuit allows power to be exchanged between each phase, and can be applied to a three-phase balance device, etc.

なお、本発明方式は直流側電流一定として取扱
つたが、直流電流が変動する場合には該電流によ
つてPWM制御での各素子通流幅を補正すること
で同等の作用効果を得ることができる。
Note that the method of the present invention is treated as a constant DC current, but when the DC current fluctuates, the same effect can be obtained by correcting the current width of each element in PWM control based on the current. can.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は電力変換装置の主回路構成図、第2図
は本発明における制御方式での等価アドミツタン
スとして制御する場合の等価回路図、第3図は本
発明における等価アドミツタンス、電流源、電圧
源とする制御方式の等価回路図、第4図は本発明
における各相電流検出方法を示すブロツク図、第
5図は本発明における制御整流素子の通流期間決
定を説明するための波形図、第6図は通流期間決
定のためのブロツク図、第7図は本発明における
主回路各素子及び相電流を例示するタイムチヤー
トである。 a,b,c,a′,b′,c′……制御整流素子、L
……リアクトル、1……発振器、2……鋸歯状波
発生器、3,4……比較器、5〜7……フリツプ
フロツプ。
Figure 1 is a main circuit configuration diagram of the power conversion device, Figure 2 is an equivalent circuit diagram when controlling as an equivalent admittance in the control method of the present invention, and Figure 3 is the equivalent admittance, current source, and voltage source in the present invention. 4 is a block diagram showing the method for detecting each phase current in the present invention. FIG. 5 is a waveform diagram for explaining the determination of the conduction period of the controlled rectifier in the present invention. FIG. 6 is a block diagram for determining the conduction period, and FIG. 7 is a time chart illustrating each element of the main circuit and phase currents in the present invention. a, b, c, a', b', c'... control rectifier, L
... Reactor, 1 ... Oscillator, 2 ... Sawtooth wave generator, 3, 4 ... Comparator, 5 to 7 ... Flip-flop.

Claims (1)

【特許請求の範囲】[Claims] 1 3相電力系統に交流側が接続され直流側に定
電流源を持つ制御整流素子のブリツジ接続を主回
路構成とし、この主回路と電力系統間の電力授受
に該系統から見て主回路側が等価的に任意に指定
されたアドミツタンスと直列に電圧源及び並列に
電流源になるよう系統との間の各相電流を演算
し、この各相電流の演算結果により上記各制御整
流素子をPWM制御することを特徴とする電力変
換装置の制御方式。
1 The main circuit configuration is a bridge connection of a controlled rectifier element whose AC side is connected to a three-phase power system and has a constant current source on the DC side, and the main circuit side is equivalent to the power transfer between this main circuit and the power system as seen from the system. Each phase current between the system and the system is calculated so that it becomes a voltage source in series and a current source in parallel with an arbitrarily specified admittance, and each of the control rectifiers described above is controlled by PWM based on the calculation result of each phase current. A control method for a power conversion device characterized by the following.
JP14125480A 1980-10-09 1980-10-09 Control system for power converting apparatus Granted JPS5765274A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14125480A JPS5765274A (en) 1980-10-09 1980-10-09 Control system for power converting apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14125480A JPS5765274A (en) 1980-10-09 1980-10-09 Control system for power converting apparatus

Publications (2)

Publication Number Publication Date
JPS5765274A JPS5765274A (en) 1982-04-20
JPS631832B2 true JPS631832B2 (en) 1988-01-14

Family

ID=15287637

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14125480A Granted JPS5765274A (en) 1980-10-09 1980-10-09 Control system for power converting apparatus

Country Status (1)

Country Link
JP (1) JPS5765274A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0625242U (en) * 1992-08-26 1994-04-05 ダイワ精工株式会社 Paper separation device

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0822145B2 (en) * 1984-06-12 1996-03-04 株式会社日立製作所 Power converter
JPS6253192A (en) * 1985-09-02 1987-03-07 Hitachi Ltd Controller for elevator

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5287641A (en) * 1976-01-14 1977-07-21 Dengensha Mfg Co Ltd Flicker preventing unit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0625242U (en) * 1992-08-26 1994-04-05 ダイワ精工株式会社 Paper separation device

Also Published As

Publication number Publication date
JPS5765274A (en) 1982-04-20

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