JPS631993A - Error minimization method for computer wall clocks - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for minimizing the error of a wall clock of a computer, and is particularly applicable to computers and wall clocks in which the error of the wall clock is influenced by the error inherent in the oscillator inside the wall clock. A wall clock with a similar device,
This is suitable for designing a suitable wall clock with few errors.

[Conventional technology]

The conventional computer wall clock was published in Japanese Patent Application Laid-Open No. 56-6362.
As described in Publication No. 5, the number of pulses stopped during external read/write is output to a timer counter and corrected. However, no consideration was given to errors caused by the unique frequency of the oscillator that generates the pulses.

[Problem that the invention seeks to solve]

L In the above conventional technology, since the error of the computer wall clock depends on the error of the oscillation frequency specific to the oscillator, the computer wall clock with less error is set by 1U for the accuracy of the oscillation frequency of the oscillator. However, there was no consideration given to the fact that there is a limit to the accuracy of the oscillation frequency of an oscillator, and there was a problem in that the error of the computer wall clock could not be minimized.

The purpose of the present invention is not only to improve the precision of the oscillation frequency of an oscillator, but also to minimize errors in a computer wall clock.

[Means for solving problems]

The above object is achieved by adding a circuit that can externally read the oscillation frequency of the oscillator in the wall clock of the computer with a frequency meter, and by adding a circuit that can set the value read by the frequency meter as a correction value.

[Effect]

A counter section in a wall clock of a computer is counted up based on the oscillation frequency of an oscillator, and when displaying the contents of the counter section externally, it is converted and displayed based on the reference frequency of the oscillator. By setting the frequency when converting here to a value obtained by adding a correction value to the reference frequency, the same effect as improving the accuracy of the oscillation frequency of the oscillator is achieved, so the error of the wall clock is minimized.

〔Example〕

Practical examples of the present invention will be described below with reference to block diagrams. Depending on the oscillator 1, the counter section 2 or the counter section 1
- The control section 3 converts the time based on the reference frequency of the oscillator 1 and the value of the correction value 5, and displays it on the display section 4. The correction value 5 is determined by a highly accurate frequency meter 6.
It can be measured and set externally.

[Effects of the Invention] According to the present invention, the accuracy of the computer wall clock depends on the inherent accuracy of the oscillator in the clock, and also on the accuracy of the frequency H1 for measuring the correction value. Errors are minimized.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of one embodiment of the present invention. 1. Oscillator, 2. Counter section, 3. Control section. 4. Display section, 5. Correction value, 6. Frequency, '7I.

Claims (1)

[Claims] 1. A computer wall clock comprising an oscillator, a counter section, and a control section, which is equipped with a function for externally setting a correction value for correcting an error in the wall clock due to an error in the oscillation frequency inherent to the oscillator. Error minimization method for wall clock.