JPS63201715A - Register circuit - Google Patents

Abstract

PURPOSE:To easily control an integration and an exclusion to and from a shift path by constituting the shift path by using a register circuit provided with a gate for controlling a supply of a clock signal by a shift selecting input and a selector for selecting and outputting it in accordance with the shift selecting input. CONSTITUTION:In the case of executing a shift operation, in case a shift selecting input 10 is a logical value '1', a clock which has passed through a gate 3 is supplied to a flip-flop, and to a shift output 20, a signal of a signal line 30 is selected by a selector 2, therefore, the same function as a shift operation of a conventional register circuit is realized. Also, in case the shift selecting input 10 is a logical value '0' and an parallel exclusion input 15 is a logical value '1', the clock comes not to be supplied to the filp-flop, therefore, a state of the flip-flop remains saved, and as for the shift output 20, a shift input 14 is selected. Accordingly, when a shift path is constituted by using a register circuit, the shift selecting input 10 and the parallel exclusion input 15 are controlled. In such a way, an integration and an exclusion to and from the shift path can be controlled easily.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a register circuit used in general electronic computers and the like.

(Prior art) A method of providing a shift operation function to the register circuit and configuring all registers into one shift path in order to facilitate failure detection in a pigeon house that uses register circuits to create circuits for electronic computers, etc. is often used. Even when it is not incorporated into a device, it is easier to detect failures by using the shift path. However, when built into a device, information that you want to use at all times while the device is in use, such as device configuration information, may pass through the register circuit J path, and in this case, if it is included in the shift path, When a shift operation is performed, configuration information and the like also change, which is not desirable. Therefore, in the past, circuits were created by excluding registers containing information that was always wanted to use from the shift path.

(Problems to be Solved by the Invention) As mentioned above, in conventional register circuits, registers that contain information that is always available are excluded from the shift path, which reduces the ability to detect failures when performing fault inspections. There are drawbacks.

(Means for Solving the Problems) Means provided by the present invention to solve the above-mentioned problems includes a plurality of flip-flops, and each of these flip-flops is connected to each other according to a shift control input. The shift operation circuit is configured to perform a shift operation of sequentially shifting and outputting a shift input in synchronization with a clock signal, and the parallel operation circuit is configured such that each of the flip-flops is configured as a shift operation circuit or a parallel operation circuit. Each register circuit operates independently in synchronization with a clock signal.
a shift selection input terminal that receives a shift selection input that instructs selection of whether to perform the shift operation or output the shift input as is; a gate that controls supply of the clock signal by the shift selection input; It is characterized by comprising a selector that selects and outputs either the shift signal outputted from the final stage of the flip-flop as a result of the shift operation or the shift input according to the shift selection input.

(Example) Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block circuit diagram of one embodiment of a register circuit according to the present invention. The flip-flop group 1 is composed of a plurality of flip-flops, and is controlled by a shift control human power 12 to form a parallel operating circuit having a parallel human power 13 and a parallel output 21 as inputs and outputs, and a parallel operation circuit having a shift human power 14 as an input and a signal wA30 as an output. Shift operation circuit can be selected. selector 2
selects and outputs the signal on the signal line 30 when the shift selection manual 10 has a logical value of "1'", and selects and outputs the shift manual 14 when the logical value is "0". The gate 3 controls whether or not a clock signal is supplied to the flip-flop group 1 depending on whether the shift selection input 10 is a logical value 111I+ or "0'".

When the flip-flop group 1 is in the state of a parallel operation circuit, the shift selection input 10 and the parallel exclusion input 15 both have a logic value of ``0''.
”, the clock power 11 is supplied to the flip-flop group 1 through the gate 4 to perform parallel operation. The flip-flop group 1 in this parallel operation state stops operating,
In order to isolate this register circuit from the circuits before and after it is connected to prevent interference with the outside, set the parallel exclusion circuit 15 to a logic value of "1", close the gate 4, and switch the clock circuit 11 to a flip-flop. Prevent it from being input to group 1.

As mentioned above, when the register circuit of the present invention operates in parallel, there is no difference from the conventional register circuit. When performing a shift operation, the shift selection input 10 has a logic value of "1".

In this case, the clock is supplied to the flip-flop through gate 3, and the signal on signal line 30 is selected by selector 2 for shift output 20, so the same function as the shift operation of a conventional register circuit is achieved. . In addition, the shift selection human power 10 has a logical value of "0" and the parallel exclusion human power 15 has a logical value of "1".
'', no clock current is supplied to the flip-flop, so the state of the flip-flop remains preserved and the shift output 20 is selected as the shift output 20. Therefore, the register circuit of the present invention is used to configure the shift path. Then, by controlling the shift selection manpower 10 and the parallel exclusion manpower 15, it can be easily incorporated into the shift path.
You can control exclusions.

(Effects of the Invention) As described above, by configuring a shift path using the register circuit of the present invention, inclusion and exclusion from the shift path can be easily controlled. In addition, when testing a circuit created using the register circuit according to the present invention for a single fault, by incorporating all registers into the shift path and testing, the fault detection ability is maintained to the maximum and the circuit Registers that do not want to be changed during the shift operation can be easily excluded from the shift path. The present invention has such effects.

[Brief explanation of the drawing]

FIG. 1 is a block circuit diagram of one embodiment of a register circuit according to the present invention. 1...Flip-flop group, 2...Selector, 3...
...Gate, 10...Shift selection input, 11...Clock input, 12...Shift control input, 13...Parallel input, 14...Shift input, 15...Parallel exclusion input, 20 ...Shift output, 21...Parallel output, 30
...Shift output signal line.

Claims (1)

[Claims] A plurality of flip-flops are provided, and the mutual connections of these flip-flops are changed according to a shift control input to form a shift operation circuit or a parallel operation circuit, and the shift operation circuit inputs a shift input in synchronization with a clock signal. The parallel operating circuit is a register circuit in which each of the flip-flops operates independently in synchronization with a clock signal. a shift selection input terminal that receives a shift selection input instructing whether to output the clock signal; a gate that controls the supply of the clock signal by the shift selection input; and a gate that controls the supply of the clock signal as a result of the shift operation; A register circuit comprising: a selector that selects and outputs either an output shift signal or the shift input according to the shift selection input.