JPS63202128A - Counter control circuit - Google Patents

Abstract

PURPOSE:To always obtain a count with high reliability by monitoring the presence or absence of an input of a counter pulse proper to the read and reset of the count of an external counter, applying the read only when no input pulse exists and applying reset while the count is corrected. CONSTITUTION:Since a counter pulse 20 is inputted to an external counter 1, the counter 1 applies the count. After a prescribed time elapses and the time reading the count of the counter 1 comes, an MPU 2 monitors whether or not the input of the counter pulse 20 exists. In the case of the presence of the input pulse, the read operation is in standby and in the case of the absence of the input pulse, reading is applied. The MPU 2 adds the read count to the preceding count. Whether or not the counter pulse 20 is being inputted is monitored before the reset and the resetting is applied without any input, and the correction adding '1' to the count is applied when the input pulse is given.

Description

[Detailed Description of the Invention] [Summary] The present invention provides a counter control circuit that resets the count value of an external counter after reading the count value of the external counter. It monitors pulse input, controls read and reset operations, ensures read and reset operations, and provides accurate count values.

[Industrial application field]

The present invention relates to a counter control circuit, and more particularly to a control circuit for reading and resetting count values of an external counter.

The count value of the external counter must always be read accurately, but since counter pulses are not always input regularly, not only the count value read operation but also the reset operation that is executed immediately after it must be performed without error. There is a need.

[Conventional technology]

Figure 3 shows a conventional counter control circuit that reads and resets an external counter. In Figure 0, 1 is an external counter, and 10 is an MPU (microprocessor unit).
20 is a counter pulse, 30 is a count value, and 32
indicates a reset pulse.

FIG. 4 shows a flowchart of the basic operation of the counter control circuit of FIG. 3, and FIG. 5 shows a timing chart of the reset pulse, counter pulse, and count value of the external counter 1.

Next, the operation of the conventional example will be explained using FIGS. 3 to 5. First, the counter pulse 20 is inputted to the external counter 1 without any restrictions. In response to this, the counter 1 performs a counting operation, for example, the external counter 1
The MPU10 reads out the count value of , adds it to the previous count value, and then resets the external counter 1 without restrictions with a reset pulse.

[Problem that the invention sought to solve]

Conventional external counter control circuits read count values without restrictions and then reset them without restrictions. Therefore, there is a possibility that the counter pulse input signal may be ignored depending on the timing of reading or resetting.

That is, as shown in FIG. 5, even though there was a counter pulse 20, it was not added to the count value due to the reset operation, and in this example, the count value was incorrect because it was one pulse less. This also causes an incorrect count value to be read even when there is an input pulse during reading.

[Means for solving problems]

As shown in FIG. 1, the counter control circuit 2 according to the present invention monitors the input pulse 20 before reading the count value of the external counter 1, reads the count value only when there is no input pulse 20, and performs the subsequent count value. The input pulse 20 is monitored even before the value is reset, and the already read count value is corrected only when the input pulse 20 is present.

[For production]

In FIG. 1, the counter control circuit of the present invention always monitors the input pulse to counter 1 before reading the count value of external counter l and before resetting it, and continues reading the count value until there is no input pulse. In addition to making it standby, when there is an input pulse at the time of reset, a certain value is added to the already read count value to correct the count value to an accurate value.

〔Example〕

FIG. 2 shows a flow chart of the operation of the embodiment of the counter control circuit 2 of the present invention shown in FIG.

The external counter 1 is subjected to a counter pulse 20 operation (step 31 in FIG. 2). Next, for example, when a certain period of time has passed and it is time to read the count value of the counter 1, the MPU 2 monitors whether or not there is an input of the counter pulse 20 (S2), and if there is an input pulse, performs a read operation. The MPU 2 waits, and if there is no input pulse, reads it (33), and the MPU 2 adds the read count value to the previous count value (34).

After reading the count value, the counter 1 will be reset, but even before this reset operation, it is necessary to monitor whether or not the counter pulse 20 is being input.
), if input is not in progress, the reset operation is performed as is (S6), but if input is in progress, correction is performed to add "1" to the count value (S7). In addition, this additional value is "1"
This is because the program running cycle of the MPU 2 is usually much shorter than the input cycle of the counter pulse.

〔Effect of the invention〕

According to the present invention, the presence or absence of counter pulse input is monitored prior to reading and resetting the count value of the external counter, reading is performed only when there is no input pulse, and reset is performed by correcting the count value if there is an input pulse. Since the configuration is such that the count value of the external counter is always obtained with high reliability, it is possible to obtain the count value of the external counter with high reliability.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a counter control circuit according to the present invention, FIG. 2 is a flowchart of a program executed by the counter control circuit of FIG. 1, and FIG. 3 is a block diagram showing a conventional counter control circuit. FIG. 4 is a flowchart of a program executed in the conventional example of FIG. 3, and FIG. 5 is a diagram illustrating the relationship among reset pulses, counter pulses, and count values. In Figure 1, 1 is a counter and 2 is an MPU. 20 represents a counter pulse, 30 represents a count value, and 32 represents a reset pulse. In the drawings, the same reference numerals indicate the same or corresponding parts.

Claims (2)

[Claims] (1) In a counter control circuit (2) that resets the count value (30) by a reset pulse (32) after reading the count value of the external counter (1), an input pulse (20 ) and reads only when there is no input pulse (20), and also monitors the input pulse (20) and reads the input pulse (20) before resetting the count value (30).
A counter control circuit that corrects an already read count value (30) only when there is. (2) The counter control circuit according to claim 1, wherein the count value is corrected by adding 1.