JPS63206802A - Programmable controller - Google Patents

Abstract

PURPOSE:To remarkably fit a device to the analysis of a program, etc., by reading and decoding respective user instruction word from a user program memory according to a program counter, applying a logical operation, etc., based on a result, and performing debugging efficiently. CONSTITUTION:The respective user instruction word is read out and decoded from the user program memory 13, and the logical operation or a numerical arithmetic calculation, etc., is performed corresponding to the result, and a final result is written on the corresponding area of an I/O memory 15. And after an instruction word read out from the user program memory 13 is decoded with an END instruction, the execution processing of a user program is finished. When the same channel data is changed for two times in the program, the data at each change point is confirmed, and the debugging can be performed efficiently via a prescribed picture. When the execution processing of the user program is finished, following output update processing and system service processing are executed at high speed.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention This invention relates to improvements in programmable controllers with trace functionality.

(Summary of the Invention) In the present invention, each user instruction word is sequentially read from a user program, the read user instruction word is decoded, and in response to the decoding of a trace processing execution command, a set input The output data is stored in the corresponding point-in-time area in the trace memory. According to this configuration, by writing a command word corresponding to the trace processing execution command in the user program, the output data can be stored in the trace processing execution cycle. It is possible to perform trace processing at any point in time, which improves usability in debugging.

(Prior art and its problems) Conventionally, as a programmable controller with a trace function, for example, the programmable controller series manufactured by Mitsubishi Electric Corporation is known.

In such a programmable controller,
The data sampling timing required to realize the trace function can be set each time the user program finishes executing each scan, as shown in FIG. It was customary to set it at regular intervals, regardless of the

However, in the case where the settings are made every time the execution of each scan of the user program is completed, there are the following problems.

That is, as shown in FIG. 8(a), the O channel data and the 1 channel data are added (ADD).
Then, if we write that the addition result is stored in channel 10, then the data of channel 10 is divided (DIV) by the data of channel 2, and the result of the division is stored in channel 10, the result is shown in the same figure (b). As shown in Figure (C), the data of the 10 channels changes twice within one scan at the time of execution of the ADD instruction and the time of execution of the DIV instruction, but as shown in Figure (C), the sampling timing is As a result of being set only at the end of each scan, only the execution results of the DIV instruction can be obtained as trace data, so ADD
Even if there is an error in the execution result of an instruction, it cannot be confirmed during debugging.

Additionally, if the sampling timing is set at regular intervals regardless of the execution cycle of the user program, if the sampling interval is longer than the execution cycle of the user program, sampling may not be handled in any execution cycle. On the other hand, if the sampling interval is shorter than the execution cycle, duplicate sampling will be performed in any execution cycle, and if the sampling interval is too short, the sampling data will increase and a large capacity trace memory will be required. I ran into problems.

(Object of the Invention) An object of the present invention is to sample output data set at any point in the execution cycle of a user program, store this in chronological order, and store the output data in chronological order based on the obtained chronological data. It is an object of the present invention to provide a programmable controller which can realize a trace function for desired input/output and can efficiently perform debugging etc. by effectively utilizing a limited capacity trace memory.

(Structure and Effect of the Invention) In order to achieve the above object, the present invention includes an instruction reading means for sequentially reading each user instruction 6R from a user program, and an instruction@reading means for decoding the read user instruction word. and trace execution means for storing set input/output data in a corresponding point-in-time area in the trace memory in response to decoding of a trace processing execution command. .

According to such a configuration, the set output data is sampled at any time during the execution cycle of the user program, and is stored in chronological order, and the desired input data is stored based on the obtained time-series data. This has the advantage that a trace function can be realized for output, and the limited capacity of trace memory can be effectively used to efficiently perform debugging and the like.

(Description of Embodiments) FIG. 1 is a schematic diagram showing the overall appearance of a programmable controller according to the present invention.

As shown in the figure, this programmable controller is of a so-called building block type and is composed of an arithmetic unit 1 and an I10 unit group 2. - Programming tool 3 is connectable.

As shown in FIG. 2, the arithmetic unit 1 is an MPU 10
．． System program memory 11. Work memory 12.
User program memory 13. Trace memory 14. I
10 memory 15, and is connected to the 10 unit group 2 via an I10 interface 16, and to the graphic programming tool 3 via a tool interface 17.

The MPU 10 executes a system program stored in a system program memory 11 to realize various functions necessary for the programmable controller.

As is well known, the basic functions required for a programmable controller are ■ 10 unit groups 2
The input update function stores the input data read from the I10 memory 15 into the corresponding input canister, reads out each user instruction word from the user program memory 13 sequentially, decodes it, and updates the data in the I10 memory 15 according to each decoding result. An instruction execution function that performs necessary logical operations, etc. with reference to There are an output update function that sends the 15 output data to the outside via the I10 unit group 2, and a system service function that performs other program writing, Tanabata festival, etc.

Among these functions, the ones that are related to the present invention are the instruction execution function and the system service function, and a detailed explanation of these functions will be given below with reference to the flowchart of the system program shown in FIG. Do this.

When the system program is started by turning on the power, a well-known power-on initialization process is performed, and various flags, initial settings of registers, channel recognition of the I10 unit group, etc. are performed (step 301).

When the power-on initial processing is completed, a so-called input update processing is performed, and the input data read from the I10 units constituting the I10 unit group 2 is stored in the input canister of the I10 memory 15 (step 302).

When the input update process is completed, a user program execution process is performed (step 303). In this user program execution process, sampling processing for tracing according to the present invention is performed, and the details will be explained later, but first, the basic operation of the user program execution process will be explained. .

First, each user instruction word is read out from the user program memory 13 according to the program counter and decoded, and the decoding result (for example, LD.

(AND, OR, 0LJT, CNT, TIM, etc.), the corresponding logical operations, numerical operations, etc. are performed, and the final operation results are written into the corresponding area of the I10 memory 15. Then, the instruction word read from the user program memory is EN
The execution process of the user program is terminated after waiting for it to be decoded as a D instruction.

When the execution process of the user program is completed, the output update process is performed, and the data in the output canister of the I10 memory 15 is sent to the outside via the OUT unit of the I10 unit group 2.

When the output update process is completed in this way, various processes (steps 305 to 308) necessary for the trace process are executed, and these processes will also be explained later.

Next, other system service processing (step 30
In step 9), various known system service processes such as programming processing and motor processing are performed in response to instructions from the graphic programming tool 3.

Then, the input modification frffi procedure described above (step 3
02), user program execution processing (step 3o3), output update processing (step 304), and system service processing (steps 305 to 309) are executed cyclically at high speed.

Next, various processes for realizing the trace function will be explained in order.

Assume now that the state of each data of channels 10, 20, and 40 at a specific point in time during each instruction cycle is to be traced.

In this case, 10 channels, 20 channels, and 40 channels are respectively stored as trace parameters in predetermined areas in the trace memory 14 by key operations on the graphic programming tool 3.

That is, when a key operation corresponding to a parameter setting request is performed on the graphic programming tool 3, this is detected by the system program on the calculation unit 1 side (step 3051), and the
On the side, the parameters specified by the graphic programming tool 3 (10 channels, 20 channels,
40 channels) are set in a predetermined area in the trace memory 14 as shown in FIG.

On the other hand, suppose the data of 10 channels is shown in Fig. 5(b).
As shown in , immediately after the execution of the ADD instruction, OtV
If you want to sample each instruction immediately after execution, use the same figure (
As shown in a), A in the user program
The trace command TR3M, which means a trace processing execution command, is written immediately after the DD command and immediately after the DIV command, respectively.

After that, in the system program shown in FIG.
When execution of the user program starts (step 30
3) First, set the program counter to O of the user program.
After setting the address (step 3031), the program counter is incremented by +1 (step 30).
36) Sequentially reads the instruction words specified by the program counter from the user program memory 13 and decodes them.

Then, the read command word is a well-known LD.

If it is AND, OR, OUT, TIM, CNT, etc., a known instruction execution process corresponding to each instruction is performed (step 3035).

On the other hand, if the read instruction is decoded as a T, R3M instruction (Yes at step 3033), sampling processing according to the present invention is performed (step 3034).

In this sampling process, trace parameters 10 channels, 20 channels, and 40 channels set on the trace memory are referred to as shown in FIG.
Read the data of each channel from the I10 memory 15,
After storing this in the corresponding time point area in the trace memory specified by pointer P, the value of pointer P is updated by +1 and the sampling process is ended.

In this way, while each instruction word read from the user program is sequentially decoded, when the decoding of the END command is confirmed (Yes at step 3032), the user program execution process ends and the process returns to the output update process described above. This is the reason for the transition.

In this way, when the user program execution process is repeated, the data of 10 channels will be sampled as trace data immediately after the execution of the ADD and DIV instructions, as shown in FIG. 5(b). , the sampled data will be stored in the trace memory 14 in chronological order.

On the other hand, in order to read trace data, which is a sample result, from the trace memory, a key operation corresponding to a trace data read command is performed in the graphic programming tool 3.

Then, as shown in FIG. 3, a trace data read command is detected on the arithmetic unit side (step 30).
7 (affirmative), then the arithmetic unit 1 side transmits the trace data stored in the trace memory 14 to the graphic programming tool 3 side. The transmitted trace data is then displayed on the screen 3a of the graphic programming tool 3 as a string of numbers, a time chart, etc., like a logic analyzer.

Regarding the method of displaying trace data on the screen 3a of the graphic programming tool 3,
Since this type of technology is well known in the technical field, detailed explanation will be omitted.

According to this embodiment, as shown in FIG. 5, the trace instruction TR is placed at a desired location in the user program.
By writing 3M, it is possible to sample the state of any 10 data at any time during the instruction execution cycle, and therefore the ADD instruction as shown in FIG.

If the same channel data changes twice as a result of each execution of the DIV command, check the data at each change point and use the graphic programming tool 3.
Efficient debugging etc. can be performed via the screen 3a.

Furthermore, the structure of the trace command is not limited to that shown in FIG. 5(a), but as shown in FIG. 6(a), several input conditions are added in the form of a ladder diagram. Or, as shown in Figure (b), a trace instruction execution command is given only at the timing (T) when a certain logical condition is satisfied (S) and a certain logical condition is satisfied. It goes without saying that engineers of this type of programmable controller can easily make modifications such as directly specifying a channel in the operand of a trace instruction, as shown in FIG. 3C.

That is, according to the example shown in FIG. 6(a), sampling processing can be performed only during a period when an arbitrary logical condition is satisfied, and according to the example shown in FIG. 6(b),
Sampling processing can be performed continuously only when a certain logical condition is satisfied and a certain timing has arrived.Furthermore, according to the example in FIG. - Channel data can be displayed directly on the screen 3a of the tool 3, making it very convenient for program analysis, etc.

[Brief explanation of the drawing]

FIG. 1 is a schematic diagram showing the overall appearance of the programmable controller according to the present invention, FIG. 2 is a block diagram showing the electrical hardware configuration, FIG. 3 is a flowchart showing the software configuration, and FIG. 4 is a trace diagram. A memory map showing the contents of the memory, Fig. 5 is an example of a user program, an explanatory diagram showing the transition of trace data, Fig. 6 is a ladder diagram showing another example of a trace command, and Fig. 7 shows sampling timing in a conventional device. The time chart in FIG. 8 is an explanatory diagram showing a program example, sampling timing, and changes in trace data in a conventional device. 1... Arithmetic unit 2... I10 unit group 3... Graphic programming tool 14... Trace memory TR3M... Trace instruction patent applicant Tateishi Denki Co., Ltd. Figure 1 Figure 2 Figure 1 (Ukemi Unit I) Figure 3 Figure 4 (Trace 'P stone) Figure 5 (a) Figure 6 (a) (b) (c) Figure 7 Figure 8 (a) (b)

Claims (1)

[Claims] (1) A command reading means for sequentially reading each user command from a user program, a command decoding means for decoding the read user command, and a setting in response to decoding of a trace processing execution command. A programmable controller comprising: trace execution means for storing the input/output data that has been input/output in a corresponding point-in-time area in a trace memory;