JPS63207152A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain excellent flatness by burying a stepped section formed between aluminum wiring conductors with an alumina insulating film through warm-water formation. CONSTITUTION:Resist films in a resist-pattern are all left as they are, second aluminum metallic films 6a-6e are applied among aluminum wiring patterns for a semiconductor substrate 1 in film thickness to one third from half of a first aluminum metallic film 2, and the second aluminum metallic films 6a-6e applied to the resist films in the resist-pattern are removed together with the resist films in lower sections. The second aluminum metallic films 6a-6e among the aluminum wiring patterns are converted into alumina insulating films in film thickness approximately equal to the first aluminum metallic film 2, using films 3, 3a, 3b being exposed through the process and consisting of a high melting-point metal or the silicide of the metal as mask. The films 3, 3a, 3b composed of the high melting-point metal or the silicide of the metal are removed from the upper sections of the first aluminum metallic films 6a-6e in the aluminum wiring patterns. Accordingly, stepped sections which have been formed among aluminum wiring conductors are taken off.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a method for manufacturing a semiconductor device, and particularly to a method for forming multilayer wiring.

[Conventional technology]

Nowadays, as semiconductor devices become more highly integrated, semiconductor devices with multilayer wiring structures are increasingly used. What is particularly important in this wiring multilayer technology is to flatten the structure of the first layer as much as possible. If the structure of the first layer is not sufficiently flattened, the degree of unevenness will be greatly amplified in the second and subsequent layers, so it will seriously hinder the formation of wiring in the second and subsequent layers. Become. The reason for the unevenness in the structure of this first layer is the extraction electrode of the semiconductor element formed on the substrate surface (
This is because, in particular, there are steps between the gate electrode (the gate electrode) and the first layer aluminum wiring conductor and the substrate surface, thereby forming a large height difference on the surface of the first layer interlayer insulating film. According to the prior art, the unevenness of the interlayer insulating film caused by these steps is shaped by a silica film formed by a coating method. Therefore, the interlayer insulating film of a conventional semiconductor device with multilayer wiring is a silicon oxide film (Si3N4) formed along the steps on the substrate, a silicon oxide film (SiOx
) and a silica coating film that fills the recesses.

[Problem that the invention seeks to solve]

However, with this conventional planarization technique, it is not possible to completely shape the unevenness on the surface of the interlayer insulating film caused by the step difference on the substrate. That is, since a level difference still remains on the surface of the glabellar insulating film, a satisfactory state has not necessarily been achieved, and the problem of difficulty in forming upper layer wiring still remains. Today, this problem is addressed by making the upper layer wiring wider. However, even with this method, not only is it not possible to completely suppress the occurrence of disconnection accidents in the upper layer wiring, but also it is not possible to improve the wiring density as long as this method is continued. In addition, since the etching rates of the silicon nitride film and the silica coated film are several times different, it also has the disadvantage that it is difficult to form through holes with good coverage in the glabella insulating film.

[Purpose of the invention]

In view of the above-mentioned circumstances, an object of the present invention is to eliminate the step difference that conventionally occurs between aluminum wiring conductors and to easily form an interlayer insulating film with extremely high flatness. The goal is to provide the following.

[Structure of the invention]

According to the present invention, a method for manufacturing a semiconductor device includes the steps of: depositing a first aluminum metal film for a wiring conductor on the entire surface of a semiconductor substrate; and applying a high melting point metal film on the first aluminum metal film. Or a process of covering the entire surface with the silicide,
forming a resist pattern for forming a wiring portion on the film of the high melting point metal or its silicide, and selectively applying the first aluminum metal film together with the upper high melting point metal or its silicide through the resist pattern; The resist film of the resist pattern is left intact between the aluminum wiring patterns to be etched, and the second aluminum metal film is etched to 1/1/2 of the first aluminum metal film.
a second aluminum metal deposition step of depositing the film between the aluminum wiring patterns of the semiconductor substrate with a film thickness of 3 or more and 1/2 or less; and the second aluminum metal film depositing on the resist film of the resist pattern. a lift-off process in which the second aluminum metal film between the aluminum wiring patterns is removed by using the film of the high melting point metal or its silicide exposed by the lift-off process as a mask; A hot water chemical formation process for converting the film into an alumina insulating film having a thickness approximately equal to that of the first aluminum metal film, and selective etching for removing the film of the high melting point metal or its silicide from above the first aluminum metal film between the aluminum wiring patterns. process.

[Failure to solve the problem]

That is, according to the present invention, the steps that conventionally occur between aluminum wiring conductors are filled and flattened by an alumina insulating film formed by hot water anodization. Therefore, a glabellar insulating film with extremely good flatness can be easily formed on this upper surface using a homogeneous material without applying a silica film as in the conventional method. The present invention will be described in detail below with reference to the drawings.

〔Example〕

FIGS. 1(a) to 1(g) are process diagrams showing one embodiment of the present invention.

First, as shown in FIG. 1(a), a first aluminum metal film 2 for use as a wiring conductor and a film 3 of a high melting point metal or its silicide are sequentially deposited on the whole surface of a semiconductor substrate 1. A resist film for forming wiring portions is patterned as 4a and 4b on the surface.

Here, 5 is a field insulating film. Next, the deposited laminated film of the first aluminum metal film 2 and the high melting point metal or its silicide film 3 is selectively etched through a resist pattern to form an aluminum wiring pattern, as shown in FIG. 1(b). be done.

Here, 2a and 2b are wiring conductors made of the first aluminum metal film formed in this step, and 3a and 3b are divided films of high melting point metal or its silicide, respectively. The next step is performed with all of the resist film of the resist pattern left intact. That is, Fig. 1 (C
), the second resist film 4a and 4b remain as shown in FIG.
The step of depositing aluminum metal is performed on the semiconductor substrate 1. When this step is performed, a second aluminum metal film 6 is formed on the substrate between the resist films 4a and 4b and the wiring pattern.
a.

6b, 6c, 6d, and 6e are each deposited simultaneously. At this time, the thickness of the second aluminum metal film to be deposited is defined to be 1i3 or more and 1/2 or less of the first aluminum metal film 2 for wiring conductor. Here, the second aluminum metal films 6a, 6b on the resist films 4a, 4b are removed together with the resist films 4a, 4b by the 7-to-off method as shown in FIG. 1(d). Silicide film 3a
, 3b are exposed. Then, the entire board was brought to a temperature of 80
The second aluminum metal film 6c is left on the substrate after being immersed in hot water at a temperature of about .degree.

Each portion 6d and 6e is subjected to hot water anodization until the film thickness becomes equal to that of the wiring conductors 2a and 2b made of the first aluminum metal.

Figure 1(e) is a state diagram at the end of this process, 7c, 7d,
7e indicates the alumina insulating film converted by this chemical formation process. At this time, the wiring conductors 2a and 2b are masked by films 3a and 3b of high melting point metal or its silicide, respectively, and therefore are not chemically converted.

This mask material is removed immediately after this hot water chemical conversion process is completed. That is, high melting point metals (Ti, Mo, W, Cr, etc.) or their silicides (TiSi, MoSi, WSi)
, Cr5i) is radical hydrogen (Htoz) and ammonia (N
Since it is selectively dissolved in the mixed solution of H3'), only the mask material can be selectively etched away without affecting others. Of course, dry etching or other methods may also be used. Thus, by depositing a silicon nitride film or a silicon oxide film over the entire surface of the substrate using the CVD method, it is possible to obtain an interlayer insulating film 8 with extremely high flatness as shown in FIG. 1(f). By opening through holes through holes 9 and forming upper layer wiring conductors 10, it is possible to easily realize a two-layer wiring semiconductor device with a completely flat structure as shown in FIG. If carried out one after another, a multilayer wiring semiconductor device with significantly improved flatness can be manufactured very easily.At this time, since the interlayer insulating film 8 is made of a single material and does not have a silica coating film as in the conventional method, through- There is no need to complicate the hole formation process.

〔Effect of the invention〕

As explained in detail above, according to the present invention, all the steps that conventionally occur between aluminum wiring conductors are completely filled with an insulating film made of chemically formed alumina, making it easy to form an extremely flat glabellar insulating film. Therefore, the wiring density can be significantly increased without causing a disconnection accident in the upper layer wiring as in the conventional case. That is, it has a remarkable effect that a highly integrated and highly reliable multilayer wiring semiconductor device can be manufactured with extremely high production efficiency.

[Brief explanation of the drawing]

FIG. 1 axes) to (g) are process diagrams showing one embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 2... First aluminum metal film, 2a, 2b... Wiring conductor made of first aluminum metal film, 3, 3a, 3b. ...Film of high melting point metal or its silicide, 4a, 4b, 9.
...Resist film, 5...Field insulating film, 6a to 6e...Second aluminum metal film, 7
c~7e...Alumina insulating film by hot water chemical formation,
8... Interlayer insulating film, 10... Upper layer wiring conductor. Agent Patent Attorney Susumu Uchihara,・';”,l”q
−:', −,. 〈 □

Claims (1)

[Claims] a step of entirely depositing a first aluminum metal film for a wiring conductor on one principal surface of the semiconductor substrate; a step of depositing a high melting point metal or its silicide on the entire surface of the first aluminum metal film; a step of forming a resist pattern for forming a wiring portion on a film of a high melting point metal or its silicide, and selecting the first aluminum metal film together with an upper film of the high melting point metal or its silicide through the resist pattern; forming a second aluminum metal film with a thickness of 1/3 or more and 1/2 or less of the first aluminum metal film, leaving the resist film of the resist pattern intact; a second aluminum metal deposition step for depositing aluminum metal between the aluminum wiring patterns on the semiconductor substrate; and a lift for removing the second aluminum metal film deposited on the resist film of the resist pattern together with the underlying resist film. - Using the film of the high melting point metal or its silicide exposed by the off process and the lift-off process as a mask, the second aluminum metal film between the aluminum wiring patterns is formed into a film that is approximately equal to the first aluminum metal film. A semiconductor characterized by comprising a hot water chemical formation process for converting into a thick alumina insulating film, and a selective etching process for removing the high melting point metal or its silicide film from the first aluminum metal film of the aluminum wiring pattern. Method of manufacturing the device.