JPS6322385B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to a magnetic bubble memory element used in a storage device of an electronic computing device or a terminal thereof.

(2) Background of the technology Magnetic bubble utilization devices that use magnetic bubbles to store information, perform logical operations, etc. have various features such as non-volatile generation, high storage density, low power consumption, small size and light weight, etc. Since it is a solid-state device that does not contain any mechanical elements, it has extremely high reliability, and therefore has great expectations for its future use as a large-capacity memory.

(3) Prior Art and Problems FIG. 1 is a diagram showing the configuration of a conventional odd/even type bubble memory chip, such as a 1M bit chip. In the figure, A is an even block, B is an odd block, 1 and 1' are bubble generators, 2 is a minor loop for even blocks, 3 is a minor loop for odd blocks, 4 and 4' are write major transfer paths, and 5 is a minor loop for odd blocks. 6 is a swap gate forming a write gate, 6 is a replicate gate forming a read gate, 7, 7' is a detector, 8, 8' is a read major transfer path, 9, 9' is a boot forming a defective loop information storage section. 10 indicates a swap gate forming a write gate for the boot loop, and 11 indicates a replicate gate forming a read gate for the boot loop.

This odd/even type magnetic bubble memory element includes bubble generators 1 and 1', write major transfer paths 4 and 4', and read major transfer path 8 in minor loop groups 2 and 3 forming two information storage sections, respectively. , 8', detectors 6, 6' are connected, boot loops 9, 9' are connected to each block one by one, bubble generators 1, 1', write measurer transfer paths 4, 4' and detection The devices 7 and 7' are also used for the minor loop. If we try to apply this method to a higher-density, for example, 4M bit chip, the element area will increase, or if we reduce the number of detectors 7 to one in order to use the chip area more effectively as shown in Figure 2. Since the readout transfer path 8 for the boot loop intersects with the readout conductor 8a, the current flowing through the readout conductor 8a affects the bubble that is being transferred through the readout transfer path 8, causing a malfunction in its operation and impairing its characteristics. There were problems such as deterioration.

(4) Object of the Invention In view of the above-mentioned conventional problems, it is an object of the present invention to provide a large-capacity magnetic bubble memory element that suppresses an increase in element area and does not cause deterioration of characteristics.

(5) Structure of the Invention According to the present invention, at least one bad loop information storage section is provided separately from the information storage section formed by a plurality of minor loops, and the bad loop information storage section is provided with at least one bad loop information storage section. The section is equipped with a magnetic bubble generator, a write major transfer path, a write gate, a read gate for reading the defective loop information, and a read measure transfer path for writing defective loop information into the information storage section, and detects the defective loop information. the number of bits from the defective loop information bubble generator to the write gate connected to the defective loop information storage section and the read gate connected to the defective loop information storage section; The sum of the number of bits from the bubble generator for the information storage unit to the write gate connected to the information storage unit and the number of bits from the read gate connected to the information storage unit to the detection unit This is achieved by providing a magnetic bubble memory element characterized in that the number of bits is equal to the sum of the number of bits.

(6) Examples of the invention Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 3 is a diagram for explaining a magnetic bubble memory device according to the present invention. In the figure, 20 is a minor loop as an information storage section for even-numbered blocks, 21 is a minor loop as an information storage section for odd-numbered blocks, 22 and 22' are bubble generators for the minor loop, and 23 and 23' are for the minor loop. Write major transfer path, 24, 24' are swap gates for minor loop, 25, 25' are replicate gates for minor loop, 26, 26'
is the read major transfer path for the minor loop, 2
7 is a detector, 28, 28' is a boot loop as a defective loop information storage section, 29, 29' is a bubble generator for the boot loop, 30, 30' is a write major transfer path for the boot loop, 31, 31' is a boot loop. Swap gate for boot loop, 32, 32' are replicate gates for boot loop, 33, 3
3' indicates a read major transfer path for the boot loop.

In this embodiment, as shown in the figure, the minor loops 20 of the even blocks and the minor loops 21 of the odd blocks are arranged side by side, and a detector 27 is placed in the upper right of the minor loops 20 of the even blocks and the minor loops 21 of the odd blocks.
and boot loop 28,2 in the left margin.
Two 8' are arranged, and each boot loop is equipped with a bubble generator 29, 29', a measurer transfer path 30,
30', 33, 33' are provided, and the boot loop 28,
The information 28' is read out using the detectors 27 of the minor loops 20 and 21 in common.

This embodiment configured in this manner has replicate gates 32 and 3 for the boot loops 28 and 28'.
The conductor pattern 2' is the major transfer path 33, 3.
Since the boot loop 2 can be placed so as not to intersect with 3', there is no characteristic deterioration.
8 and 28', it is possible to suppress an increase in the element area.

In addition, in the bit configuration, the number of bits from the bubble generator 22 to the swap gate 24 of an even number block is n, and the number of bits from the bubble generator 22' to the swap gate 24' of an odd number block is n+1.
(or n-1), the number of bits from the replicate gate 25 to the detector 27 of the even-numbered block is m, and the number of bits from the replicate gate 25' to the detector 27 of the odd-numbered block is m-1 (or m+
1), the length of the transfer path for even and odd blocks is (n+m) for even blocks and (n+1)+(m-1) for odd blocks, and the lengths of the transfer paths are equal for both, and the positions of minor loops 20 and 21 are 1. Due to the bit shift, the bubble generators 22, 22'
Information can be written alternately to the odd blocks, and the detector 27 can read information alternately from the even and odd blocks. This is similar to the conventional odd/even number system.

Also, in the two boot loops 28, 28', the number of bits from the bubble generators 29, 29' to the swap gates 31, 31' is set to n+2, respectively.
n+3, the number of bits from the replicate gates 32, 32' to the swap gate detector 27 are m-2 and m-3, respectively, and the sum of each transfer path is n+m as in the case of the minor loop. By shifting the position of ' by one bit, the bubble generators 29, 29' write to the boot loops 28, 28' alternately, and the detector 27 can read information alternately, so that the first
It is possible to maintain compatibility with the conventional configuration shown in the figure.

4 to 6 are diagrams for explaining an actual example in which the present invention is applied to a 4M bit element.
The figure is a schematic diagram, and Figure 5 shows its 1M bit block.
FIG. 6 shows the patterns of bubble transfer paths.

The 4M bit device shown in Fig. 4 has four or more 1M bit blocks formed on one device, and each block has a minor loop 40 for even blocks, a minor loop 41 for odd blocks, and a boot loop 42.
and a bubble generator 43 are formed.

FIG. 5 is an enlarged view of the 1M bit block of the device shown in FIG. 4. In the figure, 40 is an even block minor loop, 41 is an odd block minor loop, 42 and 42' are boot loops, 43 is a bubble detector, 44 is a bubble detector dummy, 45 and 45' are bubble generator conductor terminals, 46 and 46' are swap gate conductor terminals, 47 and 47' are replicate gate conductor terminals, and 48 are the terminals of the conductor of the bubble generator for the boot loop, 49 and 49' are the terminals of the conductor of the swap gate for the boot loop, 50 and 50' are the terminals of the conductor of the replicate gate for the boot loop, 51 is the terminal of the bubble detector, and 52 indicates a dummy terminal, and 53 indicates a common terminal between the bubble detector and the dummy.

The transfer pattern shown in FIG. 6 is a wide gap type transfer pattern, in which a is a 4 μm pitch and is used for a minor loop, and b is an 8 μm pitch and is used for a boot loop.

This 4M bit element is formed so that the transfer paths 54, 54' from the boot loops 42, 42' to the bubble detector 43 and the conductor 55 for the replicate gate of the boot loop do not intersect, as shown in FIG. , the bubbles transferred through the transfer paths 54, 54' are not affected by the current flowing through the conductor 55. Note that the replicate gate conductor 56 of the minor loop intersects the transfer paths 54 and 54';
This is because the minor loop is not read while the boot loop is being read, so the transfer path 54,
54' is irrelevant for bubbles transferred.

Furthermore, in the conventional odd/even method, since the bubble detector and the dummy were formed adjacent to each other, information could only be read every other bit, so one detection was required for each odd and even block. However, in the present invention, the bubble detector 43 and the dummy 44 are arranged separately as shown in FIG. 5, and the bubbles exiting the bubble detector 43 are discarded by a guardrail. Therefore, each bit can be read out, and the detector 4
3 allows information of odd and even blocks to be read out alternately.

(7) Effects of the Invention As explained above in detail, the magnetic bubble memory element of the present invention combines two boot loops required for 1M bits into one place and adds a new bubble generator and write/read transfer path. By reducing the number of detectors to one and sharing the detector with one for reading information, it is possible to suppress an increase in the element area, eliminate deterioration of the boot loop information read characteristics, and realize a large-capacity memory. be.

[Brief explanation of the drawing]

1 and 2 are diagrams for explaining a conventional magnetic bubble memory device, FIG. 3 is a diagram for explaining a magnetic bubble memory device according to the present invention, and FIGS. 4 to 6 are diagrams for explaining a magnetic bubble memory device according to the present invention. FIG. 3 is a diagram for explaining an actual example applied to a 4M bit element. In the drawing, 20 and 21 are minor loops,
22, 22' are minor loop bubble generators,
23 and 23' are write major transfer paths for minor loops, 24 and 24' are swap gates for minor loops, 25 and 25' are replicate gates for minor loops, 26 and 26' are read major transfer paths for minor loops, and 27 is detection. vessel, 2
8, 28' are boot loops, 29, 29' are bubble generators for boot loops, 30, 30' are write major transfer paths for boot loops, 31, 31' are swap gates for boot loops, 32, 32' are boot loops. Replicate gate for, 33,3
3' indicates a read major transfer path for the boot loop.

Claims (1)

[Claims] 1. A magnetic bubble generator and a writing device comprising at least one defective loop information storage section separate from the information storage section formed by a plurality of minor loops, and for writing defective loop information into the defective loop information storage section. comprising a measure transfer path, a write gate, a read gate for reading defective loop information, and a read measure transfer path, configured to share the detection of defective loop information with the detection section of the information storage section; The sum of the number of bits from the bad loop information bubble generator to the write gate connected to the bad loop information storage section and the number of bits from the read gate connected to the bad loop information storage section to the detector is the number of bits connected to the bad loop information storage section. A magnetic bubble characterized in that the number of bits is equal to the sum of the number of bits from a bubble generator for a storage section to a write gate connected to the information storage section and the number of bits from a read gate connected to the information storage section to the detection section. memory element.