JPS63244902A - Semiconductor device - Google Patents

Abstract

PURPOSE:To attach a desired characteristic at a high frequency on a semiconductor chip having a multiple pin input/output, by providing at least two layers of distribution lines in the neighborhood of the semiconductor chip, and using either of them as a transmission line for impedance matching for an input signal line set on a layer. CONSTITUTION:A semiconductor device is constituted of a metallic substrate 1, the semiconductor chip 2, alumina ceramics substrates 3 and 5, and a metallized layer 4. In such constitution, when a high frequency signal is inputted to the input signal line 7 of the substrate 3, since the inside of the semiconductor chip 2 behind an inputting pad 11 is set at high impedance and the transmission line 10 terminated matchably on the substrate 5 acts as load of 50OMEGA at just before the input of the semiconductor chip 2, it is possible to take matching for an input signal. Also, by using an oscilloscope, etc., to terminate the tip of the transmission line 10, it is possible to monitor the waveform of the input signal just before the semiconductor chip 2.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and more particularly to an ultra-high speed semiconductor device using a chip carrier package.

[Conventional technology]

Conventionally, this type of semiconductor device is shown in FIGS. 2(a) and (b>
As shown in FIG. 1, a semiconductor chip 2 is fixed to the semiconductor chip mounting surface of a conductive metal substrate 1 with solder or conductive paste, and an alumina ceramic substrate 3 is placed around the semiconductor chip 2. are fixed on a metal substrate 1, and an alumina ceramic substrate 3. A plurality of transmission lines 6 are formed on the upper surface, and each transmission line 6 and the corresponding input pad 11 or output pad 12 of the semiconductor chip 2 are connected with bonding wires 13.
It was connected with.

In this case, the transmission line 6 had a configuration in which there was no distinction between an input signal line and an output signal line, and transmission lines having the same configuration were arranged.

[Problem that the invention seeks to solve]

In the conventional semiconductor device described above, there is no distinction between input and output transmission lines, and a single transmission line must be used as the input transmission line.
In a semiconductor chip operating in a region (IIz or higher), impedance matching cannot be achieved with an input signal.

Generally, 50Ω is selected as the characteristic impedance of the system for wiring in a high frequency region. On the other hand, for ICs (especially digital ICs) that operate in the high frequency range, signal input is often performed using an FET (Field Effect Tr).
In many cases, the input impedance is a so-called high impedance of about 106Ω.

Therefore, matching cannot be achieved with 50Ω as the characteristic impedance of the system, so matching is achieved by adding a 50Ω chip resistor or the like to the entrance of the package for the input signal. However, although this method matches the input signal at the entrance of the package, there is only a single transmission line from the inside of the package to the mounted semiconductor chip, and the path beyond that has a high impedance. Since the semiconductor chip is connected, it is no longer in a matching state with the input signal, and it becomes impossible to obtain desired characteristics for the mounted semiconductor chip.

In order to reduce this impedance mismatch, it is necessary to shorten the distance from the package entrance to the semiconductor chip, that is, to reduce the area within the package. The disadvantage is that it is not possible to arrange transmission lines for Furthermore, since the mismatched portion cannot be eliminated even if it is shortened, the mismatched portion essentially remains and there is a drawback that it becomes impossible to obtain desired characteristics for the mounted semiconductor chip.

[Means for solving problems]

The semiconductor device of the present invention includes a conductive substrate, and at least one layer laminated on the substrate around the semiconductor chip mounting surface of the substrate, and at least one layer formed on the top surface of the other layer for impedance matching to a signal input line. It is configured to include at least two wiring layers forming a transmission line.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

1-(a) and (b) are a perspective view and a sectional view, respectively, of a first embodiment of the present invention.

As shown in FIGS. 1(a) and (b), a conductive metal substrate 1, a semiconductor chip 2 mounted on the semiconductor chip mounting surface of the metal substrate 1 with solder or conductive paste, and the surroundings of the semiconductor chip 2. a first layer alumina ceramic substrate 3 fixed to the metal substrate 1 surrounding the alumina ceramic substrate 3; a metallized layer 4 as a ground plane fixed on the alumina ceramic substrate 3; and a second layer fixed on the metallized layer 4. , a transmission line 9 formed on the alumina ceramic substrate 3 and having an input signal line 7 and an output signal line 8, and a transmission line 10 formed on the alumina ceramic substrate 5. .

The transmission line 9 is a balanced strip line with the metal substrate 1 and the metallized layer 4 as the ground plane, and the transmission line 10 is a microstrip line with the metallized layer 4 as the ground plane, and the characteristic impedance of both is set to 50Ω. ing.

The input pad 11 of the semiconductor chip 2 is electrically connected to the input signal line 7 and the transmission line 10 by a bonding wire 13, and the transmission line 10 is impedance matched and terminated externally.

In this state, the input signal line 7 of the alumina ceramic substrate 3
When a high frequency signal is input to the input pad 11, the inside of the semiconductor chip 2 has high impedance, and the transmission line 10 is matched and terminated on the alumina ceramic substrate 5.
acts as a 50Ω load immediately before the input of the semiconductor chip 2, making it possible to match the input signal.

Furthermore, if an oscilloscope or the like is used to terminate the end of the transmission line 10, it is also possible to monitor the input signal waveform just before the semiconductor chip 2.

Note that since the output pad 12 can be output as it is with a single bonding wire, it is sufficient to connect the output signal line 8 of the transmission line 9 and the output pad 12 with the bonding wire 13. It may also be used as a signal line.

In a second embodiment of the present invention, the alumina ceramic substrate 5 of the first embodiment shown in FIG. 1 is made of polyimide resin.

If an alumina ceramic substrate is used when a single signal transmission line has a characteristic impedance of 50Ω, the line width must be approximately equal to the substrate thickness. When supporting ICs with multi-pin input/output, a large number of transmission lines (10 to 40) are required, so the thickness of the alumina ceramic substrate must be made as thin as possible. There are restrictions from the materials used, so the appropriate thickness of the alumina ceramic substrate is about 50 to 150 μm.

Bonding such thin alumina ceramic substrates in multiple layers is expensive and may not be cost-effective depending on the price of the semiconductor chip to be mounted.

In such a case, if the multilayer substrate of the second embodiment is made of polyimide resin, there is an advantage that it can be handled at a lower cost. However, when polyimide resin is used as the substrate, the ratio of the substrate thickness to the line width on the substrate is approximately 1:2 (
The dielectric constant is approximately 4).

〔Effect of the invention〕

As explained above, the present invention provides impedance matching for input signal lines in which at least two wiring layers are provided around a semiconductor chip and one of the wiring layers is set in another layer in a semiconductor device using a chip carrier package. By using it as a transmission line, it is possible to achieve impedance matching with the input signal, so there is an effect that a semiconductor chip having multi-pin input/output at high frequency can be made to have desired characteristics.

[Brief explanation of the drawing]

1(a) and (b) are respectively a perspective view and a sectional view of a first embodiment of the present invention, and FIGS. 2(a) and (b) are a perspective view and a sectional view, respectively, of an example of a conventional semiconductor device. It is a diagram. 1... Metal substrate, 2... Semiconductor chip, 3.31.
... Alumina ceramic substrate, 4... Metallized layer,
5... Alumina ceramic substrate, 6... Transmission line,
7... Input signal line, 8... Output signal line, 10...
Transmission line, 11... input pad, 12... output pad, 13... bonding wire. 4 metal 4 nun? , 7M I 3'5゛ Nozomi too, stop Zη
I no 3 tsuriri. πBorrowCB consideration fshi, /f input pa sodo, l otsuwa force b・, de, Figure 1

Claims (1)

[Claims] A conductive substrate, and at least one layer laminated on the substrate around the semiconductor chip mounting surface of the substrate and forming a transmission line for impedance matching to a signal input line formed on the top surface of the other layer. A semiconductor device comprising two wiring layers.