JPS63255930A - Semiconductor device - Google Patents

Abstract

PURPOSE:To make a visual check possible in the case of bonding, inspection, etc., by using an insulating plate in which a conducting path to connect the metal electrode of a package and the pad of a semiconductor chip is formed on the lower surface, and a window to peep a semiconductor chip is formed. CONSTITUTION:An insulating plate 30 is made of insulating material such as ceramics, and constituted in the form of a rectangular flat plate, which is provided with a conducting path 31 on the lower surface, and a peepwindow 32 in the center. The conducting path 31 has a pattern extending radially from the peepwindow 32 towards the periphery, and connects pads 21 of a semiconductor chip 20 and metal electrodes 14 of a package 10. The peepwindow 32 is used to visually observe the semiconductor chip 20 from above. Thereby, the condition of bonding can be inspected by the visual check through the peepwindow 32, and the electric characteristics can be tested by inserting a probe through the peepwindow 32.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device in which a semiconductor chip is mounted in a package.

[Conventional technology and problems]

A semiconductor device consists of a semiconductor chip forming an integrated circuit and its package, and packages made of ceramics or molded resin are known.

And, for those using ceramic packages,
Metal electrodes formed by printing and firing on the package and pads of the semiconductor chip are connected by wire bonding or flip chip bonding.

Such a conventional semiconductor device is shown in FIG. The semiconductor device shown in the same figure (a>) is related to the wire bonding method, and includes a package 1 formed by laminating ceramic plates, and a semiconductor chip 2 mounted in a recess 3 formed approximately at the center of the package 1. The periphery of the recess 3 of the ceramic package 1 is raised in a stepped manner, and a metal electrode 4 is patterned on the upper surface of this step, and the metal electrode 4 extends along the outer surface of the package 1. The semiconductor chip 2 is mounted (die mounted) on the recess 3 of the package 1 so that the circuit formation surface on which the integrated circuit is formed is located upward, and the semiconductor chip 2 is mounted (die mounted) on the recess 3 of the package 1, and the electrodes at the ends of the circuit formation surface are connected to the external terminals 5a. The pad 5b is connected to the metal electrode 4 of the package 1 or the bonding wire 6, and a semiconductor device is assembled.

In the semiconductor device shown in FIG. 4 (a), the connection part (wire bonding part) between the pad 5b of the semiconductor chip 2 and the metal electrode 4 of the package 1 is exposed on the top surface. Therefore, the state of the connection can be easily confirmed. It is also easy to inspect the electrical characteristics using a tester or the like.

However, in the conventional device shown in FIG. 4(a),
Since the semiconductor depth 2 and the metal electrode 4 are connected by the bonding wire 6, an inductance (L) appears and the high frequency characteristics deteriorate. Therefore, it becomes difficult to achieve impedance matching in a high frequency range, and therefore it is not suitable for high speed/high frequency devices using compound semiconductors such as QaAs.

On the other hand, the semiconductor device shown in FIG. 4(b) is a so-called flip-chip type semiconductor device, in which a semiconductor device is placed on a substrate 7 on which a metal electrode 4 is formed on the upper surface, and is inverted so that the circuit formation surface is located downward. Chip 2 is placed. Solder bumps 8 are formed in advance on the pads 5b of the semiconductor chip 2, and the solder bumps 8 are thermally melted to form the substrate 7.
Bonding with the metal electrode 4 is performed.

In the conventional device shown in FIG. 4(b), since the semiconductor chip 2 and the metal electrode 4 are directly connected via the solder bumps 8, parasitics are reduced by 1 minute, and high frequency characteristics are good. It is. However, since the semiconductor chip 2 is turned over so that the circuit formation surface is located downward,
Visual checking is not possible during bonding, making it difficult to align the semiconductor chip 2. In addition, inspection after hoarding is not possible. Furthermore, since the circuit formation surface is located at the bottom, the chip cannot be tied-bonded to the base, and there are also problems in that heat dissipation is poor.

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a semiconductor device which has good high frequency characteristics and allows the connecting portion between a chip and a substrate to be visually observed during bonding, inspection, and the like.

[Means for Solving the Problems] In the semiconductor device according to the present invention, a semiconductor chip is mounted in a recessed part of a package so that the circuit formation surface on which an integrated circuit is formed is located upward, and the metal electrode of the package and the semiconductor The present invention is characterized in that an insulating plate is used in which a conductive path is formed on the lower surface and a viewing window for the semiconductor chip is formed in order to connect the pads of the chip.

(Function) Since the semiconductor device according to the present invention is configured as described above, the insulating plate connects the pads of the semiconductor chip and the metal electrodes of the package, and also functions to enable visual checking of bonding.

[Embodiments] Hereinafter, some embodiments of the present invention will be described with reference to the accompanying drawings.

FIG. 1 is a cross-sectional view of a semiconductor device according to the present invention, and FIG. ), (b) is the first
FIG. 3 is a bottom view and a plan view of the insulating plate 30 shown in the figure, and FIGS. be.

As shown in the figure, a semiconductor device includes a package 10 formed by stacking ceramic plates, a semiconductor chip 20 mounted on the package 10, and an insulating plate 30 covering the semiconductor chip 20. In the package 10, a recess 11 for mounting a semiconductor chip 20 is formed approximately in the center, and ceramic plates are stacked so that stepped parts 12 and 13 are formed around the recess 11.

Here, a metal electrode 14 is patterned on the upper surface of the stepped portion 12 by printing, baking, etc., and the package 1
An external terminal 15 is similarly formed on the outer surface of 0, and the external terminal 15 and metal electrode 14 are electrically connected to each other.

The semiconductor chip 20 has a circuit formation surface on which an integrated circuit is formed, and an anode is formed on the recess 11 of the package 10 on the opposite surface.
It is mounted using 5n alloy or the like. During this mounting, the semiconductor chip 20 is set in the recess 11 so that the circuit forming surface thereof is located upward.

The insulating plate 30 is made of an insulating material such as ceramics, and is formed into a rectangular flat plate, with a conductive path 31 formed on the lower surface and a viewing window 32 opened in the center. The conductive path 31 is patterned to extend radially outward from the viewing window 32 as shown in FIG. 21 and the metal electrode 14 of the package]O. Further, the viewing window 32 is used to visually observe the semiconductor chip 20 from above.

The shape and size of the viewing window 32 are shown in FIG.
), it is preferably formed so that the pads 21 on the circuit forming surface of the semiconductor chip 20 are visible. This allows positioning of the insulating plate 30 during bonding,
It is possible to insert a contact needle for inspection after bonding. Further, the entire upper surface of the insulating plate 30 is
As shown in Figure (b), a shield film 33 made of metal is coated. The coating with the metallic shielding film 33 acts to form a micro-stop strip line between the conductive path 31 on the lower surface, and thus the high frequency characteristics are greatly improved.

Next, the assembly process of the above embodiment will be explained.

First, a ceramic package as shown in FIGS. 1 and 2 is manufactured by printing a metal electrode material on a ceramic plate and then firing and laminating the materials. next,
The semiconductor chip 20 is placed in the recess 11 of the package 10 so that the surface on which the integrated circuit is formed is located upward as shown in FIG. 2(C).
Die bond to.

Next, as shown in FIG. 2(d), the conductive path 31 is connected to the pad 21 of the semiconductor chip 20 and the metal electrode 1 of the package 10.
4 and the semiconductor chip 2 so that the insulating plate 30 is passed between
0.1 and placed on the stepped portion 12 of the package 10. In this case, since the semiconductor chip 20 can be visually observed through the viewing window 32 of the insulating plate 30, the insulating plate 30 can be accurately and easily positioned. Then, when the connection portion is heated through the insulating plate 30, the conductive path 3] and the pad 21 of the semiconductor depth 20, and the conductive path 31 and the metal electrode 14 of the package 10 are melted and bonded, and the assembly of the semiconductor device is completed.

Incidentally, in order to prevent solder from flowing during such bonding, solder dams (not shown) are formed in advance on the conductive paths 31, pads 21, and metal electrodes 14.

After the semiconductor device has been assembled as described above, the bonding state can be visually inspected through the viewing window 32.

Furthermore, electrical characteristics can be inspected by placing a contact needle through the viewing window 32. Generally speaking, heat is radiated to the package through the back surface of the die-bonded semiconductor chip, allowing stable operation. Furthermore, the shield film 33 is coated on the upper surface of the insulating plate 30, and a microstrip line is formed between it and the conductive path 31 on the lower surface, so that high frequency characteristics are improved. Therefore,
It is particularly suitable for high-speed, high-frequency devices on the order of GHz using compound semiconductors such as Ga and As.

The present invention is not limited to the above example, and various modifications are possible.

For example, it is not necessary to form a shield film on the upper surface of the insulating plate, and two or more viewing windows may be formed.

Further, the shape of the m1 plane of the insulating plate can be changed as appropriate depending on the relative relationship between the thickness of the semiconductor chip and the depth of the recess of the package.

(Effects of the Invention) As described above in detail, the semiconductor device according to the present invention has the following features:
Since the viewing window of the insulating plate allows the semiconductor chip to be visually observed, positioning during bonding becomes easy and inspection after bonding becomes possible. Furthermore, the high frequency characteristics can be improved compared to the method using wire bonding, and the high frequency characteristics can be further improved by forming a shield film on the upper surface of the insulating plate.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of an embodiment of a semiconductor device according to the present invention, FIG. 2 is an explanatory diagram of the structure of an insulating plate and the mounting process of the semiconductor device, FIG. 3 is a perspective view of the semiconductor device of the embodiment, and FIG. The figure is a side view of each side of the conventional device. DESCRIPTION OF SYMBOLS 10... Package, 11... Recessed part, 14... Metal electrode, 15... External terminal, 20... Semiconductor chip, 21... Pad, 30... Insulating plate, 31...
Conductive path, 32... Peep window, 33... Shield film. Figure 1 (a) (b)
2 Figure 3

Claims (1)

[Scope of Claims] 1. A package in which metal electrodes connected to external terminals are formed on the periphery and a recess is formed substantially in the center, and the circuit formation surface on which the integrated circuit is formed is located upward. A conductive path connecting the semiconductor chip fixedly installed in the recess, the metal electrode and the pad of the semiconductor chip is formed on the lower surface, and a viewing window of the semiconductor chip is formed approximately at the center. and an insulating plate fixedly installed within the package so as to cover the edge of the metal electrode from the periphery of the semiconductor chip. 2. The semiconductor device according to claim 1, wherein the entire upper surface of the insulating plate is covered with a shielding film.