JPS6326030A - Pll circuit - Google Patents

Abstract

PURPOSE:To save the number of components and the space and to prevent the deterioration in the performance due to temperature change by providing two systems of PLL circuit sections, using the input signal of a 1st PLL circuit section as the output signal of a reference oscillator for system control, adding the output signals of a low pass filter of each PLL circuit section to form the control signal of the voltage control oscillator of a 2nd PLL circuit section. CONSTITUTION:The phase of a control oscillation signal V1 from a voltage control oscillator 13 and the phase of an output signal VR of a reference oscillator 3 are compared by a phase comparator 11. Then the output signal passes through a low pass filter 12 to control the oscillating frequency of the voltage control oscillator 13. On the other hand, the control voltage versus oscillating frequency characteristics of the voltage control oscillators 13, 13a are equal to each other, and while the input signal V1 to the 2nd PLL circuit section 2 is not given, the output signal of an adder circuit 21 is equal to the output signal of the low pass filter 12. thus, the PLL circuit having a self-running oscillation frequency adjusted automatically to the frequency of the reference oscillator 3 for system control is obtained and the deterioration in the performance due to temperature change is prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a PLL circuit, and particularly to a PLL circuit used for reading 8/14 bit variable p (EFM) data in a compact disk system.

[Conventional technology]

Conventionally, this type of PLL circuit has a circuit configuration including one phase comparator, a low-pass filter, and a voltage-controlled oscillator, and the system's reference oscillation frequency and this -
In order to match the free-running oscillation frequency of the PLL circuit, the free-running oscillation frequency has been adjusted using a semi-fixed resistor, a semi-fixed coil, or the like.

[Problem that the invention seeks to solve]

The conventional PLL circuit described above uses semi-fixed resistors, semi-fixed coils, etc. to adjust the free-running oscillation frequency to match the system's reference oscillation frequency. Although it required a large amount of parts and adjustment work, there was a drawback. Furthermore, there is also the drawback that performance deterioration of the PLL circuit due to temperature characteristics of the voltage controlled oscillator cannot be avoided.

An object of the present invention is to provide a PLL circuit that can eliminate parts, space, and adjustment work for adjusting the free-running oscillation frequency, and can prevent performance deterioration due to temperature changes. .

[Means for solving problems]

The F)LL circuit of the present invention uses the output signal of the reference oscillator and the first
a first phase comparator that compares the phase of the control oscillation signal with the control oscillation signal; a first low-pass filter that removes high frequency components of the output signal of the phase comparator; a first PLL circuit section including a first voltage controlled oscillator that outputs a first controlled oscillation signal; a second phase comparator that compares the phases of the input signal and the second controlled oscillation signal; a second low-pass filter that removes high-frequency components of the output signal of the comparator; an adder circuit that adds the output signals of the first and second low-pass filters; and an output signal of the adder circuit. and a second voltage controlled oscillator that is controlled by and outputs the second controlled oscillation signal and has a control voltage versus oscillation frequency characteristic equal to that of the first voltage controlled angular oscillator. , has a configuration for extracting an output frequency signal from the second voltage controlled oscillator.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention.

This embodiment includes a first phase comparator 11 that compares the phases of the output signal VR of the reference oscillator 3 for system control and the first control oscillation signal V1, and removes high frequency components of the output signal of the phase comparator 11. and a voltage-controlled oscillator 13 that is controlled by the output signal of the low-pass filter 12 and outputs a first controlled oscillation signal V1.
a second phase comparator 113 that compares the phases of the input signal V1 and the second controlled oscillation signal V2;
Phase comparator 11. a second low-pass filter 12. that removes high frequency components of the output signal of the second low-pass filter 12. and first and second low-pass filters 12, 12 . Addition circuit 21 that adds the output signals of 'a
and a second voltage controlled oscillator 131 that is controlled by the output signal of the adder circuit 21, outputs a second controlled oscillation signal V2, and has the same control voltage versus oscillation frequency characteristic as the first voltage controlled oscillator 13. The second PLL circuit section 2 is configured to extract an output frequency signal from the second voltage controlled oscillator 133.

Next, the operation of this embodiment will be explained.

First, the output signal VR of the reference oscillator 3 and the voltage controlled oscillator 1
The phase comparator 11 compares which phase of the control oscillation signal ■1 from the control oscillation signal ■1.

Next, a signal containing phase comparison information of this output signal passes through a low-pass filter 12 to control the oscillation frequency of the voltage controlled oscillator 13. Therefore, the output signal of the voltage controlled oscillator 13 is in the same phase as the reference oscillator 3.

On the other hand, voltage controlled oscillator 13.13. The control voltage vs. oscillation frequency characteristics of are equal, and the output signal of the adder circuit 21 is equal to the output signal of the low-pass filter 12 when the input signal 1 of the second PLL circuit section 2 is not input, so this output signal The oscillation frequency of the voltage controlled oscillator 133 controlled by the voltage controlled oscillator 133 becomes approximately the same frequency as that of the voltage controlled oscillator 13 and the reference oscillator 3.

That is, the free-running oscillation frequency in the second PLL circuit section 2 is automatically adjusted.

The PLL circuit operates with respect to the input signal V1 based on this automatically adjusted free-running oscillation frequency.

Therefore, a PLL circuit having a free-running oscillation frequency automatically adjusted to the frequency of the reference oscillator 3 for system control is obtained, and performance deterioration due to temperature changes and the like can be prevented.

Note that in this embodiment, the voltage controlled oscillator 13.13
．． and phase comparator 11.11. are easy to integrate as a semiconductor integrated circuit, and by forming them on the same semiconductor substrate, the voltage controlled oscillators 13.13. It is also easy to equalize the control voltage vs. oscillation frequency characteristics, etc.

〔Effect of the invention〕

As explained above, the present invention provides two systems of PLL circuit sections, uses the input signal of the first PLL circuit section as the output signal of the reference oscillator for system control, and uses the low-pass filter of each PLL circuit section. By adding the output signals and using it as a control signal for the voltage controlled oscillator of the second PLL circuit section, and using the second PLL circuit section as a normal PLL circuit, the free-running oscillation frequency can be adjusted to the frequency of the reference oscillator. Since the free-running oscillation frequency can be automatically adjusted, parts, space and adjustment work for adjusting the free-running oscillation frequency can be eliminated.
In addition, there is an effect that performance deterioration due to temperature changes can be prevented.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention.

Claims (1)

[Claims] a first phase comparator that compares the phases of the output signal of the reference oscillator and the first control oscillation signal; a first low-pass filter that removes high-frequency components of the output signal of this phase comparator; and this low-pass filter. a first voltage controlled oscillator that is controlled by an output signal of the oscillator and outputs the first controlled oscillation signal; and a second PLL circuit that compares the phases of the input signal and the second controlled oscillation signal. a phase comparator, a second low-pass filter that removes high-frequency components of the output signal of the phase comparator, an adder circuit that adds each output signal of the first and second low-pass filters, and this adder circuit. a second voltage controlled oscillator that is controlled by an output signal of the second voltage controlled oscillator, outputs the second controlled oscillation signal, and has a control voltage versus oscillation frequency characteristic equal to that of the first voltage controlled oscillator. , said second
A PLL circuit is characterized in that it extracts an output frequency signal from a voltage controlled oscillator.