JPH06181432A - Voltage controlled oscillator control circuit - Google Patents

Abstract

PURPOSE:To provide the control circuit to compensate a characteristic such as a temperature fluctuation of a VCO connected to a next stage with less number of components with respect to a signal adder circuit in a double loop PLL. CONSTITUTION:The control circuit is provided with a current mirror circuit 6 controlled by transistors (TRs) having the same characteristic as that of TRs being components of a VCO connecting to a next stage, and an output current of the current mirror circuit controls a current of differential amplifier circuits 7,9, output currents of the two sets of the differential amplifier circuits 7,9 are added by a current adder circuit 8 and a current mirror circuit 10 supplies the current to a resistor R3 and an output voltage is extracted from a prescribed location of the resistor R3.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a voltage controlled oscillator (VC).
O) control circuit, and more particularly to a VCO control circuit used in a dual loop PLL (phase locked loop).

[0002]

2. Description of the Related Art Conventionally, an example of a double loop PLL is disclosed in Japanese Patent Laid-Open No. 63-26030. FIG. 2 is a block diagram of the dual PLL circuit disclosed in the publication.

The double loop PLL circuit shown in FIG. 2 has an output signal V21 of a reference oscillator 21 and a first control oscillation signal V2.
2 is controlled by a first phase comparator 22 for phase comparison with 2; a first low pass filter 23 for removing high frequency components of the output signal of the phase comparator 22; and an output signal of this low pass filter. A first PLL circuit 2 including a first voltage controlled oscillator 24 that outputs a first controlled oscillation signal V22.
6, a second phase comparator 22a for phase-comparing the input signal V23 and the second control oscillation signal V24, and a second low-pass filter 23a for removing high-frequency components of the output signal of the phase comparator 22a. And an adder circuit 25 for adding the output signals of the first and second low-pass filters, and a second control oscillation signal V controlled by the output signal of the adder circuit 25.
A second voltage controlled oscillator 24a which outputs a voltage of 24 and has a control voltage-oscillation frequency characteristic equal to that of the first voltage controlled oscillator 24.
And a second PLL circuit 27 including an output frequency signal V25 from the second voltage controlled oscillator 24a.

Next, the operation of the double loop PLL circuit shown in FIG. 2 will be described.

When the signal V21 is supplied from the reference oscillator 21, the voltage controlled oscillator 2 is driven by the first PLL circuit 26.
The output signal V22 of No. 4 is in the same phase as V21.
On the other hand, when the voltage controlled oscillators 24 and 24a have the same control voltage-oscillation frequency characteristics and the input signal V23 of the second PLL circuit 27 is not input, the output signal of the adder circuit 25 is the output signal of the low pass filter 23. Therefore, the oscillation frequency of the voltage controlled oscillator 24a becomes substantially equal to the oscillation frequency of the voltage controlled oscillator 24.

That is, the free-running oscillation frequency in the second PLL circuit 27 is automatically adjusted.
Then, the operation of the PLL circuit with respect to the input signal V23 is performed with reference to the automatically adjusted free-running oscillation frequency.

As described above, the two-system PLL circuits are provided,
The input signal of the first PLL circuit 26 is used as the output signal of the reference oscillator 21 for system control, and the output signals of the low-pass filters 23 and 23a of the respective PLL circuits are added to produce the second signal.
When the second PLL circuit 27 is used as a normal PLL circuit as the control signal of the voltage controlled oscillator 24a of the PLL circuit 27, the free-running oscillation frequency can be automatically adjusted to the frequency of the reference oscillator 21. Parts for
It is possible to eliminate the work, and it is possible to prevent the performance deterioration due to the temperature change, the power supply voltage change, and the element variation when realized by the integrated circuit.

As the adder circuit 25 in the double loop PLL as shown in FIG. 2, the adder circuit as shown in FIG. 3 has been conventionally used.

The circuit configuration shown in FIG.
And resistors R31, R32, and R33. Here, the operational amplifier is assumed to have infinite input impedance and zero output impedance.

Next, the operation will be described. For simplicity of explanation, it is assumed that the input impedance of the operational amplifier 30 is infinite and the gain is also infinite. Here, the input resistance R31,
Since the inverting input terminals of the currents I31 and I32 flowing through R32 are considered to be virtual ground points, I31 = V31 / R31 and I32 = V32 / R32, respectively. Assuming that the input bias current of the operational amplifier is 0, the sum of currents I31 and I32 is all feedback resistor R3.
Flow to 3. Therefore, the output voltage V33 is V33 =-(I31 + I32) * R33 =-(V31 / R31 + V32 / R32) * R33 Here, if R31 = R32 = R0 is set, then V33 = -R33 / R0 (V31 + V32) It can be seen that the voltage obtained by adding V32 and V32 (proportional to the voltage) is obtained as V33.

[0011]

In the conventional adder circuit as shown in FIG. 3, since the operational amplifier is built in the circuit, many elements are required to configure this operational amplifier. Further, regarding the operational amplifier 30 incorporated in FIG. 3, the output voltage of the operational amplifier includes an error voltage due to an internal offset voltage. As a result, the control voltage includes an error, which causes the oscillation frequency of the VCO connected to the next stage to increase. It causes an error. As described above, when the circuit of FIG. 3 is used as the adder circuit, the accuracy of compensating the error in the oscillation frequency of the VCO is reduced.

[0012]

A voltage controlled oscillator control circuit according to the present invention includes a first phase locked loop circuit including a first phase comparator, a first low pass filter, and a first voltage controlled oscillator. , A second phase comparator, a second low pass filter and a second
And a second phase-locked loop circuit including a second voltage-locked oscillator including a voltage-controlled oscillator, and the first low-pass filter output and the second low-pass filter output are added to produce a second signal. 2 to control the voltage controlled oscillator.

The configuration is such that a first current mirror circuit that generates a predetermined output current and a first differential circuit that receives this output current and differentially amplifies the output signal of the first low pass filter as an input. An amplifier circuit, a second differential amplifier circuit to which the output current of the first current mirror circuit is supplied and which differentially amplifies the output signal of the second low-pass filter as an input; It includes a current adding circuit for receiving and adding the output current of the amplifier circuit by a current mirror connection, and an output means for converting the added output current from the current adding circuit into a voltage.

Since the voltage controlled oscillator control circuit of the present invention basically uses a current mirror circuit to connect the circuits, a draft or the like does not occur. Further, an additional transistor may be provided in the first current mirror circuit to cancel the transistor variation characteristic of the second voltage controlled oscillator, that is, the Vbe characteristic.

[0015]

The present invention will be described below with reference to the drawings.

FIG. 1 is a circuit diagram showing an embodiment of the present invention.

In the figure, this VCO control circuit is shown in FIG.
It is used instead of the adder circuit 25 of the double loop PLL circuit shown in FIG. The configuration and operation of the VCO control circuit of FIG. 1 will be described below with reference to FIG.

In this circuit diagram, the VCO control circuit is
A first current mirror circuit 6 including NPN transistors Q1, Q2 and Q3, and PNP transistors Q4, Q5 and Q10 for obtaining the same current as the output of the current mirror circuit 6 Two sets of constant current sources (Q4 and Q5, Q4 and Q10) and a constant current source consisting of this PNP type transistor are used as a common-emitter constant current source, and the outputs of the low-pass filters 23 and 23a are respectively input. In order to obtain the same current as the output current of the differential amplifier circuits 7 and 9 and these differential amplifier circuits 7 and 9, NP
In order to obtain the same current as the sum of the current adding circuit 8 connected to the differential amplifying circuits 7 and 9 by the current mirror circuit using the N-type transistors Q15 and Q16 and the collector current of the transistors forming this current adding circuit, A current mirror circuit is configured by using the PNP transistors Q17 and Q18, and a current mirror circuit (output means) 10 that obtains an output signal from the output terminal 5 by flowing this current through the resistor R3 is included.

Next, the operation will be described. In the current mirror circuit 5, the output current (collector current of the NPN type transistor Q2) is changed to Vbe (between the base and the emitter) of the transistor Q3 by diode-connecting the NPN type transistor Q3 (additional transistor) to the emitter resistance part of the current mirror circuit 5. Voltage). A VCO connected to the transistor Q3 and the output terminal 5 (see FIG.
By making the transistors constituting the voltage-controlled oscillator of (1) have the same characteristics, it is possible to cancel the fluctuation of the characteristics due to the fluctuation of Vbe due to the temperature fluctuation or the like. This will be described later with reference to FIG. A current mirror circuit is constructed using PNP transistors Q4, Q5 and Q10 so that the currents of the differential amplifier circuits 7 and 9 are controlled by the output current of the current mirror circuit 6, and a constant current is applied to each differential amplifier circuit. We are supplying.

The output of the low pass filter 23 is supplied to the input terminals 1 and 2 of the differential amplifier circuit 7, and the output of the low pass filter 23a is supplied to the input terminals 3 and 4 of the differential amplifier circuit 9. They can be reversed. Low pass filter 23, 23
a may output one output, or may output two outputs whose phases are inverted from each other. In which case, a outputs two differential outputs from the phase comparator 22 or one output. Determined by taking output. Filter 23,
When there is one output from 23a, each filter output is applied to one of the input terminals 3 and 4 of the input terminals 1 and 2, and a predetermined reference voltage is applied to the other input terminal. When there are two outputs from the filters 23 and 23a, those outputs are applied to the input terminals 1, 2 and 3,4.

The current adder circuit 8 includes the differential amplifier circuits 7,
A current mirror circuit is constructed again by using PNP type transistors Q17 and Q18 to obtain the same current as the sum of the output currents of 9 and the output signal is controlled by this current. Resistance to current R
An output signal can be obtained from the output terminal 5 by supplying the signal to the output terminal 5.

Here, canceling the variation of the characteristics of the base-emitter voltage Vbe of the transistor, which causes the offset voltage, with respect to the temperature variation will be described with reference to an equation.

The VCO connected to the next stage is assumed to be an emitter-coupled multivibrator type VCO as shown in FIG. What is important here is that the NPN transistor Q3 in FIG. 1 and the NPN transistors Q45, Q46, Q47, and Q48 in FIG. 4 are transistors having exactly the same characteristics.

First, the output voltage of the VCO control circuit shown in FIG. 1 will be calculated. When the voltage between the base and emitter of the NPN transistor Q3 is Vbe3, the collector current (Ic2) of the NPN transistor Q2 becomes Ic2 = Vbe3 / R2. The current flowing through the differential amplifier circuits 7 and 9 by the current mirror circuit composed of the PNP transistors Q4, Q5 and Q10 is almost the same as Ic2.

Regarding the differential amplifier circuit 7, this input terminal 1
If the difference (voltage) between the voltages applied to and 2 is ΔVA, the collector current (Ic
7) is Ic7 = ΔVA × gm = ΔVA × (q / kT) × Ic = ΔVA / VT × Ic where gm is the transconductance of the transistors Q6 and Q7 q = 1.6 × 10 ⁻⁹ (c: Coulomb) k = 8.65 × 10 ⁻⁵ (eV / OK) T is the absolute temperature Ic is the current flowing in the differential amplifier circuit 7, that is, the current flowing in the common emitter of the transistors Q6 and Q7 (equal to Ic2) VT = kT / q is there. Regarding the transistors forming the differential amplifier circuit 7, the transistors Q6 and Q7 have the same characteristics,
Transistors Q8 and Q9 have the same characteristics. Therefore, the output current Ic2 of the current mirror circuit 6 described above is
When Ic7 is expressed using the equation, Ic7 = (ΔVA / VT) × (Vbe3 / R2).

Similarly, in the differential amplifier circuit 9, if the difference (voltage) between the voltages applied to the input terminals 3 and 4 is ΔVB, the collector current (Ic) of the PNP transistor Q11.
11) becomes Ic11 = (ΔVB / VT) × (Vbe3 / R2).

The current thus obtained is obtained as the collector current of the transistors Q15 and Q16 by the current mirror circuit composed of the transistors Q9 and Q15 and the transistors Q13 and Q16, and further the collectors of the transistors Q15 and Q16. And a current mirror circuit composed of the transistors Q17 and Q18, a current obtained by adding the two flows to the resistor R3. Therefore,
The voltage (Vo) at the output terminal 5 is obtained as Vo = (Ic7 + Ic11) × R3 = (R3 / (VT · R2)) × (ΔVA + ΔVB) × Vbe3.

Next, the relation between the output voltage and the input voltage of the VCO of the emitter-coupled multivibrator system shown in FIG. 4 will be found. The oscillation frequency (f) of the VCO shown in FIG. 4 is expressed as f = 1 / T = I1 / 4 × C41 × Vbe46. Here, I1 is a current flowing through the resistors R43 and R44. Vbe46 is a voltage between the base and emitter of the transistor Q46 (reference document: "Ana").
lysis and Design of Analog
“Integrated Circuit” (analysis and design of analog integrated circuits), 1977 JOHN WI
LEY & SONG, Inc. Issue). Also, the current I
1 is expressed as I1 = (Vin-Vbe47) / R43 .... Vo in the expression is equal to Vin in the expression, and Vbe
Note that 3 and Vbe46 and Vbe47 are equal, VCO
Oscillation frequency f is f≈R3 ÷ ((VT · R2) × (4 · C41 · R4
3)) × (ΔVA + ΔVB), which is not affected by the temperature drift of the transistor.

In the embodiment described above, the VCO 24a of the emitter-coupled multivibrator type shown in FIG. 4 is used, but circuits of other types may be used. If the VCO 24a has a structure that is not affected by drift at all, the current mirror circuit 6 of the VCO control circuit in FIG.
The transistor Q3 of 1 may not have the characteristic for canceling the drift. In this case, the transistor Q3 may be replaced with a Zener diode or another constant voltage circuit.

[0030]

As described above, according to the present invention, a simple circuit having a configuration without using an operational amplifier is realized as a VCO control circuit of a double loop PLL, and there is no problem of drifting when an operational amplifier is used. Furthermore, by providing an additional transistor in the first current mirror circuit,
This has the effect that the error in the oscillation frequency of the VCO can be compensated with high accuracy even when the Vbe of the transistor fluctuates due to temperature fluctuations.

[Brief description of drawings]

FIG. 1 is a circuit diagram of an embodiment of the present invention.

FIG. 2 is a block diagram of an example of a dual loop PLL circuit.

FIG. 3 is a circuit diagram of an example of a conventional adder circuit.

FIG. 4 is a circuit diagram of an example of a VCO (voltage controlled oscillator).

[Explanation of symbols]

1,2,3,4 Input terminal 5 Output terminal 6,10 Current mirror circuit 7,9 Differential amplifier circuit 8 Current addition circuit 11 Power supply R1, R2, R3 Resistor Q1, Q2, Q3, Q8, Q9, Q13, Q14 , Q1
5, Q16 NPN type transistor Q4, Q5, Q6, Q7, Q10, Q11, Q12, Q
17, Q18 PNP transistor 21 Reference oscillator 22, 22a Phase comparator 23, 23a Low pass filter 24, 24a Voltage controlled oscillator 25 Adder circuit 26 First PLL circuit 27 Second PLL circuit R31, R32, R33 Resistor 30 Operational amplifier 41 Input terminal 42 Output terminal 43 Power supply R41, R42, R43, R44 Resistance C41 Capacitor Q41 to Q48 NPN type transistor

Continuation of front page (51) Int.Cl. ⁵ Identification number Office reference number FI technical display location 9182-5J H03L 7/08 E

Claims (4)

[Claims] 1. A first phase locked loop circuit including a first phase comparator, a first low pass filter and a first voltage controlled oscillator, a second phase comparator and a second low pass filter. An output of the first low pass filter and an output of the second low pass filter used in a dual loop PLL circuit including a filter and a second phase locked loop circuit including a second voltage controlled oscillator. In a voltage controlled oscillator control circuit for controlling an output signal frequency of the second voltage controlled oscillator by a signal obtained by adding the signal, a first current mirror circuit for generating a predetermined output current; and the output current supplied to the first current mirror circuit. A first differential amplifier circuit for differentially amplifying the output signal of the first low pass filter as an input; and a first differential amplifier circuit for differentially amplifying the output signal of the second low pass filter supplied with the output current. 2 differential amplifier circuit A current adding circuit for receiving and adding the output currents of the first and second differential amplifier circuits by a second current mirror circuit, and an output means for converting the added output current from the current adding circuit into a voltage. A voltage controlled oscillator control circuit including. 2. The first current mirror circuit includes an additional transistor for canceling a drift of a transistor forming the second voltage controlled oscillator, and a constant output including the drift canceling current component. The voltage controlled oscillator control circuit according to claim 1, wherein the voltage controlled oscillator control circuit generates a current. 3. The first current mirror circuit includes first and second transistors connected in current mirror, the additional transistor connected to an output of the first transistor and having a base and a collector directly connected to each other, The voltage controlled oscillator control circuit according to claim 2, further comprising a resistor connected to the output of the second transistor. 4. The first current mirror circuit and the first and second differential amplifier circuits are respectively connected by a current mirror connection transistor, and the output of the first current mirror circuit via the transistor. The voltage controlled oscillator control circuit according to claim 1, wherein the same current as the current flows through the first and second differential amplifier circuits.