JPS6333823B2 - - Google Patents

Info

Publication number
JPS6333823B2
JPS6333823B2 JP56136348A JP13634881A JPS6333823B2 JP S6333823 B2 JPS6333823 B2 JP S6333823B2 JP 56136348 A JP56136348 A JP 56136348A JP 13634881 A JP13634881 A JP 13634881A JP S6333823 B2 JPS6333823 B2 JP S6333823B2
Authority
JP
Japan
Prior art keywords
circuit
output
input
controlled oscillator
loop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56136348A
Other languages
Japanese (ja)
Other versions
JPS5838054A (en
Inventor
Masanobu Shinoda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NIPPON DENKI AISHII MAIKON SHISUTEMU KK
Original Assignee
NIPPON DENKI AISHII MAIKON SHISUTEMU KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NIPPON DENKI AISHII MAIKON SHISUTEMU KK filed Critical NIPPON DENKI AISHII MAIKON SHISUTEMU KK
Priority to JP56136348A priority Critical patent/JPS5838054A/en
Publication of JPS5838054A publication Critical patent/JPS5838054A/en
Publication of JPS6333823B2 publication Critical patent/JPS6333823B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop

Landscapes

  • Television Receiver Circuits (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Circuits Of Receivers In General (AREA)

Description

【発明の詳細な説明】 本発明は複数の相異なる近接した周波数のいず
れかが到来する時、その存在を判別すると同時に
上記周波数信号の存在しない場合との区別をはつ
きりと確実に検出並びに表示するための出力を得
るに適した回路を提供することを目的とする。
DETAILED DESCRIPTION OF THE INVENTION When one of a plurality of different and close frequencies arrives, the present invention determines its presence and at the same time clearly and reliably detects and distinguishes from the case where the frequency signal does not exist. The purpose of the present invention is to provide a circuit suitable for obtaining output for display.

一昨年来我国においては、テレビ放送において
音声多重システムが開発され放送されている。こ
の放送では放送局で番組に基いて通常のモノラル
放送の他に、ステレオ放送と異種放送の三つのモ
ードの放送を行つている。これをテレビ受像機等
で受信する際、送信側から、モノラル放送では特
別なことはせず従来通りであるが、ステレオ放送
と異種放送においては、その放送であることは区
別できる様に、55.125KHzに振幅変調されたステ
レオパイロツト信号(982.5Hz)と異種放送パイ
ロツト信号(922.5Hz)の信号をFM化して送信し
てくる仕組になつている。
Since the year before last, an audio multiplexing system has been developed and broadcast in our country for television broadcasting. In this broadcasting station, in addition to regular monaural broadcasting, three modes of broadcasting are performed based on the program: stereo broadcasting and heterogeneous broadcasting. When receiving this on a television receiver, etc., the transmitting side does not do anything special for monaural broadcasts and continues as usual, but for stereo broadcasts and different types of broadcasts, it is 55.125 so that they can be distinguished. It is designed to convert the stereo pilot signal (982.5Hz) amplitude-modulated to KHz and the different broadcast pilot signal (922.5Hz) into FM and transmit them.

従つて受信機側では、これらの信号を通常のテ
レビの音声中間周波数増幅回路を経てFM復調し
た後、55.125KHzの搬送波によつて変調されたス
テレオパイロツト信号982.5Hzもしくは異種放送
パイロツト信号922.5Hzを検出して、ステレオ放
送か異種放送かを知ると同時に、この信号によつ
て夫々に必要な回路を自動的に切換える動作を行
なわせている。
Therefore, on the receiver side, after FM demodulating these signals through a normal television audio intermediate frequency amplification circuit, the receiver receives a stereo pilot signal of 982.5 Hz or a different broadcast pilot signal of 922.5 Hz modulated by a 55.125 KHz carrier wave. At the same time, this signal is used to automatically switch the necessary circuits for each type of broadcast.

このようなステレオ放送か異種放送かの判別回
路として、第1図を用いて従来最も良く用いられ
ているリードフイルタ2コ使用の回路方式を説明
する。
As a circuit for determining whether it is a stereo broadcast or a different type of broadcast, a circuit system using two lead filters, which has been most commonly used in the past, will be described with reference to FIG.

AM復調器1の出力は、922.5Hzと982.5Hzのリ
ードフイルタ(音さ共振フイルタ)2,3を介し
てそれぞれ整流回路4,5に入る。整流回路4,
5の各々の出力を入力とするOR回路6と整流回
路4,5及びOR回路6の3つの出力を回路出力
となす構成である。かかる構成の回路の動作を以
下に説明する。振幅変調されたパイロツト信号を
AM復調器1でAM検波して922.5Hzもしくは
982.5Hzのいずれかのパイロツト信号を取り出し、
これを二つのリードフイルタ2,3に加える。リ
ードフイルタ2,3の特性は約922.5Hz±2Hz及
び982.5Hz±2Hzの信号の通過帯域をもつため、
このような二つの信号しか通過させない。従つて
得られた出力は直ちに二つの信号のいづれかであ
ることが判別でき、この信号を整流回路4,5を
通じてそれぞれ整流することによりステレオ放送
か異種放送かを判別できる。又、整流回路4,5
の出力よりOR回路6を通すことによつてモノラ
ル放送かをも判別できる。
The output of the AM demodulator 1 enters rectifier circuits 4 and 5 via 922.5 Hz and 982.5 Hz reed filters (tuning fork resonance filters) 2 and 3, respectively. Rectifier circuit 4,
The configuration is such that an OR circuit 6 receives the outputs of each of the rectifying circuits 4, 5, and the OR circuit 6 as inputs, and the three outputs of the rectifying circuits 4, 5 and the OR circuit 6 serve as circuit outputs. The operation of the circuit having such a configuration will be explained below. Amplitude modulated pilot signal
922.5Hz or 922.5Hz by AM detection with AM demodulator 1
Take out one of the 982.5Hz pilot signals,
This is added to the two lead filters 2 and 3. Since the characteristics of lead filters 2 and 3 have signal passbands of approximately 922.5Hz±2Hz and 982.5Hz±2Hz,
Only these two signals are allowed to pass. Therefore, the obtained output can be immediately determined to be one of the two signals, and by rectifying this signal through the rectifier circuits 4 and 5, it is possible to determine whether it is a stereo broadcast or a different type of broadcast. In addition, rectifier circuits 4 and 5
It can also be determined whether the broadcast is monaural by passing the output through the OR circuit 6.

しかしながら、このリードフイルタ2,3は他
の部品に比べ高価(通常の小信号トランジスタの
10数倍の価格)である上、大きな振動を伴う音響
機器(例えばスピーカー)等によつてハウリング
を生じるという欠点をもつている。
However, these reed filters 2 and 3 are expensive compared to other components (usually small signal transistors).
In addition to being 10 times more expensive, it also has the disadvantage of causing howling when used with audio equipment (such as speakers) that generates large vibrations.

上記欠点を改良するためリードフイルタを全く
使用しない方法が考えられた。
In order to improve the above drawbacks, a method was devised in which no reed filter was used at all.

次にリードフイルタを用いない従来回路を第2
図を用いて説明する。
Next, we will introduce a conventional circuit that does not use a lead filter.
This will be explained using figures.

AM復調器16の出力は、位相比較器17,1
2の一方の入力に入り、位相比較器17の出力は
ループフイルタ18を介して電圧制御形発振器1
9を制御する。電圧制御発振器19の出力は波形
整形回路10を介して破形整形して位相比較器1
7のもう一方の入力と90゜移相器11の入力に入
る。90゜移相器11の出力は位相比較器12のも
う一方の入力に入り、その出力は整流回路13を
介してシユミツト回路15′に入る。一方、ルー
プフイルタ8と電圧制御形発振器9の接続点より
振幅制限付増幅器14を介してシユミツト回路1
5に入る。
The output of the AM demodulator 16 is output to the phase comparator 17,1
2, and the output of the phase comparator 17 is passed through the loop filter 18 to the voltage controlled oscillator 1.
Control 9. The output of the voltage controlled oscillator 19 is irregularly shaped via the waveform shaping circuit 10 and sent to the phase comparator 1.
7 and the input of the 90° phase shifter 11. The output of the 90° phase shifter 11 enters the other input of the phase comparator 12, the output of which enters the Schmitt circuit 15' via the rectifier circuit 13. On the other hand, from the connection point between the loop filter 8 and the voltage controlled oscillator 9, the Schmitt circuit 1 is connected via the amplitude limited amplifier 14.
Enter 5.

この回路構成にて、AM復調器16で検波され
た922.5Hz又は982.5Hzのパイロツト信号は位相比
較器17,12の一方の入力信号として加えられ
る。電圧制御形発振器19は位相比較器17の出
力をループフイルタ18にて直流化して得られた
出力によつて発振周波数が電圧制御される。この
電圧制御形発振器19の自走周波数は、上記
922.5Hz並びに982.5Hzの間にあれば任意でよい筈
であるが自走周波数のドリフトなどを考慮して二
つの周波数の中央952.5Hz附近が好ましい。
With this circuit configuration, the 922.5 Hz or 982.5 Hz pilot signal detected by the AM demodulator 16 is added as an input signal to one of the phase comparators 17 and 12. The oscillation frequency of the voltage-controlled oscillator 19 is voltage-controlled by the output obtained by converting the output of the phase comparator 17 into direct current using the loop filter 18 . The free running frequency of this voltage controlled oscillator 19 is as described above.
Any frequency between 922.5 Hz and 982.5 Hz should suffice, but considering the drift of the free-running frequency, it is preferable to set it near the center of the two frequencies, 952.5 Hz.

波形整形回路10は、電圧制御形発振器19の
出力波形を位相比較器17に加える際比較感度を
大きくする目的で波形整形する回路で原理的には
無くてもよい。かくして位相比較器17、ループ
フイルタ18、電圧制御形発振器19、波形整形
回路10はパイロツト信号周波数によつて位相制
御された形(通常フエーズロツクループ略して
PLLと呼んでいる)を取り、位相比較器17と
ループフイルタ18の定数で決まる変換利得と電
圧制御形発振器19の電圧制御形発振変換利得に
より、通常知られているキヤプチヤーレンジ(引
込周波数範囲)並びにロツクレンジ(保持周波数
範囲)が定まるまで位相比較器17の入力である
922.5Hzと982.5Hzの二つの異なる周波数を検出す
るに十分なキヤプチヤーレンジにあらかじめ定め
てPLLを設計してある。このキヤプチヤーレン
ジの帯域幅は±60Hz以上あれば、自走周波数が何
らかの影響(ドリフト等)によりずれ、一方のパ
イロツト信号に接近しても他方のパイロツト信号
が入力された時には必ずロツクすることになる。
又、雑音に対して少しでも安定に動作する様、キ
ヤプチヤーレンジとロツクレンジの帯域幅が同じ
になる様PLLを設計してある。この電圧制御形
発振器19の入力は、同時に振幅制限付増幅器1
4を介してシユミツト回路15に入れることによ
り、わずかな電圧制御形発振器19の制御信号を
振幅制限付増幅器14にて増幅し、レベル制限し
てそれぞれのパイロツト信号を高低レベル
(1or0)の論理として取り出す。
The waveform shaping circuit 10 is a circuit that shapes the output waveform of the voltage controlled oscillator 19 for the purpose of increasing the comparison sensitivity when applying it to the phase comparator 17, and may not be necessary in principle. Thus, the phase comparator 17, the loop filter 18, the voltage controlled oscillator 19, and the waveform shaping circuit 10 have a phase controlled by the pilot signal frequency (usually a phase lock loop).
The normally known capture range (pulling frequency range) and the lock range (holding frequency range) are input to the phase comparator 17.
The PLL is designed with a capture range that is sufficient to detect two different frequencies, 922.5Hz and 982.5Hz. If the bandwidth of this capture range is ±60Hz or more, the free-running frequency will shift due to some influence (drift, etc.), and even if one pilot signal is approached, it will always lock when the other pilot signal is input. become.
In addition, the PLL is designed so that the bandwidth of the capture range and the lock range are the same, so that it operates as stably as possible against noise. The input of this voltage controlled oscillator 19 is simultaneously connected to the amplitude limited amplifier 1.
4 into the Schmitt circuit 15, a small control signal of the voltage-controlled oscillator 19 is amplified by the amplitude-limited amplifier 14, and the level is limited, so that each pilot signal is converted into high/low level (1 or 0) logic. Take it out.

それと同時にAM復調器にて検波されたパイロ
ツト信号と上記電圧制御形発振器19の出力を波
形整形回路10と90゜移相器11を介して電圧制
御形発振波形の90゜移相した出力とを位相比較器
12にて同期検波し整流回路13を介してシユミ
ツト回路15′に入れてモノラル放送かそうでな
いステレオ放送又は異種放送かを、これも高低レ
ベル(1or0)の論理の違いにて取り出す。
At the same time, the pilot signal detected by the AM demodulator and the output of the voltage controlled oscillator 19 are passed through the waveform shaping circuit 10 and the 90° phase shifter 11 to output the voltage controlled oscillation waveform with a 90° phase shift. Synchronous detection is performed by a phase comparator 12, and the signal is input to a Schmitt circuit 15' via a rectifier circuit 13 to determine whether it is a monaural broadcast, a stereo broadcast, or a different type of broadcast based on the difference in logic between high and low levels (1 or 0).

第2図のリードフイルタ不用の回路方式では、
リードフイルタ使用回路方式の欠点が無くなつた
ものの、放送電波が地域によつて弱電界になつた
時、チユーナがAGC(自動利得調整回路)によつ
て最大利得となつてノイズ成分が増加し、パイロ
ツト信号の判別を困難にするため、リードフイル
タより広い周波数帯域幅を有する回路では、リー
ドフイルタより早くパイロツト信号の判別が不能
となる。
In the circuit system shown in Figure 2 that does not require a lead filter,
Although the disadvantages of the lead filter circuit system have been eliminated, when the electric field of broadcast radio waves becomes weak in some areas, the tuner reaches its maximum gain due to AGC (automatic gain adjustment circuit) and noise components increase. In order to make it difficult to distinguish the pilot signal, a circuit having a wider frequency bandwidth than the reed filter becomes unable to distinguish the pilot signal earlier than the reed filter.

現在、リードフイルタ使用の第1図の回路方式
により第2図の回路方式の方がテレビのアンテナ
入力にて2〜3dBμ弱電界に悪くなつている。
Currently, the circuit system shown in FIG. 2, which uses a lead filter, is worse than the circuit system shown in FIG. 2, which has an electric field of 2 to 3 d B μ weaker at the input of a television antenna.

本発明によれば、リードフイルタを全く使用し
ないで、ステレオ放送並びに異種放送を区別せし
めると同時に弱電界による判別能力の向上がはか
れる上に集積回路に組み込めば、集積回路自体の
コストアツプもわずかで信頼度の高い安価な音声
多重回路を得ることができる。
According to the present invention, it is possible to distinguish between stereo broadcasts and different types of broadcasts without using a lead filter at all, and at the same time, the discrimination ability is improved using a weak electric field.If it is incorporated into an integrated circuit, the cost of the integrated circuit itself is only slightly increased and reliability is improved. A highly efficient and inexpensive audio multiplexing circuit can be obtained.

次に、本発明の一実施例を示す第3図を用いて
本発明をより詳細に説明する。
Next, the present invention will be explained in more detail using FIG. 3 showing one embodiment of the present invention.

AM復調器26の出力は、位相比較器27,2
2の一方の入力に入り、位相比較器27の出力は
ループフイルタ28を介して電圧制御形発振器2
9を制御する。
The output of the AM demodulator 26 is output to the phase comparators 27 and 2.
2, and the output of the phase comparator 27 is passed through a loop filter 28 to the voltage controlled oscillator 2.
Control 9.

電圧制御形発振器29の出力は波形整形回路2
0を介して波形整形して、位相比較器27のもう
一方の入力と90゜移相器21の入力に入る。
The output of the voltage controlled oscillator 29 is sent to the waveform shaping circuit 2
0, and enters the other input of the phase comparator 27 and the input of the 90° phase shifter 21.

90゜移相器21の出力は位相比較器22のもう
一方の入力に入り、その出力は整流回路23を介
してシユミツト回路25′に入る。
The output of the 90° phase shifter 21 enters the other input of the phase comparator 22, the output of which enters the Schmitt circuit 25' via the rectifier circuit 23.

一方、ループフイルタ28と電圧制御形発振器
29の接続点より振幅制限付増幅器24を介して
シユミツト回路25に入る。以上は第2図と同様
の構成であるが、本実施例では以下の回路を付加
する。整形回路23とシユミツト回路25′の接
続点よりループ利得切換回路30を介して、位相
比較器27とループフイルタ28によつて決定さ
れる変換利得の切換制御を行う回路方式で、パイ
ロツト信号と電圧制御形発振器29の出力を波形
整形回路20と90゜移相器21を介して電圧制御
形発振波形の90゜移相した出力とを位相比較器2
2にて同期検波し、パイロツト信号が入力された
時整流回路23にて直流化した出力によつてルー
プ利得切換回路30を働かせ、位相比較器27と
ループフイルタ28によつて決定する変換利得を
下げ、PLLの全体のループ利得を下げる。又、
パイロツト信号が入力されなかつた時は、ループ
利得切換回路30が働かない。
On the other hand, the signal enters the Schmitt circuit 25 from the connection point between the loop filter 28 and the voltage controlled oscillator 29 via the amplitude limited amplifier 24. The above configuration is the same as that shown in FIG. 2, but the following circuits are added in this embodiment. This circuit system performs switching control of the conversion gain determined by the phase comparator 27 and loop filter 28 from the connection point between the shaping circuit 23 and the Schmitt circuit 25' via the loop gain switching circuit 30. The output of the controlled oscillator 29 is passed through the waveform shaping circuit 20 and the 90° phase shifter 21, and the output of the voltage controlled oscillation waveform is shifted by 90° to the phase comparator 2.
2 performs synchronous detection, and when the pilot signal is input, the rectifier circuit 23 converts the output into a direct current to operate the loop gain switching circuit 30, and the conversion gain determined by the phase comparator 27 and loop filter 28 is set. lower the overall loop gain of the PLL. or,
When no pilot signal is input, the loop gain switching circuit 30 does not work.

ループ利得を下げることは、キヤプチヤーレン
ジの帯域幅を狭くし、PLLの雑音帯域幅(ルー
プフイルタ28の帯域通過特性と電圧制御形発振
器29の積分特性およびループ利得によつて決定
される閉ループの狭帯域特性)を小さくし、入力
雑音の影響を小さくし、安定に動作させる。
Lowering the loop gain narrows the bandwidth of the capture range and reduces the noise bandwidth of the PLL (closed loop determined by the bandpass characteristics of the loop filter 28, the integral characteristics of the voltage controlled oscillator 29, and the loop gain). (narrowband characteristics), reduce the influence of input noise, and operate stably.

キヤプチヤーレンジとロツクレンジの関係はパ
イロツト信号のない、即ちPLLがロツクしてい
ない時、キヤプチヤーレンジが自走周波数に対し
て±60Hz以上あり、パイロツト信号が入力した時
は、即ちPLLがロツクした時、ロツクレンジが
自走周波数に対して±60Hz以上でキヤプチヤーレ
ンジは、その帯域以内であればよい。この様なキ
ヤプチヤーレンジ、ロツクレンジであれば、従来
回路方式のそれぞれの問題を解決できる。
The relationship between the capture range and the lock range is that when there is no pilot signal, that is, the PLL is not locked, the capture range is ±60Hz or more relative to the free-running frequency, and when the pilot signal is input, that is, the PLL is not locked. When locked, the lock range should be at least ±60Hz with respect to the free-running frequency, and the capture range should be within that band. With such a capture range and lock range, each problem of the conventional circuit system can be solved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の最もよく使用いる、リードフイ
ルタ2個使用の回路方式を示す回路図である。第
2図は、従来のリードフイルタを全く使用しない
回路方式を示す回路図である。第3図は、本発明
の一実施例を示す回路図である。 1,16,26……AM復調器、2,3……リ
ードフイルタ(922.5Hz、982.5Hz)、4,5,1
3,23……整流回路、17,12,27,22
……位相比較器、18,28……ループフイル
タ、19,29……電圧制御形発振器、10,2
0……波形整形回路、11,21……90移相器、
15,15,25,25……シユミツト回路、3
0……ループ利得切換回路。
FIG. 1 is a circuit diagram showing a conventional circuit system using two lead filters, which is most commonly used. FIG. 2 is a circuit diagram showing a conventional circuit system that does not use any lead filter. FIG. 3 is a circuit diagram showing one embodiment of the present invention. 1, 16, 26...AM demodulator, 2, 3...Lead filter (922.5Hz, 982.5Hz), 4, 5, 1
3, 23... Rectifier circuit, 17, 12, 27, 22
... Phase comparator, 18, 28 ... Loop filter, 19, 29 ... Voltage controlled oscillator, 10, 2
0...Waveform shaping circuit, 11, 21...90 phase shifter,
15, 15, 25, 25... Schmitt circuit, 3
0...Loop gain switching circuit.

Claims (1)

【特許請求の範囲】[Claims] 1 位相比較器の一方の入力に比較的近接した相
異なる周波数の入力信号が供給され、他方の入力
に自走周波数が上記周波数の間に設定された電圧
制御形発振回路の出力が供給されるフエーズロツ
クループ回路と、上記電圧制御形発振回路の出力
を利用して上記入力信号の存在を判別する回路手
段とを有する信号判別回路において、上記回路手
段の出力に応答して上記フエーズロツクループの
ループ利得を切換える手段を設けたことを特徴と
する信号判別回路。
1 One input of the phase comparator is supplied with input signals of relatively close different frequencies, and the other input is supplied with the output of a voltage-controlled oscillator circuit whose free-running frequency is set between the above frequencies. A signal determining circuit comprising a phase lock loop circuit and circuit means for determining the presence of the input signal using the output of the voltage controlled oscillator circuit, the phase lock loop circuit detecting the phase lock in response to the output of the circuit means. A signal discriminator circuit characterized in that it is provided with means for switching the loop gain of a loop.
JP56136348A 1981-08-31 1981-08-31 Signal discriminating circuit Granted JPS5838054A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56136348A JPS5838054A (en) 1981-08-31 1981-08-31 Signal discriminating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56136348A JPS5838054A (en) 1981-08-31 1981-08-31 Signal discriminating circuit

Publications (2)

Publication Number Publication Date
JPS5838054A JPS5838054A (en) 1983-03-05
JPS6333823B2 true JPS6333823B2 (en) 1988-07-07

Family

ID=15173087

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56136348A Granted JPS5838054A (en) 1981-08-31 1981-08-31 Signal discriminating circuit

Country Status (1)

Country Link
JP (1) JPS5838054A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6348019A (en) * 1986-08-15 1988-02-29 Nec Corp Fm signal discriminating circuit

Also Published As

Publication number Publication date
JPS5838054A (en) 1983-03-05

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