JPS6336429Y2 - - Google Patents

Description

[Detailed explanation of the idea]

(a) Industrial Application Field The present invention relates to a connection circuit used for bidirectional data transfer between digital ICs (integrated circuits). (b) Prior art A voltage synthesizer type channel selection device used in a television receiver usually uses a one-chip microcomputer (hereinafter referred to as a "microcomputer") as a controller, and is electrically rewritable with the microcomputer. non-volatile memory [usually
Tuning data and band data are transferred to and from the EAROM (hereinafter simply referred to as "memory"). That is, a voltage synthesizer type channel selection device is constructed as shown in the block diagram of FIG. 1, which schematically represents the device. In Figure 1, the tuning point detection signal generation circuit is obtained from an intermediate frequency (IF) amplification circuit.
It receives the synchronization signal and horizontal oscillation signal obtained from the AFT voltage and synchronization circuit, detects the tuning point based on these signals, and sends the tuning point detection signal to the microcontroller, which searches for the desired broadcasting station. The tuning data and band data obtained are transferred from the microcomputer to the memory and written into the memory. In addition, when selecting a channel by operating the tuning keyboard, the tuning data and band data stored in the memory are read by the microcomputer, and the tuning data transferred from the memory to the microcomputer is stored in the microcomputer. /A converted and applied to the variable capacitance diode of the electronically tuned tuner via a low pass filter (LPF), while the band data is input to a band switching circuit to switch the reception band of the tuner and receive the desired broadcast station. I'm starting to be able to do it. Note that the reception channel is displayed on the channel display section by a signal from the microcomputer. FIG. 2 shows a conventional example of a connection circuit that connects the microcomputer and memory. In other words, in Figure 2, the microcomputer (MC)
The output electrode (collector) of an open collector output transistor Q ₁ is internally connected to the input/output terminal of the transistor Q ₁ , and a signal from the data output section 100 in the microcontroller is applied to the base of the transistor Q 1 . , the input/output terminals are connected to a data input section 101 within the microcomputer (MC), and signals supplied to the input/output pins from the outside are input into the data input section 101. The input/output terminal 22 of the microcomputer (MC) and the input terminal provided in the memory (ME) are connected by one bidirectional data bus 103, and the input/output terminal of the memory (ME) is Connected to the output electrode (collector) of output transistor Q ₂ inside the memory (ME) and connected to the output electrode (collector) of the output transistor Q 2.
It is grounded via a pull-down resistor _R1 , which is equivalently formed internally. The power supply terminal of the microcomputer (MC) and the power supply terminal of the memory (ME) are the first power supply line 10 that supplies a constant voltage of +5V.
The power supply terminal of the memory (ME) is connected to the emitter of the output transistor _Q2 inside the memory (ME), and the second power supply line 105 is connected to the second power supply line 105 connected to the memory (ME). Line 105 and data bus 103 are connected via pull-up resistor _R2 . still,
In the memory (ME), 106 is a data input section, and signals input from the outside to the input/output terminal are input to this data input section 106. The microcomputer (MC) is also provided with a clock output terminal, first, second, and third mode control signal output terminals, [hereinafter referred to as "first, second, and third mode output terminals"]. On the other hand, the memory (ME) has a clock input terminal, 1st, 2nd,
Third mode control signal input terminals (hereinafter referred to as "first, second, and third mode input terminals") are provided. The clock output terminal 〓〓 and the clock input terminal are connected by a clock bus 107, and the first, second, third mode output terminals, .
and the first, second, and third mode input terminals,
are the first, second, and third mode setting buses 1, respectively.
08, 109, and 110, and the clock bus 107 and the first, _second , and third mode setting buses ₁₀₈ , ₁₀₉ , and ₁₁₀ are connected to 1 power line 104. When writing data to the memory (ME), the microcomputer (MC) outputs high or low level signals to the first to third mode setting buses 108, 109, and 110, and also outputs high or low level signals to the clock bus 1.
The memory (ME) is set to write mode in synchronization with the clock output at 07, and predetermined data is output to the memory (ME) via the data bus 103. At this time, the output transistor Q of the memory (ME) ₂ is in the off state, and the output transistor _Q1 of the microcomputer (MC) turns on and off according to the signal supplied to the base from the data output section 100, and outputs it to the data bus 103 as a high or low level data signal. . Also, when transferring data from the memory (ME) to the microcomputer (MC), the microcomputer (MC) outputs high or low level signals to the first to third mode setting buses 108, 109, and 110, and synchronizes them with the clock. Set the memory (ME) to read mode and transfer the specified data from the memory (ME) to the microcontroller (MC).
However, at this time, the output transistor _Q1 of the microcontroller (MC) is in the off state, and by turning on and off the output transistor _Q2 of the memory (ME), the data bus is output as a high or low level data signal. 103. By the way, from the microcontroller (MC) to the memory (ME)
When transferring data, the low level of the data is approximately the ground potential, and the high level is the voltage (+5V) of the second power supply line 105 connected to a pull-up resistor.
This is the voltage value divided by R ₂ and pull-down resistor R ₁ . Since the resistance value of the pull-down resistor _R1 is larger than that of the pull-up resistor _R2 , a sufficiently high level voltage is supplied to the memory (ME).
When transferring data from the memory (ME) to the microcontroller (MC), the high level of the data is approximately the power supply voltage (+5V), which is large enough, but the low level is connected to a pull-up resistor that connects the power supply voltage (+5V).
The voltage value divided by R ₂ and pull-down resistor R ₁ , in other words, it is the same value as the high level of data when transferring data from the microcontroller (MC) to the memory (ME), and the microcontroller (MC) There is an inconvenience that the low level voltage output from the ME) will not be judged as low level, and there is a possibility that accurate data transfer will not be performed. (c) Purpose of the invention The object of the present invention is to provide a connection circuit devised to eliminate the above-mentioned inconveniences that occur when performing bidirectional data transfer. (d) Structure of the invention The invention comprises a first IC, which has an output transistor with an open output electrode connected internally, and has a first input/output terminal that outputs a signal from the transistor and receives input from the outside. , a second input/output terminal connected to an output electrode of an output transistor whose output electrode is internally grounded via a pull-down resistor and which receives input from the outside;
A connection circuit is provided between the first IC and the second IC for bidirectional data transfer between the first IC and the second IC, and includes a pull-up resistor between the data bus connecting the first and second input/output terminals and the power line. and the series circuit of the switching means, and the first IC.
The present invention is characterized by providing means for turning on the switching means when transferring data from the second IC to the second IC, and turning off the switching means when transferring data from the second IC to the first IC. (e) Embodiment An embodiment of the present invention will be described with reference to FIGS. 3 to 8, and the same parts as those in the prior art will be given the same reference numerals and their explanation will be omitted. That is, in the present invention, as shown in FIG. 3, a pull-up resistor R ₂ is connected between the bidirectional data bus 103 connecting the input/output terminals of the microcontroller (MC) and the input/output terminals of the memory (ME) and the second power supply line 105. A data transfer direction identification signal (hereinafter referred to as "identification signal") outputted from a control terminal of a microcomputer (MC) is connected to a data transfer direction identification signal bus (hereinafter referred to as "identification signal bus"). ) 113 to the switching means 111 to control whether the switching means 111 is turned on or off. Then, from the microcontroller (MC) to the memory (ME)
When data is transferred to a computer, switching means 111 is turned on by an identification signal to turn on and off the output transistor _Q1 of the microcomputer (MC) (at this time, the output transistor _Q2 of the memory (ME) is in the off state). ] The low level of the data obtained is approximately the ground potential, and the high level is the voltage divided by the pull-up resistor R ₂ and pull-down resistor R ₁ , but the pull-down resistor R ₁ is smaller than the pull-up resistor R ₂ . Since the voltage is sufficiently large, a sufficiently large high level voltage can be obtained. Furthermore, when data is transferred from the memory (ME) to the microcomputer (MC), if the switching means 111 is turned off by the identification signal, the output transistor _Q2 of the memory (ME) is turned on and off. The output transistor _Q1 of ) is in the off state], so that the high level of the data obtained is approximately the power supply voltage (+5V), and the low level is the ground potential. Therefore, from memory (ME) to microcontroller (MC)
This means that even when data is transferred to another device, it is possible to transfer data signals whose low level and high level are sufficiently distinguished. The microcomputer (MC) used in this invention is a 1-chip microcomputer (product number:
MB88536), and the memory (ME) is EAROM (product number M58653P) manufactured by Mitsubishi Electric Corporation. Except for the microcontroller (MC) terminal, all other terminal numbers are the actual terminals of this microcontroller and memory. The specific operation of writing or reading data into or from the memory (ME) is performed as follows. That is, when data is written to or read from the memory (ME), it is performed according to the flowcharts of FIGS. 4 and 6 at the timings shown in the time charts of FIGS. 5 and 7. Fifth
7, the periods corresponding to the operation modes of the memory in the symbols given in FIGS. 4 and 6 are given the same symbols, and the first, second, and third mode setting buses 108 , 109, 110, mode control signals C ₁ , C ₂ ,
The memory functions for C ₃ are shown in the table below.

【table】

[Table] Note that the address register, data register, and memory transistor of the memory (ME) described in the functional explanation in the table above are not particularly illustrated, and all operations of the memory are synchronized with the falling edge of the clock. The functions set by the mode control signals C ₁ , C ₂ , and C ₃ are sequentially performed. When writing data to the memory (ME), first input an address to the memory (ME) and set the address, as shown in the flowchart in Figure 4 and the time chart in Figure 5. Erase the data that was previously stored. After that, data is sent from the microcomputer (MC) [This data is tuning data and band data in the channel selection device. ] is transferred to the memory (ME), then the memory (ME)
write to. When reading data from memory (ME), the sixth
As shown in the flow chart in Figure 7 and the time chart in Figure 7, the address is input to the memory (ME) to set the address, and then the data at the specified address is read from the memory, and the read data is transferred to the data bus. The data is transferred to the microcomputer (MC) through 103. By the way, in the above embodiment, in order to know the data transfer direction, the terminal of the microcomputer (MC) and the switching means 111 are connected by the identification signal bus 113, and the identification signal outputted from the terminal to the identification signal bus 113 is used. Accordingly, the switching means 111 is turned on and off.
However, in this case, extra terminals of the microcomputer (MC) must be used. Therefore, the inventor proposed three mode control signals C ₁ ,
Of C ₂ and C ₃ , the mode control signal C ₂ output from the microcomputer (MC) to the second mode setting bus 109 is
When inputting addresses and data [i.e.
When transferring data from the microcomputer (MC) to the memory (ME), it becomes a low level “L” state.
Focusing on the fact that it becomes a high level "H" state when outputting data (that is, when transferring data from the memory (ME) to the microcontroller (MC)), this mode control signal C ₂ is used as an identification signal. I came up with this idea and constructed a connection circuit as shown in Figure 8. In the embodiment of FIG. 8, in which the same parts as in _FIG .
_R2 is connected in series, and the base of the switching transistor _Q3 is connected to a cut-off resistor _R7 , which is connected in series between the second power supply line 105 and the second mode setting bus 109, and a base current control circuit. is connected to the connection point with resistor _R8 . With this configuration, in the case of address input, the second mode setting bus 109 is at a low level "L", so the switching transistor _Q3 is turned on, and a pull-up is established between the second power supply line 105 and the data bus 103. The resistor R ₂ is connected, and the second mode setting bus 109 becomes high level "H" when data is output from the memory (ME), so the switching transistor Q ₃ is turned off and the second power supply line 105 is connected. The pull-up resistor _R2 is not connected to the data bus 103, and the same operation as the embodiment shown in FIG. 3 can be obtained without increasing the number of terminals used by the microcomputer (MC). Although the above embodiment has been described using a voltage synthesizer type channel selection device as an example, the present invention is not limited to this. (f) Effects of the invention According to the connection circuit of the invention, output transistors whose output electrodes are open are connected internally,
a first input/output terminal that outputs a signal from the transistor and receives input from the outside;
1 IC and a second IC connected to the output electrode of the output transistor whose output electrode is internally grounded via a pull-down resistor and which receives input from the outside.
There is an effect that bidirectional data transfer between the second IC and the second IC having input/output terminals can be preferably performed.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a schematic configuration of a voltage synthesizer type tuning device, and FIG. 2 is a circuit diagram showing a conventional connection circuit. Fig. 3 is a circuit diagram showing an embodiment of the connection circuit of the present invention, Fig. 4 is a flowchart of the procedure when writing to the memory, and Fig. 5 is a diagram showing the operation when writing to the memory. Figure 6 is a diagram showing a time chart, Figure 6 is a diagram showing a flowchart of the procedure when reading the memory, Figure 7 is a diagram showing a time chart for explaining the operation when reading the memory, Figure 8 is a diagram showing the flowchart of the procedure when reading the memory. FIG. 3 is a circuit diagram of another embodiment of the invention. 103...Data bus, 104...First power line, 105...Second power line, 107...Clock bus, 108...First mode setting bus, 1
09...Second mode setting bus, 110...Third mode setting bus, 111...Switching means,
(MC) Microcomputer (1st IC), (ME)
...Nonvolatile memory (2nd IC), _Q1 , _Q2 ...Output transistor, _R1 ...Pull-down resistor, _R2 , _R3 ,
R ₄ , R ₅ , R ₆ ... Pull-up resistors.

Claims (1)

[Scope of utility model registration request] An output transistor with an open output electrode is connected internally, and a first IC has a first input/output terminal that outputs a signal from the transistor and receives an input from the outside. and a second IC having a second input/output terminal to which the output electrode of the output transistor grounded is connected and which receives input from the outside, and performs bidirectional data transfer between the first IC and the second IC. The connection circuit connects a pull-up resistor and a series circuit of switching means between the data bus and the power supply line connecting the first and second input/output terminals, and connects the first IC to the second IC.
1. A connection circuit comprising means for turning on the switching means when transferring data from the second IC to the first IC, and turning off the switching means when transferring data from the second IC to the first IC.