JPS6337518B2 - - Google Patents
Info
- Publication number
- JPS6337518B2 JPS6337518B2 JP54026491A JP2649179A JPS6337518B2 JP S6337518 B2 JPS6337518 B2 JP S6337518B2 JP 54026491 A JP54026491 A JP 54026491A JP 2649179 A JP2649179 A JP 2649179A JP S6337518 B2 JPS6337518 B2 JP S6337518B2
- Authority
- JP
- Japan
- Prior art keywords
- conductor
- holes
- photosensitive film
- film
- green sheet
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/01—Manufacture or treatment
- H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
- H10W70/098—Applying pastes or inks, e.g. screen printing
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Description
【発明の詳細な説明】
本発明はIC，LSI等の半導体素子を塔載する高
密度回路基板の製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a high-density circuit board on which semiconductor elements such as ICs and LSIs are mounted.
IC，LSI等の半導体素子の高密度化に伴い、こ
れら素子をパツケージして塔載する回路基板も、
より配線密度の高いものが要求されている。回路
基板の配線密度を高めるためには、導体回路の線
幅を微細化し、かつ多層化することが必要であ
る。 With the increasing density of semiconductor devices such as ICs and LSIs, the circuit boards on which these devices are packaged are also becoming increasingly dense.
There is a demand for higher wiring density. In order to increase the wiring density of a circuit board, it is necessary to make the line width of conductive circuits finer and to increase the number of layers.
回路基板の導体回路は通常スクリーン印刷法に
より形成される。これはシルクスクリーン或いは
ナイロン等の網目より導体ペーストを押出し厚膜
の導体パターンを形成するもので、シルク或いは
ナイロンのワイヤ太さは30μｍが限界で、これ以
上細くできない。従つてこれによつて形成された
導体回路幅の最小は125μｍが精一杯の幅である。
従来のスクリーン印刷法による導体回路では
100μｍ以下の微細な導体回路幅を形成すること
は困難であり、これが回路基板の高密度化の障害
となつていた。 The conductive circuits of circuit boards are usually formed by screen printing. This involves extruding a conductor paste through a silk screen or nylon mesh to form a thick conductor pattern, and the maximum thickness of silk or nylon wire is 30 μm, which cannot be made any thinner. Therefore, the minimum width of the conductor circuit formed by this method is 125 μm at best.
Conductor circuits made using traditional screen printing methods
It is difficult to form a fine conductor circuit width of 100 μm or less, and this has been an obstacle to increasing the density of circuit boards.
本発明の目的は微細な導体回路およびバイアホ
ールをもつグリーンシートを作成し、これを積
層、焼成することにより集積度の高い半導体素子
の塔載が可能な高密度回路基板を提供することに
ある。 An object of the present invention is to provide a high-density circuit board on which highly integrated semiconductor elements can be mounted by creating green sheets with fine conductor circuits and via holes, laminating and firing the green sheets. .
本発明の特徴はポリエステルフイルム上に感光
性フイルムをラミネートし、露光、現像して導体
回路形成用溝を作成した後、該溝に導体ペースト
を埋め込み、ついで該導体回路形成部を含む前記
感光フイルム全面にグリーンシートを形成し、所
要位置にレーザ等により孔明けを行い、該孔に導
体ペーストを埋め込んだ後、ポリエステルフイル
ムを感光性フイルムと共に剥離することにより、
微細な導体回路およびバイアホールをもつグリー
ンシートを作成し、該グリーンシートをラミネー
トすることにより高密度回路基板を得ることにあ
る。 A feature of the present invention is that a photosensitive film is laminated on a polyester film, exposed and developed to create grooves for forming conductive circuits, and then conductive paste is embedded in the grooves, and then the photosensitive film containing the conductive circuit forming portions is laminated onto a polyester film. By forming a green sheet on the entire surface, drilling holes at desired positions using a laser, etc., filling the holes with conductive paste, and then peeling off the polyester film together with the photosensitive film.
The purpose of the present invention is to obtain a high-density circuit board by creating a green sheet having fine conductor circuits and via holes and laminating the green sheet.
以下図面により、本発明による回路基板の製造
工程の一実施例を工程順に説明する。 DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the manufacturing process of a circuit board according to the present invention will be described below in order of process with reference to the drawings.
図において
(a) ポリエステルフイルム２上に感光性フイルム
１をラミネートする。ポリエステルフイルム２
は次に示す(b)から(g)の露光、現像、印刷等の工
程中に変形の起らないものでなければならな
い。従つて厚さ100μｍのマイラーフイルムが
適当である。 In the figure (a), a photosensitive film 1 is laminated on a polyester film 2. polyester film 2
must not be deformed during the following steps (b) to (g), such as exposure, development, and printing. Therefore, a Mylar film with a thickness of 100 μm is suitable.
また、感光性フイルム１はフイルムの厚さが
厚く、感光性の良好なものが望ましく、本実施
例２では、Dupont社製（米国）のRiston1015
フイルムを使用した。 The photosensitive film 1 is preferably thick and has good photosensitivity.
I used film.
(b) 感光性フイルム１をラミネートした後、ガラ
ス乾板４を用いてレーザ光３によりフイルム１
を露光する。(b) After laminating the photosensitive film 1, the film 1 is laminated with a laser beam 3 using a glass drying plate 4.
to expose.
(c) 次に、現像液（クロロセン）に浸漬し、所望
の形状の導体回路形成用溝５を作成する。この
方法を用いた場合、導体幅60μｍ以下30μｍ位
までの微細な溝５の作成が可能である。(c) Next, it is immersed in a developer (chlorocene) to create conductor circuit forming grooves 5 of a desired shape. When this method is used, it is possible to create a fine groove 5 with a conductor width of 60 μm or less and up to about 30 μm.
(d) 作成された溝５にスクリーン印刷法により導
体ペースト６を埋め込む。導体ペーストは通常
の厚膜導体としての特性の他に、感光性フイル
ムと化学的な反応の起らない材料でなければな
らない。本実施例では電気抵抗の低いAuペー
ストを使用した。(d) Fill the created groove 5 with conductive paste 6 by screen printing. In addition to having the characteristics of a normal thick film conductor, the conductive paste must be a material that does not chemically react with the photosensitive film. In this example, Au paste with low electrical resistance was used.
(e) 次に導体ペースト６を埋め込んだ感光性フイ
ルム１上にグリンシート（以下セラミツク生シ
ート）７を成形する。セラミツク生シート７は
(h)工程で積層され焼成されるため、導体ペース
ト６を一体焼成が可能な材料でなければならな
い。そのため本実施例ではアルミナとホウケイ
酸ガラスからなるガラスセラミツク複合材料を
使用した。なお、本実施例に使用したガラス―
セラミツク複合材料はアルミナとホウケイ酸ガ
ラスを等量混合したものであり、900℃で焼成
が可能である。従つてAu等の厚膜導体との一
体焼成が可能な材料である。(e) Next, a green sheet (hereinafter referred to as raw ceramic sheet) 7 is formed on the photosensitive film 1 in which the conductive paste 6 is embedded. Ceramic raw sheet 7
Since it is laminated and fired in the step (h), the conductive paste 6 must be made of a material that can be integrally fired. Therefore, in this example, a glass-ceramic composite material made of alumina and borosilicate glass was used. Note that the glass used in this example
Ceramic composite material is a mixture of equal parts of alumina and borosilicate glass, and can be fired at 900℃. Therefore, it is a material that can be integrally fired with a thick film conductor such as Au.
(f) 次にバイアホール形成のための孔８の孔明を
行う。この孔８は孔明ダレを防ぐために裏返し
てポリエステルフイルム２の面より孔明を行
う。孔明方法はドリル，パンチ，レーザ等が考
えられるが、微細な孔８を作成するためには、
レーザ加工が有利である。(f) Next, hole 8 is drilled to form a via hole. The holes 8 are perforated from the surface of the polyester film 2 by turning it over to prevent the perforation from sagging. Possible drilling methods include drilling, punching, laser, etc., but in order to create minute holes 8,
Laser processing is advantageous.
(g) 厚膜回路形成用溝５に埋め込んだものと同じ
Auペーストを用い、バイアホール形成用孔８
を孔埋めする。（バイアホール９）
(h) 次にポリエステルフイルム２を手で剥離し、
微細な導体回路６とバイアホール９をもつセラ
ミツク生シート７′を作成する。このセラミツ
ク生シート７′を積層し、900℃大気雰囲気中で
焼成する。(g) Same as the one embedded in the thick film circuit forming groove 5
Hole 8 for via hole formation using Au paste
Fill in the holes. (Via hole 9) (h) Next, peel off the polyester film 2 by hand,
A raw ceramic sheet 7' having fine conductor circuits 6 and via holes 9 is prepared. The raw ceramic sheets 7' are laminated and fired at 900°C in an air atmosphere.
以上工程により回路基板の微細な導体回路とバ
イアホールとを形成した高密度回路基板を製造す
ることができる。 Through the above steps, it is possible to manufacture a high-density circuit board in which fine conductor circuits and via holes are formed.
以上実施例により本発明を説明したが、本発明
によればポリエステルフイルム上に感光性フイル
ムをラミネートレ、露光、現像して半導体回路形
成用溝を作成した後、該溝に導体ペーストを埋め
込み、ついで該導体回路形成部を含む前記感光フ
イルム全面にグリーンシートを成形し、所要位置
にレーザ等により孔明けを行い、該孔に導体ペー
ストを埋め込んだ後、ポリエステルフイルムを感
光性フイルムと共に剥離することにより微細な導
体回路およびバイアホールをもつグリーンシート
を作成し、該グリーンシートをラミネートするこ
とにより、スクリーン印刷法では出来なかつた微
細な導体回路幅の形成が可能となり、より集積度
の高い半導体素子の塔載が可能な高密度回路基板
が得られる効果は大きい。 The present invention has been described above with reference to Examples. According to the present invention, a photosensitive film is laminated on a polyester film, exposed and developed to create a groove for forming a semiconductor circuit, and then a conductive paste is embedded in the groove. Next, a green sheet is formed on the entire surface of the photosensitive film including the conductive circuit forming portion, holes are made at desired positions using a laser or the like, and after filling the holes with conductive paste, the polyester film is peeled off together with the photosensitive film. By creating green sheets with fine conductor circuits and via holes and laminating the green sheets, it is possible to form fine conductor circuit widths that could not be achieved with screen printing, making it possible to create semiconductor devices with a higher degree of integration. The effect of obtaining a high-density circuit board that can be mounted on a large scale is significant.
図は本発明による高密度回路基板の製造工程を
示す図で、
図中、１は感光性フイルム、２はポリエステル
フイルム、３はレーザ光、４はガラス乾板、５は
導体回路形成用溝、６は導体回路、７，７′はセ
ラミツク生シート、８はバイアホール形成用孔、
９はバイアホール、である。
The figure shows the manufacturing process of a high-density circuit board according to the present invention. In the figure, 1 is a photosensitive film, 2 is a polyester film, 3 is a laser beam, 4 is a glass dry plate, 5 is a conductor circuit forming groove, 6 is a conductor circuit, 7 and 7' are raw ceramic sheets, 8 is a hole for forming a via hole,
9 is a via hole.
Claims (1)
ラミネートし、露光、現像して導体回路形成用溝
を作成した後、該溝に導体ペーストを埋め込み、
ついで該導体回路形成部を含む前記感光性フイル
ム全面にグリーンシートを成形し、所要位置にレ
ーザ等により孔明けを行い該孔に導体ペーストを
埋め込んだ後、ポリエステルフイルムを感光性フ
イルムと共に剥離することにより、微細な導体回
路及びバイアホールをもつグリーンシートを作成
し、該グリーンシートをラミネートすることによ
り高密度回路基板を作成することを特徴とする高
密度回路基板の製造方法。1 Laminate a photosensitive film on a polyester film, expose and develop it to create a groove for forming a conductor circuit, and then fill the groove with conductor paste,
Next, a green sheet is formed on the entire surface of the photosensitive film including the conductive circuit forming portion, holes are made at desired positions using a laser or the like, and a conductive paste is filled in the holes, and then the polyester film is peeled off together with the photosensitive film. A method for manufacturing a high-density circuit board, comprising: creating a green sheet having fine conductor circuits and via holes, and laminating the green sheet to create a high-density circuit board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2649179A JPS55118654A (en) | 1979-03-07 | 1979-03-07 | Manufacture of high density circuit substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2649179A JPS55118654A (en) | 1979-03-07 | 1979-03-07 | Manufacture of high density circuit substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS55118654A JPS55118654A (en) | 1980-09-11 |
| JPS6337518B2 true JPS6337518B2 (en) | 1988-07-26 |
Family
ID=12194961
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2649179A Granted JPS55118654A (en) | 1979-03-07 | 1979-03-07 | Manufacture of high density circuit substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS55118654A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5292548A (en) * | 1990-04-03 | 1994-03-08 | Vistatech Corporation | Substrates used in multilayered integrated circuits and multichips |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5064768A (en) * | 1973-10-12 | 1975-06-02 |
-
1979
- 1979-03-07 JP JP2649179A patent/JPS55118654A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS55118654A (en) | 1980-09-11 |
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