JPS6337979B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a logic circuit having a plurality of input signal application terminals, and particularly to a current switching type logic circuit having excellent switching characteristics in a specific path.

Conventionally, this type of logic circuit includes a group of input transistors connected in parallel, each of which has a base as an input signal application terminal, and a first transistor whose emitter is connected to the emitter of the input transistor group through a constant current source. It consists of a reference transistor connected to a voltage source and whose base serves as a reference voltage application terminal, and the input transistor group and the collector of the reference transistor are each connected to a second voltage source via a load resistor,
There was a current switching type logic circuit that took out the output directly from the collector of the input transistor group and the reference transistor or via an emitter follower circuit.

However, in this type of current switching logic circuit, the collectors of all the input transistor groups are commonly connected, so as the number of input transistors increases, the value is determined by the product of the collector capacitance of the input transistor group and the load resistance value. This has the disadvantage that the time constant of the load resistance section becomes large, increasing the rise time, fall time, and propagation delay time, which are the main characteristics of a logic circuit.

Generally, when improving the switching characteristics of an integrated circuit, it is most effective to improve the switching characteristics of critical paths.
It is also effective for multi-input logic circuits to improve the switching characteristics of specific paths corresponding to critical paths.

An object of the present invention is to provide a logic circuit that has excellent switching characteristics for a specific path regardless of the increase in the number of input transistors.

According to this invention, the first input transistor group 1 has one or more parallel-connected first input transistors whose bases serve as input signal application terminals, and whose emitters are commonly connected to the emitters of the input transistor group 1, whose bases serve as input signal application terminals. A second input transistor group 2 in which one or more transistors are connected in parallel and used as terminals, and an input transistor group 1 whose emitters are commonly connected.
and 2, and is also connected to the first voltage source via a constant current source, the collector is connected to the second voltage source via a load resistor, and the base is connected to the reference voltage application terminal. A reference transistor 3 has an emitter connected to the collector of the input transistor group 1, a collector connected to the collector of the input transistor group 2, and a second voltage source via a load resistor, and a constant voltage applied to the base. Consists of a constant voltage transistor 4 serving as a terminal,
Reference transistor 3 and constant voltage transistor 4
In a current switching type logic circuit that takes out an output from the collector directly or via an emitter follower circuit, a constant voltage transistor 4 separates the collector capacitance of the input transistor group 1 from the collector capacitance of the input transistor group 2, and Since this is independent of the increase in constants, a logic circuit having excellent switching characteristics regarding the path from the input transistor group 2 can be obtained.

Next, the present invention will be explained with reference to the drawings. Although the present invention can be applied to a current switching type logic circuit having two or more input terminals, in order to simplify the explanation, a current switching type logic circuit with five inputs will be explained.

Figure 1 shows a conventional current switching type logic circuit, in which input transistor groups Q ₁ to Q ₅ are connected in parallel with bases serving as input signal application terminals 4 to 8, and emitters of input transistor groups Q ₁ to _{Q 5} . It consists of a reference transistor Q 6 connected to the emitter and to the voltage source 1 via a constant current source I ₁ and whose base serves as the reference voltage application terminal ₃ , and the input transistor group Q ₁
The collectors of ~Q ₅ and the reference transistor Q ₆ are connected to the voltage source 2 via load resistors R ₁ and R ₂ , respectively, and the NOR output is taken from the collectors of the input transistor group Q ₁ ~ _{Q 5} , while the reference This is a current switching type logic circuit that takes out the OR output from the collector of transistor _Q6 .

In such a circuit, the collectors of the input transistors are all commonly connected, so the capacitance of the NOR output section is the sum of the collector capacitances of the input transistors. Here, if the collector capacitances of Q ₁ to _{Q 5} are C ₁ to C ₅ , the time constant τ ₁ of the NOR output section is τ ₁ = R ₁ (C ₁ + C ₂ + C ₃ + C ₄ + C ₅ ), It can be seen that the time constant increases in proportion to the increase in the number of input transistors. Furthermore, since this increase in time constant causes an increase in the rise time and propagation delay time in the switching characteristics, it can be seen that the conventional current switching type logic circuit is unsuitable as a multi-input high speed logic circuit.

FIG. 2 is a circuit diagram showing a first embodiment of the present invention, in which an input transistor Q ₁ whose base serves as an input signal application terminal 4, an emitter of which is commonly connected to the emitter of the input transistor Q 1, and whose base serves as an input signal application terminal ₄ . Input transistor groups Q ₂ to _{Q 5} are connected in parallel as signal application terminals 5 to 8, and their emitters are commonly connected to the emitters of input transistor groups Q ₁ to Q ₅ , and are connected to a voltage source via a constant current source I ₁ . 1, the collector is connected to the voltage source 2 via the load resistor R ₂ , and the base is the reference voltage application terminal ₃ , and the emitter is connected to the input transistor group Q _2.
~ A constant voltage transistor connected to the collector of Q ₅ , whose collector is connected to the collector of input transistor Q ₁ , and connected to the voltage source 2 via the load resistor R ₁ , and whose base is the constant voltage application terminal 11.
It is a current switching type logic circuit _that takes out the NOR output from the collector of the constant voltage transistor _Q7 and the OR output from the collector of the reference transistor _Q6 .

In this circuit, if the potential of the constant voltage application terminal 11 is set to an appropriate potential within a range in which the transistors Q ₂ to _{Q 5} and Q ₇ are not saturated, at least one of the input transistors Q ₂ to Q ₅ If is conductive, constant current transistor _Q7 is conductive, otherwise _Q7 is turned off, realizing exactly the same logic operation as the conventional current switching type logic circuit shown in Figure 1. can.

Here, if the collector capacitances of the transistors Q ₁ to Q ₇ are respectively C ₁ to _{C 7} , the time constant τ ₂ of the NOR output section becomes τ ₂ = R ₁ (C ₁ + C ₇ ), and the constant voltage transistor Q ₇ collector capacity
If _C7 is designed to be equal to or less than the collector capacitance _C1 to _C5 of the input transistors, the time constant of the NOR output section will be two-fifths or less of that of the conventional circuit, and the switching of the input transistor _Q1 will be reduced. Characteristics can be significantly improved.

Therefore, by connecting inputs requiring high-speed logic to input signal application terminal 4 and connecting other inputs to input application terminals 5 to 8, a very effective logic circuit can be realized.

Furthermore, in this circuit, since the time constant of the NOR output section is unrelated to C ₂ to C ₅ , even when other input transistors are connected in parallel to the input transistors Q ₂ to _{Q 5} , the time constant of the input transistor Q ₁ is It can be seen that this is completely unrelated to switching characteristics and is optimal for multi-input logic circuits.

FIG. 3 is a circuit diagram showing a second embodiment of the invention. The difference from the first embodiment is that the base of the constant voltage transistor _Q7 is directly connected to the voltage source 2, and the logic amplitude of the load resistor _R1 is small and the constant voltage transistor _Q7 does not saturate. Alternatively, it can be applied when the degree of saturation is shallow and has almost no effect on the switching characteristics. The effects of the present invention in this embodiment are exactly the same as in the first embodiment.

FIG. 4 is a circuit diagram showing a third embodiment of the invention. The difference from the first embodiment is that the collector of the input transistor _Q2 is also connected to the collector of the constant voltage transistor _Q7 . In this circuit, the time constant τ ₃ of the NOR output section is τ ₃ = R ₁ (C ₁ + C ₂ + C ₇ ), and although the effect is slightly smaller than in the first embodiment, it is This has the advantage that high-speed terminals can be achieved.

Various modifications can be made to the embodiments described above within the scope of the present invention, and the scope of the present invention extends to all of the claims.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing a conventional logic circuit.
FIGS. 2, 3, and 4 are circuit diagrams showing first, second, and third embodiments of the logic circuit according to the present invention. Q ₁ , Q ₂ , Q ₃ , Q ₄ , Q ₅ , Q ₆ , Q ₇ ... Transistor, R ₁ , R _{2 ... Resistor, I 1 ...} Constant current source, 1, 2
...Voltage source, 3, 4, 5, 6, 7, 8, 9, 1
0, 11...Terminal.

Claims (1)

[Claims] 1 A plurality of parallel-connected first input transistors whose bases serve as input signal application terminals; and a second input transistor whose emitters are commonly connected to the emitters of the first input transistors and whose bases serve as input signal application terminals.
an input transistor whose emitter is connected to the emitters of the first input transistor and the second input transistor, and which is connected to a first voltage source via a constant current source, and whose collector is connected to the first voltage source via a first resistor. a reference transistor whose base is connected to a second voltage source and whose base serves as a reference voltage application terminal; whose emitter is connected to the collector of the first input transistor and whose collector is connected to the collector of the second input transistor; and a constant voltage transistor connected to a second voltage source via a second resistor and having a base as a constant voltage application terminal, and output can be taken out from the collectors of the reference transistor and the constant voltage transistor. A logic circuit featuring: