JPS6355647A - Cartridge - Google Patents

Abstract

(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention is a memory management unit (M M
The present invention relates to a cartridge for a memory device with a small number of U).

Specifically, the cartridge of the present invention is used as a cartridge for a video game device, an IC card, and the like.

(Prior Art) A cartridge that can be removably attached to a video game device has been proposed in which the usable memory space is expanded beyond the memory space that can be addressed by a normal address operation (Japanese Patent Laid-Open No. 59-11235
(See No. 2).

The proposed cartridge changes the correspondence between memory locations and address signals in response to switching address signals on the basic address lines.

However, in the above-mentioned cartridge, as the number of changes in the correspondence between memory locations and address signals increases, the number of address signals used for switching increases, and the address space that can originally be used in the memory increases. The disadvantage is that it is decreasing.

(Objective) The present invention utilizes memory space that is originally available in memory.
In addition to expanding the memory space beyond that which can be addressed by normal address operations using address signals supplied from the address signal line, it is also possible to address three or more multiple locations with one address signal in terms of switching the correspondence between memory locations and address signals. The purpose is to enable switching and to minimize the reduction in address space available for memory.

(Structure) In the cartridge of the present invention, by placing a register at a specific address and writing data representing a switching signal into the register via a data bus, the correspondence between memory locations and addresses is changed, and one It is possible to change the correspondence of multiple items by address.

That is, the cartridge of the present invention is a cartridge that is detachably attached to the main body of a microcomputer system and has an address bus, a data bus, and control signals necessary for reading and writing. a connector that allows a bus, a data bus, and a control signal line to be electrically coupled between the cartridge and the device main body; a memory device that stores data at a location corresponding to an address signal supplied from the device main body; A register is provided at a location corresponding to a specific address signal supplied from the device main body, and control means changes the correspondence between the memory location of the memory device and the address signal by writing data to the register. ing.

The present invention will be specifically described below with reference to Examples.

FIG. 1 shows an example in which the present invention is applied to a cartridge for a video game device.

2 is a video game device, and 4 is a cartridge as an example, and the cartridge 4 can be detachably attached to the video game device 2 by a connector (path shown).

The video game device 2 is provided with a game electronic device 6 and an MP'U (microprocessor unit) 8 that controls the game electronic device 6.

The game electronic device 6 and the MPU 8 are connected to each other by an address bus 10.
．． They are connected by a data bus 12 and control signal lines 14 such as R/W (read and write). Game electronics 6 and MPU 8 generate images for video game display.

The cartridge 4 includes ROM+-ROMn (
16-1 to 16-N) and an address translation device 18 are installed. The address conversion device @18 includes a register and an address decoder. ROM+～ROMn
An address bus 10, a data bus 12, and a control signal line 14 are connected to the address conversion device 18, and the address bus 10, data bus 12, and control signal line 14 of the cartridge 4 are connected to the video game device via a connector (path shown). 2 address bus 10. It is adapted to be connected to a data bus 12 and a control signal line 14.

A signal line 20 is provided between the address translation device 18 and ROM+ to ROMn for supplying the signals produced by the address translation device 18.

The number of signal lines 20 varies depending on the number of memories in the cartridge 4 (the number of memory blocks whose address correspondence changes: also referred to as the number of banks).

In this embodiment, data for bank switching is first written from the video game device 2 to a register in the address conversion device 18 of the cartridge 4, and the output of this register modifies the address input to the address conversion device [18]. be done. The output of the register of the address translation device 18 is
It is decoded by the address decoder in the address conversion device 18 and becomes a selection signal CS of ROM1 to ROMn in the cartridge 4, which determines which ROM+ to ROMn is selected.

Next, a method for expanding the address space will be described using FIG.

In this example, the MPU 8 in the video game device 2 is 8.
It is assumed to be a bit machine with an 8-bit data bus width and 16 address buses. If no changes are made, the second
As shown in figure (A), “0000” to rFFFFJ (
up to the address (in hexadecimal), that is, 216 bytes = 6
Can access up to 1K bytes.

Address r8000J~rF F as shown in Figure 2 (B)
If an address space of 32 bytes of FJ is assigned to ROM+-ROMn of cartridge 4,
Place the register of the address translation device 18 at address rcOOOJ, write 8-bit data to the register at this address, decode the output of this register, and write it to ROM+~RO.
Create a CS signal of Mn, that is, the upper bit of the address. In this way, when the MPU 8 of the video game device 2 accesses addresses r8000J to rB F F That's what I did.

In addition, in Figure 2, the address ro OOOJ ~ "8000"
is used for RAM, etc., and addresses “C001” to rF
F F FJ is used to access from the ROM 1 contents that the MPU 8 always has, such as reset and interrupt vectors.

In Figure 2, ROM+ is 256 bits, ROM2゜ROM
s, ROM 4-... has 128 bits (
7) Figure 3 shows an example of address line connections when using a ROM product. Control signal lines such as R/W are not shown.

The memory space of the 8-bit MPU8 is AO to A15 (
64 bytes (64K x 8 bits) with 16 addresses)
It is. Therefore, address ro O00J~rFF
It is accessible up to FFJ.

In Figure 2, ROM+ is r8000J to rFFFFJ
(32 bytes = 256 bits).

ROM2 to ROMn are rf3000J to rBFFFJ
Since it is located in ROM l and RO as it is,
A data bus collision occurs between M2 to ROMn. Second
As shown in the figure, a bank switching register is placed at address rcOOOJ, and the output of this register is used to avoid data bus collisions and at the same time expand the memory space.

Address AQ-A14 is input as an address to ROM+, and address A15 is input as chip select signal O8. ROM=~ROMn has addresses AO~A
Enter 13 as the address. Further, addresses AO to A15 are input to the address conversion device 18, data dO to d8 are input from the data bus 12, and outputs Y2 to Yn of the deco nider of the address conversion device 18 are supplied to the ROM2 to ROMn as a chip select signal C8. do.

In Figure 2, all ROM1 to ROMn have 256 bits (
Figure 4 shows an example of address line connections when using a 32 byte product. Again, illustration of control signal lines such as R/W is omitted.

Since addresses r8000J to rBFFFJ have only 16 bytes, a 32 byte ROM product is used by dividing one into two blocks, that is, into two.

As shown in Figure 2, ROM=~ROMn are #1 and #, respectively.
Divide into 2.

As in the case of Figure 3, ROM+ has addresses AO-A.
14 is input as the address, and address A15 is input as the chip select signal O8.

Address AO-AI3 is input to ROM:~ROMn as an address.

However, in this case, as a register of the address translation device 18, in addition to the bank switching register 22-1, the address switching register 22-2 is required. It is assumed that the bank switching register 22-1 is placed at address rcOOIJ, and the address switching register 22-2 is placed at address "CoO2". However, if the number of ROMs to be used is small, it is also possible to utilize the unused bits of the bank switching register 22-1 without providing a new address switching register 22-2.

Bank switching register 22- of address translation device 18
Addresses AO to A15 are input to 1 and address switching register 22-2, and data dO is input from data bus 12.
Input ~d8. The decoded output Y:~Yn of the bank switching register 22-1 is supplied as the chip select signal C8 to ROM=~ROMn, and the output of the address switching register 22-2 is supplied as the address A14 to the ROM:
? ~ ROMn.

(Effects) In the cartridge of the present invention, by adding registers in addition to the program ROM, the memory capacity can be increased and complex programs can be implemented.

Further, there is an advantage that the number of address signals required to increase the memory capacity is small.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a schematic diagram explaining the operation of the embodiment, and FIGS. 3 and 4 are block diagrams showing connection of address lines in the embodiment, respectively. It is. 2... Video game device, 4... Cartridge, 6... Game electronic device, 8... MPU, 10... Address bus, 12...Data bus, 14...Control signal line, 16-1 to 16-N...ROM, 18...
... Address translation device, 22-1 ... Bank switching register, 22-2
...Address switching register.

Claims (1)

[Claims] (1) A cartridge that is detachable from the main body of a microcomputer system and has an address bus, a data bus, and control signals necessary for reading and writing, and when this cartridge is installed in the device main body, the address bus, data bus, and control signals necessary for reading and writing are removable. A connector that allows a control signal line to be electrically connected between this cartridge and the device main body, a memory device that stores data in a location corresponding to an address signal supplied from the device main body, and a memory device that stores data in a location corresponding to an address signal supplied from the device main body. A cartridge comprising: a register provided at a location corresponding to a specific address signal; and control means for changing the correspondence between the memory location of the memory device and the address signal by writing data to the register.