JPS6361806B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a binary phase comparator circuit that is used, for example, to demodulate an angle modulated signal modulated with binary information, and is composed of digital logic elements.

There are cases where the phases of two digital signals are compared and the comparison output is output as one of two values. An example of this is when demodulating an angle modulated signal. The phase modulation signal and the frequency modulation signal have information modulated onto the angle component of a carrier wave, and are collectively referred to as an angle modulation signal. In the following, it is assumed that this angle modulation signal is modulated into binary values of mark and space. A phase comparator is used to reproduce this angle information on the receiving side. FIG. 1 shows the basic configuration of the phase comparison circuit, in which the phase comparison circuit 11
Then, the angle modulation signal from the angle modulation signal input terminal 12 and the reference signal that is used as a standard for detecting the angle of the modulated wave from the reference signal input terminal 13 are compared in phase, and outputted to the phase comparison output terminal 14. The analog signal is estimated and determined as one of the binary discrete information in the binary determination circuit 15, and the determination result is outputted to the binary determination output terminal 16. As shown in FIG. 2, in the circuit of FIG.
7 may be provided so that the reference phase of the reference signal applied to the phase comparator circuit 11 can be changed.

A particularly simple circuit configuration example of the phase comparator circuit 11 is shown in FIG. The angle modulation signal and the reference signal from the input terminals 12 and 13 are multiplied by each other in a multiplication circuit 18, and a low frequency component generated by the multiplication is extracted via a low pass filter 19. This low frequency component v ₀ becomes the phase comparison output. If the phase of the angle modulation signal with respect to the reference signal is △φ, then △φ
The phase comparison output v ₀ for , as shown in FIG. 4A, exhibits a cosine phase comparison characteristic. The phase comparison characteristic when the reference signal is advanced by π/2 radians by the phase shift circuit 17 as shown in FIG. 2 exhibits a sine phase comparison characteristic as shown in FIG. 4B.

A circuit using exclusive OR as the phase comparison circuit 11 is shown in FIG. Each signal is supplied from terminals 12 and 13 to an exclusive OR circuit 21, and its output is supplied to a low pass filter 19. The phase comparison characteristic of this circuit is a triangular characteristic as shown in FIG. 6A. The phase comparison characteristic when the phase of the reference signal is advanced by π/2 radians is as shown in FIG. 6B.

Since the output of the conventional circuits shown in FIGS. 3 and 5 is an analog signal, it is necessary to determine binary information based on this output. for example,
Assuming that the discrimination level of marks and spaces is v ₀ = 0, v ₀
When v 0 <0, it is determined to be a mark, and when v ₀ <0, it is determined to be a space. In order to make this determination, the circuits shown in FIGS. 3 and 5 require a determination circuit 15. Note that since the outputs of these phase comparator circuits are analog, by changing the discrimination level _v0 , the phase threshold value for binary determination can be changed. for example,
In Figure 6A, if the discrimination level and T ₁ are -φ0<
When Δφ<φ0, it becomes a mark; otherwise, it becomes a space, and the phase threshold can be changed from π/2 to φ0.

By the way, FIG. 7 shows the delay flip-flop 2.
It was composed of 2. It is a phase comparison circuit, and has the feature that the result of binary judgment using a single logic element is directly output. Figures 8A and B show two of the circuits in Figure 7.
Shows the phase comparison characteristics of the values. This circuit has the disadvantage that it is not possible to freely select the discrimination level, that is, the phase threshold, unlike when using a multiplication circuit or an exclusive OR circuit, because it performs binary judgment with a single circuit. It was hot.

This invention is characterized in that a duty ratio conversion circuit is connected to the data terminal of a delay flip-flop used as a phase comparison circuit, and the purpose of this invention is to change the phase threshold value for performing binary judgment by converting the duty ratio. It's about making things possible.

FIG. 9 shows a phase comparator circuit according to the present invention,
Parts corresponding to those in FIGS. 2 and 3 are given the same reference numerals. In this invention, a duty ratio conversion circuit 23 is inserted into the data terminal D of the delay flip-flop 22. In this example, the phase shift circuit 17 is provided on the torge terminal T side, but it may be provided on the data terminal D side or may be omitted.

The operation of this circuit will be explained with reference to FIG. The solid line rectangular wave 24 in FIG.
The rectangular wave 25 delayed by the phase shift circuit 17 is the reference signal given to the delay flip-flop 22.
is input to the toggle terminal T of. The delay flip-flop 22 operates at the moment when the input waveform 25 of the toggle terminal T rises, for example, at the waveform 25, π/2, 2π
The input signal of data terminal D at the time of +π/2 is transmitted to the output side, and at times other than rising,
Hold the output signal. FIG. 10B shows the case where the duty ratio conversion circuit 23 is not activated and the unmodulated signal 26 with a duty ratio of 50% applied to the input terminal 12 is inputted to the data terminal D of the flip-flop 22 with its duty ratio unchanged. Shows the input waveform. In this manner, when the phase difference between the signal 26 and the reference signal 24 is 0, the data output of the flip-flop 22 becomes a mark. Furthermore, when the phase of the reference signal 24 is delayed by π/2 to π/2+π compared to this case, the data output when the signal 25 rises becomes a space. Therefore, a phase comparison characteristic as shown in FIG. 10C is obtained.

FIGS. 10D and E represent the modulation signal 2, respectively.
The inputs 27 and 28 of the data terminal D of the flip-flop 22 are shown respectively when the duty ratio of 6 is converted to 50% or more and 50% or less. 10th
Figures F and G show the phase comparison characteristics when the duty ratio of the signal waveform is 50% or more and when it is 50% or less. These phase comparison characteristics can be easily obtained by considering the case of 50%. As can be seen from these figures, by changing the duty ratio, the threshold phase φ0 in binary determination can be changed.

As the circuit 23 for converting the duty ratio, the circuit shown in FIG. 11 can be considered. In FIG. 11A, the input signal is supplied directly to the OR circuit 29 and also through the shift register 31. In FIG. A toggle signal is applied from a terminal 32 to a toggle terminal of the shift register 31 . In FIG. 11B, an AND circuit 33 is used in place of the OR circuit 29 in FIG. 11A. In the case of FIG. 11A, the duty ratio is converted to 50% or more, and in the case of FIG. 11B, the duty ratio is converted to 50% or less. FIG. 12 shows the operation in case A of the same figure. Here, the logical sum of the input rectangular signal 34 and the shift register output signal 35 results in a signal 36 having a duty ratio of 50% or more. Since the toggle frequency of the terminal 32 for the shift register 31 is set to be sufficiently higher than the frequency of the input signal 34, the waveform of the signal 35 is a delayed waveform of the waveform of the signal 34, and the amount of delay is equal to half the period of the signal 34. The following shall apply.

As an application example of this invention, application to GMSK2 time slot delayed detection will be explained. The GMSK method is a modulation method that limits the base band of a binary digital FM signal with a modulation index of 0.5 using a Gaussian low-pass filter to obtain a narrowband digital FM signal under constant amplitude conditions. As a method for detecting this modulated wave, a delay detection method with a simple configuration can be considered. In differential detection, a binary signal is obtained by comparing the phases of a received signal and a signal delayed by a certain period of time. The eye pattern of the phase difference is shown in FIG. A in the figure shows an eye pattern when a delay of one time slot is performed, and if the discrimination level is set to 0 as shown in line aa, a binary signal is obtained. Therefore, in this case, the delay flip-flop circuit 2 shown in FIG.
2 may be used.

However, as can be seen from the eye pattern in FIG. 6A, in this detection method, the discrimination margin in the worst code pattern is extremely small, the eye narrows due to signal deterioration, and high-quality digital transmission is difficult. Therefore, as shown in Figure B, a method has been considered in which delay detection is performed by delaying the signal by two time slots. In this method, as can be seen from the eye pattern, if the discrimination level is set like the bb line, the discrimination margin becomes relatively large. As is clear from the figure, the threshold phase of the bb line is not at the center level of the eye pattern, ±π/2, but at ±π/4.
It is in a skewed position. Therefore, by applying the phase comparator circuit according to the present invention, two
Obtain value judgment output. In this case, the duty ratio is
All you have to do is set up the circuit so that it is around 25%.

As described above, the phase comparator circuit of the present invention is composed of a very simple logic circuit and is easy to manufacture. Furthermore, since it operates digitally, its operation is very stable. Therefore, it is useful as a circuit applied to integrated circuits. And 2
The threshold value for value judgment can be changed. Note that this invention is applicable not only to demodulation of angle modulation signals, but also to demodulation of angle modulated signals.
Generally, it can also be applied to phase comparison of two digital signals.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing the basic configuration of a conventional phase comparison circuit, Fig. 2 is a block diagram showing another example, Fig. 3 is a diagram showing a specific circuit example of the phase comparison circuit, and Fig. 4 is a block diagram showing the basic configuration of a conventional phase comparison circuit. FIG. 5 is a diagram showing another example of the conventional phase comparison circuit, FIG. 6 is a diagram of its phase comparison characteristic curve, and FIG. 7 is a diagram showing still another example of the conventional phase comparison circuit. 8 is a diagram showing its phase comparison characteristic curve, FIG. 9 is a diagram showing an embodiment of the present invention, FIG. 10 is a diagram explaining the operation of the circuit according to the present invention, and FIG. 11 is a diagram showing duty ratio conversion. FIG. 12 is a diagram showing an example of the circuit 23, FIG. 12 is a diagram showing the operation of FIG. 11A, and FIG. 13 is a diagram showing a phase eye pattern in GMSK delay detection. 12: angle modulation signal input terminal, 13: reference signal input terminal, 17: phase shift circuit, 22: delay flip-flop, 23: duty ratio conversion circuit.

Claims (1)

[Claims] 1 A duty ratio conversion circuit to which a first digital signal is supplied and converts the duty ratio; a delay flip-flop to which the digital signal whose duty ratio has been converted is supplied to a data terminal and a second digital signal to a toggle terminal; A digital phase comparator circuit consisting of: