JPS636471A - Logic integrated circuit - Google Patents

Logic integrated circuit

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Publication number
JPS636471A
JPS636471A JP61150120A JP15012086A JPS636471A JP S636471 A JPS636471 A JP S636471A JP 61150120 A JP61150120 A JP 61150120A JP 15012086 A JP15012086 A JP 15012086A JP S636471 A JPS636471 A JP S636471A
Authority
JP
Japan
Prior art keywords
circuit section
output
section
signal
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61150120A
Other languages
Japanese (ja)
Inventor
Hisayuki Tsuchiya
土屋 久幸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP61150120A priority Critical patent/JPS636471A/en
Publication of JPS636471A publication Critical patent/JPS636471A/en
Pending legal-status Critical Current

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  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

PURPOSE:To shorten a system-down time and to simplify inspection facilities at device level by installing a judging circuit part in a semiconductor logic integrated circuit and checking a function circuit part whenever necessary. CONSTITUTION:When a specific signal is inputted to an input terminal part A, the function circuit part 3 performs prescribed operation to output a prescribed signal to an output terminal B. An input switching circuit part 2 selects a signal from the input terminal part A or the signal from the judging circuit part 6 and an output switching part 4 connects the output signal of the function circuit part 3 by selecting the judging circuit part 6 or switching circuit part 5. All signals necessary for inspection are stored in the judging circuit part 6 and a judgement is made with an external control signal, so that if the circuit is defective, that is reported to the outside.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は半導体論理集積回路(以下LSrと称する)、
特にその内部に構成されている回路について故障診断を
可能にする構成を備える半導体論理集積回路に関する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to semiconductor logic integrated circuits (hereinafter referred to as LSr),
In particular, the present invention relates to a semiconductor logic integrated circuit having a configuration that enables failure diagnosis of circuits configured therein.

[従来の技術1 従来のLSIは印刷配線された基板上に実装されて使用
されるが、その内の1つのLSIが故障してもその影響
は大きくほとんどの場合はシステムダウンにつながるた
め、個々のLSIに必要以上の高い信頼性が要求される
。またその故障診断も高額な設備と高度に熟練した検査
員を使用しても多大な工数が必要となる。
[Conventional technology 1] Conventional LSIs are used mounted on printed wiring boards, but even if one of the LSIs fails, the effect is large and in most cases leads to system failure, so individual LSIs are required to have higher reliability than necessary. Moreover, the failure diagnosis requires a large amount of man-hours even if expensive equipment and highly skilled inspectors are used.

[発明が解決しようとする問題点] 従来のLSIが多数印刷配線された基板上に実装されて
、いわゆる電子回路パッケージが構成された場合、1つ
のLSIが故障しても装置全体がシステムダウンし、そ
の故障診断に多大の工数を有するために装置全体の復旧
までの時間が長く、またその回数も多いこと、更に中間
工程でおるパッケージ検査においても該当パッケージを
完全に検査するためには工数的にも検査技術的にも不可
能な状況に近くなって来ていることは事実である。
[Problems to be solved by the invention] When a so-called electronic circuit package is constructed by mounting a large number of conventional LSIs on a board with printed wiring, even if one LSI fails, the entire device will go down. , Since the failure diagnosis requires a large amount of man-hours, it takes a long time to restore the entire device and the number of times it is repaired is also large.Furthermore, it takes a lot of man-hours to completely inspect the package in the intermediate process. It is true that the situation is approaching the point where it is almost impossible to do so, both in terms of testing technology.

本発明の目的は高信頼なパッケージ検査を実施可能とし
た論理集積回路を提供することにある。
An object of the present invention is to provide a logic integrated circuit that enables highly reliable package inspection.

[問題点を解決するための手段] 本発明は一つの半導体チップ内に少なくとも1個の回路
部入力端子及び回路部出力端子を有し、前記入力端子に
所定の信号が入力したときに所定の動作を行って前記出
力端子に所定の信号を出力する機能回路部と、前記機能
回路部の入力端子数と同数の入力端子部と、前記機能回
路部の出力端子数と同数の出力端子部と、入力端子部と
前記機能回路部との中間に存在し入力端子部よりの信号
と後述の判断回路部よりの信号とのどちらか一方を選択
する入力切換回路部と、前記機能回路部の後段に位置し
、前記機能回路部の出力信号を後述の判断回路部又は後
述の切換回路部のどちらか一方を選択して接続する出力
切換回路部と、前記機能回路部の動作の良否を検査する
ために必要な全ての入力信号とそれに対応する前記機能
回路部の正しい出力信号との両方を予め自己の内部に蓄
積しておき、外部よりのコントロール信号によって入力
切換回路部と出力切換回路部とを動作させて蓄積されて
いる入力信号を順次前記は能回路部に印加し、またそれ
に対応する各出力信号を順番に読み取って蓄積されてい
る正しい出力信号と比較してその結果が良であれば、入
力切換回路部と出力切換回路部とを動作させて入力端子
部、前記機能回路部及び出力端子部とを接続しである特
定の機能を有する論理集積回路として使用可能な状態に
し、また否であれば後述の切換回路部を動作させて出力
端子部の出力端子を全てハイインピーダンスにし該チッ
プが使用不能であることを後述の端子部を通して外部へ
知らせる機能を有する判断回路部と、出力切換回路部と
出力端子部との中間に位置し判断回路部よりの信号によ
って出力端子部への出力信号を全てハイインピーダンス
状態にする切換回路部と、判断回路部、外部間を結ぶ端
子部とを有することを特徴とする論理集積回路である。
[Means for Solving the Problems] The present invention has at least one circuit section input terminal and one circuit section output terminal in one semiconductor chip, and when a predetermined signal is input to the input terminal, a predetermined signal is output. a functional circuit section that performs an operation and outputs a predetermined signal to the output terminal; input terminal sections whose number is the same as the number of input terminals of the functional circuit section; and output terminal sections whose number is the same as the number of output terminals of the functional circuit section. , an input switching circuit section that exists between the input terminal section and the functional circuit section and selects either a signal from the input terminal section or a signal from the determination circuit section described below; and a stage subsequent to the functional circuit section. an output switching circuit unit located at the output switching circuit unit, which selects and connects the output signal of the functional circuit unit to either a judgment circuit unit (described later) or a switching circuit unit (described later); and inspects the operation quality of the functional circuit unit. All necessary input signals and the corresponding correct output signals of the functional circuit are stored internally in advance, and the input switching circuit and the output switching circuit are switched by an external control signal. The input signals that have been accumulated are sequentially applied to the function circuit section, and the corresponding output signals are read in order and compared with the correct output signals that have been accumulated, and if the results are good. For example, the input switching circuit section and the output switching circuit section are operated to connect the input terminal section, the functional circuit section, and the output terminal section so that the circuit can be used as a logic integrated circuit having a specific function; If not, a determination circuit section having a function of operating a switching circuit section to be described later to set all output terminals of the output terminal section to high impedance and informing the outside through a terminal section to be described later that the chip is unusable; A switching circuit section that is located between the switching circuit section and the output terminal section and puts all output signals to the output terminal section into a high impedance state according to a signal from the judgment circuit section, and a terminal section that connects the judgment circuit section and the outside. This is a logic integrated circuit characterized by having the following features.

[実施例] 以下、本発明の一実施例を図により説明する。[Example] Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

第1図において、本発明に係る半導体論理集積回路(L
SI>1は入力端子部Aと入力切換回路部2と、機能回
路部3と、出力切換回路部4と、切換回路部5と、判断
回路部6ど、機能回路部3の出力が出力される出力端子
部Bと、LSllの使用不能を知らせる端子部Cとで構
成される。入力切換回路部2.出力切換回路部4及び切
換回路部5は実際は複数個の電子スイッチ回路にて構成
されているが、ここでは簡明化のために単なるスイッチ
の形で示す。
In FIG. 1, a semiconductor logic integrated circuit (L
SI>1 indicates that the output of the functional circuit section 3 is outputted from the input terminal section A, the input switching circuit section 2, the functional circuit section 3, the output switching circuit section 4, the switching circuit section 5, the judgment circuit section 6, etc. It consists of an output terminal section B that informs the user that the LSll is unusable, and a terminal section C that indicates that the LSll is unusable. Input switching circuit section 2. Although the output switching circuit section 4 and the switching circuit section 5 are actually composed of a plurality of electronic switch circuits, they are shown here in the form of simple switches for the sake of simplicity.

機能回路部3は入力端子部Aに所定の信号が入力したと
きに所定の動作を行って出力端子部Bに所定の信号を出
力する。入力切換回路部2は入力端子部Aよりの信号と
判断回路部6よりの信号とのどちらか一方を選択する。
The functional circuit section 3 performs a predetermined operation when a predetermined signal is input to the input terminal section A, and outputs a predetermined signal to the output terminal section B. The input switching circuit section 2 selects either the signal from the input terminal section A or the signal from the determination circuit section 6.

出力切換回路部4は機能回路部3の出力信号を判断回路
部6又は切換回路部5のどちらか一方を選択して接続す
る。
The output switching circuit section 4 selects and connects the output signal of the functional circuit section 3 to either the judgment circuit section 6 or the switching circuit section 5.

判断回路部6は前記機能回路部3の動作の良否を検査す
るために必要な全ての入力信号とそれに対応する前記機
能回路部3の正しい出力信号との両方を予め自己の内部
に蓄積しておき、外部よりのコントロール信号によって
入力切換回路部2と出力切換回路部4とを動作させて蓄
積されている入力信号を順次機能回路部3に印加し、ま
たそれに対応する各出力信号を順番に読み取って蓄積さ
れている正しい出力信号と比較してその結果が良であれ
ば入力切換回路部2と出力切換回路部4とを動作させて
入力端子部A、前記機能回路部3及び出力端子部Bとを
接続しである特定の機能を有する論理集積回路として使
用可能な状態にし、また否であれば切換回路部5を動作
させて出力端子部Bの出力端子を仝てハイインピーダン
スにし該チップが使用不能であることを端子部Cを通し
て外部へ知らせる機能を有する。切換回路部5は判断回
路部6よりの信号によって出力端子部Bへの出力信号を
全てハイインピーダンス状態にする。
The judgment circuit section 6 stores in advance both all the input signals necessary for inspecting the operation quality of the functional circuit section 3 and the correct output signals of the functional circuit section 3 corresponding thereto. The input switching circuit section 2 and the output switching circuit section 4 are operated by an external control signal to sequentially apply the accumulated input signals to the functional circuit section 3, and each corresponding output signal is sequentially applied to the functional circuit section 3. Compare the read and stored correct output signals, and if the result is good, operate the input switching circuit section 2 and the output switching circuit section 4 to switch the input terminal section A, the functional circuit section 3, and the output terminal section. B is connected to make the chip usable as a logic integrated circuit with a specific function, and if not, the switching circuit section 5 is operated to set the output terminal of the output terminal section B to high impedance. It has a function of notifying the outside through the terminal section C that it is unusable. The switching circuit section 5 puts all the output signals to the output terminal section B into a high impedance state in response to the signal from the determination circuit section 6.

第1図において、通常入力端子部Aに外部より信号が印
加されると、その信号は導電路7を通して入力切換回路
部2へ印加され最終的には導電路8を通して機能回路部
3に印加される。機能回路部3は入力信号に対応した出
力信号を発生させ、導電路9→出力切換回路部4→導電
路10→切換回路部5→導電路11→出力端子部Bのル
ートを通して外部に出力する。通常は本発明のLSIは
第1図の状態で使用されている。
In FIG. 1, when a signal is normally applied to the input terminal section A from the outside, the signal is applied to the input switching circuit section 2 through the conductive path 7, and finally to the functional circuit section 3 through the conductive path 8. Ru. The functional circuit section 3 generates an output signal corresponding to the input signal, and outputs it to the outside through the route of the conductive path 9 → output switching circuit section 4 → conductive path 10 → switching circuit section 5 → conductive path 11 → output terminal section B. . Normally, the LSI of the present invention is used in the state shown in FIG.

第2図はLS I 1を診断する時の状態を示した図で
ある。
FIG. 2 is a diagram showing the state when diagnosing LSI 1.

最初に外部より端子部Cを通してコントロール線18を
使用して診断開始の信号が判断回路部6へ与えられる。
First, a diagnosis start signal is applied from the outside to the judgment circuit section 6 through the terminal section C using the control line 18.

判断回路部6ではコントロール線14と15を使用して
それぞれ入力切換回路部2.出力切換回路部4の各スイ
ッチを反転させて判断回路部6→導電路12→入力切換
回路部2→導電路8→機能回路部3→導電路9→出力切
換回路部4→導電路13→判断回路部6の導電路を形成
させる。
The judgment circuit section 6 uses control lines 14 and 15 to connect the input switching circuit sections 2 to 2, respectively. By inverting each switch of the output switching circuit section 4, the judgment circuit section 6 → conductive path 12 → input switching circuit section 2 → conductive path 8 → functional circuit section 3 → conductive path 9 → output switching circuit section 4 → conductive path 13 → A conductive path for the determination circuit section 6 is formed.

次に判断回路部6はこの導電路を使用して機能回路部3
良否を検査する入カバターンを送出し、対応する出カバ
ターンを読み取る。予め判断回路部6の自己に蓄積しで
ある入カバターンに対する正しい出カバターンと読み取
ったパターンとを順次に比較し良否を判定する。
Next, the judgment circuit section 6 uses this conductive path to
The input cover pattern to be inspected for quality is sent out, and the corresponding output cover pattern is read. The read pattern is sequentially compared with the correct output pattern for the input pattern, which is stored in the judgment circuit 6 in advance, to judge whether it is good or bad.

その結果が良であれば良の信号をセンス線17→端子部
Cを通して外部に知らせ、同時にコントロール線14.
15を使って入出ノっ切換回路部2,4のスイッチを第
1図の様にセットする。またその結果が否でおれば、コ
ントロール線16の信号を使用して切換回路部5の出力
をハイインピーダンス状態にしセンス線17→端子部C
を通して否の状態を外部に知らせる。この状況を第3図
に示す。
If the result is good, a good signal is sent to the outside through the sense line 17→terminal section C, and at the same time, the control line 14.
15 to set the switches of the input/output switching circuit sections 2 and 4 as shown in FIG. If the result is negative, the output of the switching circuit section 5 is set to a high impedance state using the signal on the control line 16, and the sense line 17→terminal C
Notify the outside of the negative status through the This situation is shown in Figure 3.

この様にLSIは非常に少数の端子数の増加(端子部C
(−相当)により完全な診断が可能となる。
In this way, LSI has increased the number of terminals by a very small number (terminal part C
(-equivalent) allows complete diagnosis.

第4図はこの様なLSIが複数個、印刷配線された基板
上に実装されであるアルゴリズムを有する電子回路パッ
ケージ(以下パッケージと称する)100を構成した場
合を示す図でおる。
FIG. 4 shows a case in which a plurality of such LSIs are mounted on a printed wiring board to form an electronic circuit package (hereinafter referred to as package) 100 having an algorithm.

図中、S、Tは入出力端子部、50〜52.60〜62
は本発明のLSI、10〜12.40〜42は第1図の
コントロール線18と接続された出力、20〜22.3
0〜32は第1図のセンス線17と接続された信号線で
ある。また本図は簡明化のために実際の入出力信号線は
省略して必る。
In the figure, S and T are input/output terminals, 50-52.60-62
10 to 12 are LSIs of the present invention, 40 to 42 are outputs connected to the control line 18 in FIG. 1, and 20 to 22.3
0 to 32 are signal lines connected to the sense line 17 in FIG. Further, in this diagram, actual input/output signal lines are omitted for simplicity.

第4図において、入力端子Sの信号線90の先にドライ
バー回路70.71を接続しその各出力10〜12゜4
0〜42を使って各LSI50〜52.60〜62に内
蔵される判断回路をスタートさせて診断作業を実行させ
、そのおのおの結果を信号線20〜22.30〜32を
用いてAND回路72を構成し、その出力80を出力端
子Tに出しておけば、このパッケージ100が正常であ
るかどうかの判断は出力80を端子下を通してシステム
側よりモニターすることによって可能となる。
In FIG. 4, driver circuits 70 and 71 are connected to the tip of the signal line 90 of the input terminal S, and each output of the driver circuits 70 and 71 is 10 to 12 degrees.
0 to 42 are used to start the judgment circuits built in each LSI 50 to 52 and 60 to 62 to execute diagnostic work, and the respective results are sent to the AND circuit 72 using signal lines 20 to 22 and 30 to 32. If the output 80 is outputted to the output terminal T, it becomes possible to judge whether the package 100 is normal or not by monitoring the output 80 from the system side by passing it under the terminal.

この様な電子回路パッケージが多数枚使用されていると
しても、上述の方法によってどのパッケージが不良でお
るか瞬時にシステム側で判断が可能でありシステムダウ
ンの時間が大幅に短縮される。
Even if a large number of such electronic circuit packages are used, the above-described method allows the system to instantly determine which package is defective, thereby greatly reducing system down time.

また中間工程検査でおるパッケージ検査においても各L
SIの内部に判断回路が内蔵されているために、過去の
様にその電子回路パッケージのアルゴリズムの全てを検
査する様な膨大なテストパターンを印加する必要がなく
、第4図の信号90を印加して出力80のみを監視すれ
ばよく、またあるLSIが不良である場合には出力20
〜22.30〜32のみのチエツクにて不良LSIが瞬
時に判明する。
In addition, each L
Since the SI has a built-in judgment circuit, there is no need to apply a huge test pattern to check all the algorithms of the electronic circuit package as in the past, and the signal 90 in Fig. 4 can be applied. It is only necessary to monitor output 80, and if a certain LSI is defective, monitor output 20.
-22. A defective LSI can be instantly identified by checking only 30-32.

この様な考え方でパッケージ検査を実施すれば、パッケ
ージ検査では主として製造上に発生する不良の検出のみ
を目的とした検査設備のみで充分であり、設備員や検査
員の大幅な低減が可能である。
If package inspection is carried out based on this concept, only inspection equipment for the purpose of detecting defects that occur during manufacturing will be sufficient for package inspection, and the number of equipment and inspectors can be significantly reduced. .

[発明の効果] 以上説明した様に本発明は半導体論理集積回路の内部に
判断回路部を設置することにより、必要な場合にはいつ
でも機能回路部をチエツクすることが可能であるために
装置レベルでのシステムダウン時間の短縮、及び現在パ
ッケージ検査で最大のネックとなっている検査方式、検
査設備の簡明化、低価格化及び故障診断時間の短縮化等
、従来の方法よりもより簡単に、より高信頼なパッケー
ジ検査を実施できる効果がある。
[Effects of the Invention] As explained above, the present invention has a determination circuit section installed inside a semiconductor logic integrated circuit, so that it is possible to check the functional circuit section whenever necessary. It is easier than conventional methods, such as reducing system down time, simplifying the inspection method, which is currently the biggest bottleneck in package inspection, simplifying inspection equipment, lowering costs, and shortening failure diagnosis time. This has the effect of enabling more reliable package inspection.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の1実施例を示すブロック図、第2図、
第3図は動作説明図、第4図は第1図に示すLSIを複
数個実装した電子回路パッケージを示す図である。 1・・・本発明の半導体論理集積回路 2・・・入力切換回路部 3・・・機能回路部    4・・・出力切換回路部5
・・・切換回路部    6・・・判断回路部A・・・
入力端子部    B・・・出力端子部C・・・端子部
FIG. 1 is a block diagram showing one embodiment of the present invention, FIG.
FIG. 3 is an explanatory diagram of the operation, and FIG. 4 is a diagram showing an electronic circuit package in which a plurality of LSIs shown in FIG. 1 are mounted. 1... Semiconductor logic integrated circuit of the present invention 2... Input switching circuit section 3... Functional circuit section 4... Output switching circuit section 5
...Switching circuit section 6...Judgment circuit section A...
Input terminal section B...Output terminal section C...Terminal section

Claims (1)

【特許請求の範囲】[Claims] (1)一つの半導体チップ内に少なくとも1個の回路部
入力端子及び回路部出力端子を有し、前記入力端子に所
定の信号が入力したときに所定の動作を行つて前記出力
端子に所定の信号を出力する機能回路部と、前記機能回
路部の入力端子数と同数の入力端子部と、前記機能回路
部の出力端子数と同数の出力端子部と、入力端子部と前
記機能回路部との中間に存在し入力端子部よりの信号と
後述の判断回路部よりの信号とのどちらか一方を選択す
る入力切換回路部と、前記機能回路部の後段に位置し前
記機能回路部の出力信号を後述の判断回路部又は後述の
切換回路部のどちらか一方を選択して接続する出力切換
回路部と、前記機能回路部の動作の良否を検査するため
に必要な全ての入力信号とそれに対応する前記機能回路
部の正しい出力信号との両方を予め自己の内部に蓄積し
ておき、外部よりのコントロール信号によつて入力切換
回路部と出力切換回路部とを動作させて蓄積されている
入力信号を順次前記機能回路部に印加し、またそれに対
応する各出力信号を順番に読み取つて蓄積されている正
しい出力信号と比較してその結果が良であれば、入力切
換回路部と出力切換回路部とを動作させて入力端子部、
前記機能回路部及び出力端子部とを接続してある特定の
機能を有する論理集積回路として使用可能な様な状態に
し、また否であれば後述の切換回路部を動作させて出力
端子部の出力端子を全てハイインピーダンスにし該チッ
プが使用不能であることを後述の端子部を通して外部へ
知らせる判断回路部と、出力切換回路部と出力端子部と
の中間に位置し判断回路部よりの信号によって出力端子
部への出力信号を全てハイインピーダンス状態にする切
換回路部と、判断回路部、外部間を結ぶ端子部とを備え
たことを特徴とする論理集積回路。
(1) One semiconductor chip has at least one circuit input terminal and one circuit output terminal, and when a predetermined signal is input to the input terminal, a predetermined operation is performed to output a predetermined signal to the output terminal. A functional circuit section that outputs a signal, an input terminal section whose number is the same as the number of input terminals of the functional circuit section, an output terminal section whose number is the same as the number of output terminals of the functional circuit section, an input terminal section and the functional circuit section. an input switching circuit section that is located between the input terminal section and selects either a signal from the input terminal section or a signal from the determination circuit section (to be described later); an output switching circuit section to which either the judgment circuit section (described later) or the switching circuit section (described later) is selected and connected; and all input signals necessary to test the operation quality of the functional circuit section and their corresponding input signals. The input switching circuit section and the output switching circuit section are operated by controlling the input switching circuit section and the output switching circuit section by an external control signal, and store both the correct output signal of the functional circuit section internally in advance. The signals are sequentially applied to the functional circuit section, and each corresponding output signal is read in order and compared with the accumulated correct output signal. If the result is good, the input switching circuit section and the output switching circuit section are and the input terminal section,
The functional circuit section and the output terminal section are connected to make it usable as a logic integrated circuit having a specific function, and if not, the switching circuit section described later is operated to output the output from the output terminal section. A judgment circuit section which makes all the terminals high impedance and notifies the outside through the terminal section (to be described later) that the chip is unusable, and a judgment circuit section located between the output switching circuit section and the output terminal section, which outputs a signal from the judgment circuit section. A logic integrated circuit comprising: a switching circuit section that puts all output signals to a terminal section into a high impedance state; a judgment circuit section; and a terminal section that connects an external device.
JP61150120A 1986-06-26 1986-06-26 Logic integrated circuit Pending JPS636471A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61150120A JPS636471A (en) 1986-06-26 1986-06-26 Logic integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61150120A JPS636471A (en) 1986-06-26 1986-06-26 Logic integrated circuit

Publications (1)

Publication Number Publication Date
JPS636471A true JPS636471A (en) 1988-01-12

Family

ID=15489920

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61150120A Pending JPS636471A (en) 1986-06-26 1986-06-26 Logic integrated circuit

Country Status (1)

Country Link
JP (1) JPS636471A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0291587A (en) * 1988-09-29 1990-03-30 Nec Corp Semiconductor logic integrated circuit
JPH04102080A (en) * 1990-08-21 1992-04-03 Toshiba Corp Semiconductor evaluation circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0291587A (en) * 1988-09-29 1990-03-30 Nec Corp Semiconductor logic integrated circuit
JPH04102080A (en) * 1990-08-21 1992-04-03 Toshiba Corp Semiconductor evaluation circuit

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