JPS6367144B2 - - Google Patents
Info
- Publication number
- JPS6367144B2 JPS6367144B2 JP57098118A JP9811882A JPS6367144B2 JP S6367144 B2 JPS6367144 B2 JP S6367144B2 JP 57098118 A JP57098118 A JP 57098118A JP 9811882 A JP9811882 A JP 9811882A JP S6367144 B2 JPS6367144 B2 JP S6367144B2
- Authority
- JP
- Japan
- Prior art keywords
- data
- reading
- ram
- read
- rotation speed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01P—MEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION, OR SHOCK; INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT
- G01P3/00—Measuring linear or angular speed; Measuring differences of linear or angular speeds
- G01P3/42—Devices characterised by the use of electric or magnetic means
- G01P3/44—Devices characterised by the use of electric or magnetic means for measuring angular speed
- G01P3/48—Devices characterised by the use of electric or magnetic means for measuring angular speed by measuring frequency of generated current or voltage
- G01P3/481—Devices characterised by the use of electric or magnetic means for measuring angular speed by measuring frequency of generated current or voltage of pulse signals
- G01P3/489—Digital circuits therefor
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Linear Or Angular Velocity Measurement And Their Indicating Devices (AREA)
- Combined Controls Of Internal Combustion Engines (AREA)
Description
【発明の詳細な説明】
本発明は、データ保持RAMからエンジン回転
数データを読み取る方式に関し、特に該RAMに
対する1データ当りのアクセスが2以上のサイク
ルに分けて行なわれる場合の読み、書き同時アク
セスを禁止しようとするものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for reading engine rotation speed data from a data holding RAM, and in particular to a method for reading and writing simultaneous access when accessing one data to the RAM is divided into two or more cycles. It is an attempt to ban the
自動車のエンジン等を電子的に制御する機器、
例えばエンジンの吸入空気量を制御する電子キヤ
ブレターではエンジン回転数を正確に検出して制
御を実行する必要がある。エンジンの回転数は例
えばエンジン1回転当り何個か発生するパルスの
タイムインタバルを計測することで算出される。
マイクロコンピユータを使用した制御機器では該
パルスによる割込みを利用してエンジン回転数デ
ータ(例えば上述のタイムインタバル)を求め、
これを一旦データ保持RAMに格納して使用す
る。 Equipment that electronically controls automobile engines, etc.
For example, an electronic carburetor that controls the intake air amount of an engine needs to accurately detect the engine rotational speed to perform control. The engine rotation speed is calculated, for example, by measuring the time interval of several pulses generated per engine rotation.
In a control device using a microcomputer, the interrupt caused by the pulse is used to obtain engine rotation speed data (for example, the above-mentioned time interval),
This is temporarily stored in the data holding RAM and used.
この場合、例えばマイクロコンピユータが8ビ
ツト(1バイト)マシーンで、扱うデータが16ビ
ツト(2バイト)もしくはそれ以上であると、デ
ータ保持RAMへのアクセスは1データ当り2回
もしくはそれ以上必要になる。例えば1データが
2バイトであると2回のアクセスで読み出しまた
は書き込みが行なわれる。このため読み出しと書
き込みのタイミングが一致すると、その一部が更
新された実在しないデータを読み出すことになる
ので、これを用いて制御が行なわれることは好ま
しくない。そこで従来は第1図aに示すように下
位バイトのデータA1および上位バイトのデータ
B1を読み出した後に、再び下位データA2を読み
出しそれが1回目の下位データA1と一致するか
判断している。このようにすればA1=A2のとき
はB1がA1と対をなすものであると判断できる。
またA1≠A2であればB1がその間に変化した可能
性があるので該データを使用せずA1=A2となる
まで読み出しを繰り返す。しかし、この方法では
bに示すようにデータの書き込みが割り込みによ
つて優先されているので、読み出しサイクルを無
駄に消費する欠点がある。しかも下位データの再
読み出しやA1=A2の判断ステツプを含むので制
御プログラムが複雑になり、またA2用のRAM領
域が必要となる欠点もある。 In this case, for example, if the microcomputer is an 8-bit (1 byte) machine and the data handled is 16 bits (2 bytes) or more, the data storage RAM will need to be accessed two or more times for each piece of data. . For example, if one data is 2 bytes, reading or writing is performed in two accesses. For this reason, if the read and write timings coincide, non-existent data that has been partially updated will be read, so it is not preferable to use this for control. Therefore, conventionally, as shown in Figure 1a, the lower byte data A 1 and the upper byte data
After reading B1 , the lower data A2 is read again and it is determined whether it matches the first lower data A1 . In this way, when A 1 =A 2 , it can be determined that B 1 is a pair with A 1 .
Furthermore, if A 1 ≠ A 2 , there is a possibility that B 1 has changed during that time, so the data is not used and reading is repeated until A 1 =A 2 . However, in this method, as shown in b, since data writing is prioritized by interrupts, there is a drawback that read cycles are wasted. Moreover, since it includes steps for rereading lower-order data and determining whether A 1 =A 2 , the control program becomes complicated, and it also has the drawback of requiring a RAM area for A 2 .
本発明は、1ビツトのフラグを使用するだけで
上述した同時アクセスを未然に防止し、簡単なプ
ログラムで正確なエンジン回転数データを読み出
し可能とするものである。 The present invention prevents the above-mentioned simultaneous accesses by simply using a 1-bit flag, and makes it possible to read accurate engine speed data with a simple program.
本発明は、エンジン回転数データを複数回のア
クセスでデータ保持RAMに書き込み、そして読
み出すエンジン回転数読取方式において、読み出
し優先用のフラグを設け、該フラグが読み出しを
示す間は該RAMへの書き込みを禁止することを
特徴とするが、以下図面を参照しながらこれを詳
細に説明する。 The present invention provides an engine rotation speed reading method in which engine rotation speed data is written to a data holding RAM and then read out in multiple accesses, and a flag for read priority is provided, and while the flag indicates reading, writing to the RAM is not performed. This will be explained in detail below with reference to the drawings.
第2図および第3図は本発明の一実施例を示す
図である。本例では第3図に示すように読み出し
優先のフラグFを設け、読み出し中は該フラグF
を1にして書き込みを禁止する。そして、読み出
しを終了したらフラグFを0に戻して書き込み可
能な状態にする。第2図のフローチヤートはこれ
を示すもので、aは読み出し時、bは書き込み時
である。第3図は制御系の一例で、1はデータ保
持RAM、2はCPU(中央処理装置)、3は時間カ
ウンタ、Pはエンジンの回転数に応じてそのタイ
ムインタバルTが変化するパルスである。時間カ
ウンタ3はパルスPのインタバルTをカウントし
ており、CPU2は割込みによつてその値をRAM
1に書き込もうとする。この間もCPU2はRAM
1から回転数データ(この場合タイムインタバル
とする)を適宜読み出して制御をしているので、
RAM1に新たなデータを書き込もうとするとき
はフラグFを参照して読み出し中(F=1)でな
いことを確認する。そして読み出し中でなければ
(F=0)RAM1の内容を2サイクルで更新す
るが、読み出し中であれば待機する。 FIGS. 2 and 3 are diagrams showing one embodiment of the present invention. In this example, a read priority flag F is provided as shown in FIG.
Set to 1 to prohibit writing. Then, when the reading is finished, the flag F is returned to 0, making it possible to write. The flowchart in FIG. 2 shows this, where a indicates the time of reading and b indicates the time of writing. FIG. 3 shows an example of a control system, where 1 is a data holding RAM, 2 is a CPU (central processing unit), 3 is a time counter, and P is a pulse whose time interval T changes according to the engine speed. The time counter 3 counts the interval T of the pulse P, and the CPU 2 saves the value to the RAM by an interrupt.
Trying to write to 1. During this time, CPU2 is RAM
Since the rotation speed data (in this case, time interval) is read out appropriately from 1 and controlled,
When attempting to write new data to RAM1, refer to flag F to confirm that reading is not in progress (F=1). If reading is not in progress (F=0), the contents of RAM1 are updated in two cycles, but if reading is in progress, it waits.
以上述べたように本発明によれば、エンジン回
転数データの読み出しは1回で良いので処理ステ
ツプ数が少なく、また余分なRAM領域も要しな
い利点がある。 As described above, according to the present invention, the engine rotational speed data only needs to be read out once, so the number of processing steps is small and there is an advantage that no extra RAM area is required.
第1図は従来のエンジン回転数読取方式のフロ
ーチヤート、第2図および第3図は本発明の一実
施例を示すフローチヤートおよびブロツク図であ
る。
図中、1はデータ保持RAM、2はCPU、Fは
フラグである。
FIG. 1 is a flowchart of a conventional engine speed reading method, and FIGS. 2 and 3 are a flowchart and a block diagram showing an embodiment of the present invention. In the figure, 1 is a data holding RAM, 2 is a CPU, and F is a flag.
Claims (1)
データ保持RAMに書き込み、そして読み出すエ
ンジン回転数読取方式において、読み出し優先用
のフラグを設け、該フラグが読み出しを示す間は
該RAMへの書き込みを禁止することを特徴とす
るエンジン回転数読取方式。1. In an engine rotation speed reading method in which engine rotation speed data is written to and read from the data holding RAM in multiple accesses, a read priority flag is provided, and writing to the RAM is prohibited while the flag indicates reading. An engine speed reading method that is characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9811882A JPS58214859A (en) | 1982-06-08 | 1982-06-08 | System for reading r.p.m. of engine |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9811882A JPS58214859A (en) | 1982-06-08 | 1982-06-08 | System for reading r.p.m. of engine |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS58214859A JPS58214859A (en) | 1983-12-14 |
| JPS6367144B2 true JPS6367144B2 (en) | 1988-12-23 |
Family
ID=14211381
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9811882A Granted JPS58214859A (en) | 1982-06-08 | 1982-06-08 | System for reading r.p.m. of engine |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58214859A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60123768A (en) * | 1983-12-08 | 1985-07-02 | Mazda Motor Corp | Apparatus for detecting number of revolution in engine |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55105726A (en) * | 1979-02-08 | 1980-08-13 | Nissan Motor Co Ltd | Data transfer method |
-
1982
- 1982-06-08 JP JP9811882A patent/JPS58214859A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS58214859A (en) | 1983-12-14 |
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