JPS6367694B2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to a microcomputer evaluation device, and particularly to a microcomputer evaluation device for evaluating the software and hardware of a ROM built-in microcomputer that has a built-in read-only memory (hereinafter abbreviated as ROM). Mainly, the ROM part of a microcomputer with a built-in ROM is replaced with a read/write memory (hereinafter referred to as RAM), and its contents can be referenced and changed from the outside.
The present invention relates to a microcomputer evaluation device in which a peripheral circuit that performs analog operations is incorporated and can evaluate the analog section at the same time.

In recent years, due to advances in semiconductor technology, so-called "one-chip microcomputers" in which a ROM containing a program is built into the same chip are being produced at low cost and in large quantities. However, once the program stored in ROM is written, it cannot be changed again.
It is common to use an evaluation device that replaces the data with read/write RAM.

FIG. 1 shows a simple block diagram of a conventional evaluation device, and its basic operation will be explained. Targeted “1 chip/
Emulator 1, which emulates the functions of a microcontroller, is a program consisting of RAM.
Executes instructions stored in memory 2. The supervisor section 3 outputs the contents of the program memory 2 to the terminal device 4, or changes the contents of the program memory 2 according to instructions from the terminal device 4. In this evaluation device, one memory (program memory 2 in the case of FIG. 1) is used for the emulator 1 and the supervisor section 3.
This will be a shared form. For this reason, memory access conflicts may occur between the emulator 1 and the supervisor 3, so a bus switching circuit is usually provided in the program memory 2 so that both can access the program memory 2 at the same time. It seems like nothing happened. In addition, supervisor 3 can know whether the bus of program memory 2 has been switched to emulator 1 side or supervisor 3 side, and if it is switched to emulator 1 side, In some cases, a comment to that effect can be output to the terminal device 4, or the bus can be forcibly switched to the supervisor 3 side according to an instruction from the terminal device 4. Alternatively, in addition to these functions, the supervisor 3 may have a so-called "trace" function that sequentially reads addresses executed by the emulator 2 and creates a list of executed addresses.

In such evaluation devices, the supervisor section is expected to perform fairly complex operations, so recently, the supervisor section is equipped with a microcomputer (hereinafter referred to as "supervisor") that is separate from the emulator section.
Many of them use a "MPU" (abbreviated as "MPU") to perform their operations.

On the other hand, ``1-chip microcontrollers'' that should be evaluated include not only those with built-in digital peripherals such as conventional input/output ports, but also D-A converters and
Devices with built-in analog peripherals such as PLL (Phase Locked Loop) are emerging. An evaluation device for a "one-chip microcomputer" with built-in analog peripherals must have the ability to evaluate analog characteristics in addition to evaluating logic including programs. However, there are many parts inside the evaluation device that operate digitally.
In particular, for devices that use a microcomputer in the supervisor section, unless the power is turned off, the supervisor MPU will continue to read the program, and the digital signals on the address and data bus will be generated as noise in the emulator section. An accurate evaluation of the characteristics of the analog section will not be possible unless measures such as shielding or physically separating the emulator section and supervisor section are taken to prevent this from happening. . Since such a procedure is carried out very empirically, it takes a considerable amount of time and effort to develop an evaluation device, which is one of the reasons for the increase in the cost of the evaluation device.

An object of the present invention is to provide a microcomputer evaluation device that solves these problems.

The configuration of the present invention includes an emulator unit for emulating the operation of a ROM-embedded microcomputer with a built-in read-only memory, and a supervisor unit for performing operations such as displaying and changing the internal state of the emulator unit. In a microcomputer evaluation device equipped with a microcomputer and using a microcomputer in the supervisor section,
The present invention is characterized in that means is provided for stopping a program counter of a microcomputer in the supervisor section and prohibiting program reading only when the emulator section is executing a program.

According to the present invention, it is possible to provide an inexpensive evaluation device that does not emit any noise caused by the supervisor MPU and has good productivity and reliability.
The present invention will be described in detail below with reference to the drawings.

FIG. 2 is a block diagram of one embodiment of the present invention. In the embodiment of FIG. 2, the supervisor MPU 10 uses an industry standard microcomputer known by the product name [8085]. The equivalent product of this [8085] is manufactured by NEC Corporation.
[μCOM-85, User's Manual], manual number IEM-618A describes this in detail, so an overview thereof will be omitted here.

Now, Switch 15 is a supervisor MPU
It is connected to the READY terminal of MPU 10, and when it is closed, the supervisor MPU 10's
The inverted contents of the SOD terminal output are input, and if it is open, "1" is input unconditionally.
This supervisor MPU 10 executes an instruction only when "1" is input to the READY terminal, but when "0" is input, the execution of the instruction is interrupted, and from then on until "1" is input, AB _8-15 terminals,
The contents of the RD pin, IO/pin, pin, ALE pin, and AD _0-7 pins do not change. In other words, those terminals are DC fixed. In the following description, it is assumed that the switch 15 is open unless otherwise specified. The program executed by the supervisor MPU 10 is stored in the monitor memory 17, and the supervisor MPU 10 outputs the address of the instruction to be executed to the address bus 25. The decoder 16 is connected to the address bus 25
Based on the above data, monitor memory 17, monitor work memory 18, or program
A selection signal for selecting memory 19 is output. The data outputs of the monitor memory 17 and monitor work memory 18 are directly connected to the data bus 26 of the supervisor MPU 10, so no matter which memory is selected, the supervisor MPU 10 will You can read the contents or write data to it. Instructions for reading and writing data are performed by the outputs of the first gate 12 and the second gate 13. That is, the first gate 1
When the output of the second gate 13 is "0", reading is instructed, and when the output of the second gate 13 is "1", writing is instructed. However, the monitor memory 17 is
Since it consists of ROM, the monitor memory 17
Write operations cannot be performed. Also monitor
Work memory 18 is supervisor MPU
10 is used for temporary storage of data necessary to execute an instruction. The program memory 19 stores instructions to be executed by the emulator 11, and when "1" is output from the SOD terminal of the supervisor MPU 10, the address output from the EAB terminal of the emulator 11 is
Command data corresponding to the address is input via the bus driver 21 and input to the IB terminal via the bus driver 22. At this time, the bus driver 20 and bidirectional bus driver 23 are prohibited from outputting, so between the supervisor MPU 10 and the emulator 11,
No contention for program memory 19 occurs. The SOD terminal of the supervisor MPU10 is
While the signal is "1", "0" is input to the terminal of the emulator 11, and the emulator 11 enters the "RUN state". When the SOD terminal is set to "0", the emulator 11 stops executing instructions and does not operate until the next "0" is input to the terminal. This state is called a "break state". In the break state, bus drivers 21 and 22 are disabled and bus driver 20 and bidirectional bus driver 23 are enabled in their place. That is, the supervisor MPU 10 can read/write the contents of the program memory 19 only in this break state.

Next, consider the case where the switch 15 is closed. If emulator 11 is in a “break state”
If so, "1" is input to the READY terminal.
This is the same as opening the switch 15, and the supervisor 10
Since instructions from the emulator 11 continue to be read and executed, noise from the address bus 25, data bus 26, etc. will enter the analog output terminal 27 of the emulator 11, either directly or via the power supply line. However, the characteristic evaluation of the analog section is usually
Since this is done in the "RUN state", it does not pose a problem in characteristic evaluation.

If emulator 11 is in “RUN” state,
When the switch 15 is closed, "0" is input to the READY terminal, so the supervisor MPU 10 interrupts the instruction execution, and all terminals of the supervisor MPU 10 shown in FIG. It will be in a fixed state. In other words, in this state, the analog output terminal 27 of the emulator 11 is connected to the supervisor MPU 10.
Since the noise that is the source of noise does not jump in, it is possible to perform a good evaluation of the characteristics of the analog section.

As explained above, according to the present invention, noise from the supervisor MPU section is eliminated when evaluating the characteristics of the analog section, especially in an evaluation device for a "single-chip microcontroller" with built-in analog peripheral circuits. It can be removed extremely easily.

In addition, as an example, the supervisor MPU
shows an example using [8085], and
The case where the READY terminal is used is shown, but [8085]
It is also possible to use the HOLD terminal in addition to the READY terminal. For example, connect a switch to the SID terminal of the [8085], and use a monitor program to determine the switch status using software.
The terminals of the supervisor MPU can also be fixed using the HALT command.

Also, in the case of other microcomputers, if they have terminals equivalent to the READY and HOLD terminals of [8085], you can use those terminals to perform the same thing.
It is also possible to use a command equivalent to the HALT command. Also, some types of microcomputers can stop their own clock oscillation with a command, but in that case, by using that command in the same way as the HALT command on the [8085],
A similar effect can be obtained.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a conventional "one-chip microcomputer" evaluation device, and FIG. 2 is a block diagram of an embodiment of the present invention. In the figure, 1... emulator section, 2...
Program memory, 3... Supervisor section, 4... Terminal device, 5... Port terminal, 10...
...Supervisor MPU, 11...Emulator, 12, 13...First and second gates, 14...
...Latch, 15...Switch, 16...Decoder, 17...Monitor memory, 18...Monitor
Work memory, 19...Program memory,
20, 21, 22... bus driver, 23...
...Two-way bus driver, 24...Gate, 2
5...address bus, 26...data bus,
27...Analog output terminal.

Claims (1)

[Claims] 1.Equipped with an emulator section for emulating the operation of a ROM built-in microcomputer with a built-in read-only memory, and a supervisor section for performing operations such as displaying and changing the internal state of the emulator section, and In a microcomputer evaluation device using a microcomputer in a visor section, means for stopping a program counter of the microcomputer in the supervisor section and prohibiting program reading only when the emulator section is executing a program. A microcomputer evaluation device characterized by being provided with.