JPS6373694A - Electronic circuit board - Google Patents
Electronic circuit boardInfo
- Publication number
- JPS6373694A JPS6373694A JP61220144A JP22014486A JPS6373694A JP S6373694 A JPS6373694 A JP S6373694A JP 61220144 A JP61220144 A JP 61220144A JP 22014486 A JP22014486 A JP 22014486A JP S6373694 A JPS6373694 A JP S6373694A
- Authority
- JP
- Japan
- Prior art keywords
- electronic circuit
- circuit board
- board
- opening
- main body
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09072—Hole or recess under component or special relationship between hole and component
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は、表面実装型の集積回路（ＩＣ）等を高密度
に実装できる様な電子回路基板の構造に関するものであ
る。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to the structure of an electronic circuit board on which surface-mounted integrated circuits (ICs) and the like can be mounted with high density.
第５因は従来の光面実装型ＩＣ等を実装する基板の一部
外形図及び、その基板に実装される表面実装型ＩＣの外
形図である。光面実装型ＩＣＩこは種々の種類があるが
、第５図では、ミニモールド（ガルウィング型リードタ
イプ）を例にしている。The fifth factor is a partial outline diagram of a board on which a conventional optical surface mount IC or the like is mounted, and an outline diagram of a surface mount IC mounted on the board. There are various types of optical surface mount ICIs, but in FIG. 5, a mini mold (gull wing lead type) is used as an example.
図において、（１）は従来の基板、（２）は基板上の配
線、及びその上のパッド部、（３）は後述する実装型Ｉ
Ｃのリードとバッド（２）とを電気的憂こ接続するため
の、ハンダペースト、 （４）は表面実装型ＩＣ本体、
（５）はＩＣ（４）のリード部である。In the figure, (1) is the conventional board, (2) is the wiring on the board and the pad section thereon, and (3) is the mounting type I described later.
Solder paste for electrically connecting the C lead and the pad (2), (4) is the surface mount IC body,
(5) is a lead portion of IC (4).
次ζこ動作について説明する。表面実装型Ｉ Ｃ（４）
は基板（１）上のパッド部（２）ｌこ、印刷法等で付着
させたハンダペースト（３）の上Ｉこ１表面実装型ＩＣ
（４）のリード部（５）を乗せ、その後、赤外線リフロ
ー炉等でハンダを融かし、実装する。The next operation will be explained. Surface mount type IC (4)
This is the pad part (2) on the board (1), and the top of the solder paste (3) attached by a printing method.
The lead part (5) of (4) is mounted, and then the solder is melted in an infrared reflow oven or the like and mounted.
従来の電子回路基板は以上のように構成されているので
、表面実装型ＩＣを基板の垂直方向ｌこ実装することが
できず、実装密度を向上するためには、バクケージの大
きさを縮小する方法しかなかった。また、ＩＣで発生す
る熱は、パッケージの上面からは放熱されるが、下面か
らの放熱は通常用いられるガラスエポキシ基板等では、
基板の熱伝導が悪いために、ＩＣを高密度に実装した場
合放熱の問題が重要となる。Since conventional electronic circuit boards are configured as described above, surface mount ICs cannot be mounted vertically on the board, and in order to improve the mounting density, the size of the back cage must be reduced. There was no other way. In addition, the heat generated by an IC is radiated from the top surface of the package, but the heat radiated from the bottom surface is not possible with glass epoxy substrates, etc., which are normally used.
Because of the poor thermal conductivity of the substrate, the problem of heat dissipation becomes important when ICs are mounted in high density.
この発明は上記のような問題点を解消するためになされ
たもので、基板の垂直方向にもＩＣを実装できるととも
ｌこ、ＩＣの放熱性を向上した電子回路基板を得ること
を目的とする。This invention was made to solve the above-mentioned problems, and aims to provide an electronic circuit board that allows ICs to be mounted vertically on the board and also improves the heat dissipation of the IC. do.
この発明に係る電子回路基板は、ｉｆｓ板の一部に凹部
又は孔を設け、基板の同一部分に複数個のＩＣ等を実装
できるようｆこしたものである。The electronic circuit board according to the present invention has a recess or a hole in a part of the ifs board, so that a plurality of ICs or the like can be mounted on the same part of the board.
この発明にどける電子回路基板に設けた凹部又は孔は、
基板と垂直方向への複数のＩＣ等の実装を可能にし、実
装密度を向上する。特（こ、基板に設けた孔は、基板の
放熱性を向上する。The recess or hole provided in the electronic circuit board according to the present invention is
It enables mounting of multiple ICs, etc. in a direction perpendicular to the substrate, improving mounting density. In particular, the holes provided in the substrate improve the heat dissipation of the substrate.
Ｍ＄Ｃ＊ｑａＱ−ｐ（？１１ｓｔ＠−て、’％１１
説明す 〕 。M$C*qaQ-p(?11st@-te,'%11
I will explain.
第１図Ａはこの発明の＠１の実施例とＩＣの実装状況と
を示す斜視図で、（６）は基板（１）に設けられた開孔
である。＠１図Ｂ、ＣはそれぞれのＩＣ実装状態を示す
部分断面図及び部分側面図である。FIG. 1A is a perspective view showing the embodiment @1 of the present invention and the mounting situation of an IC, and (6) is an opening provided in the substrate (1). @1 Figures B and C are a partial sectional view and a partial side view showing the respective IC mounting states.
図中符号の添字ａ、ｂはそれぞれ別個のＩＣに対応する
。Subscripts a and b in the figure correspond to separate ICs, respectively.
次に動作について説明する。第１図では１本発明の特徴
である。基板（１）に設けた開孔（６）に表面実装型Ｉ
Ｃ（４ｂ）を本来の実装方法と逆に実装し、他の表面
実装置 Ｃ（４ａ）を重ねて通常の方向１こ実装する。Next, the operation will be explained. FIG. 1 shows one feature of the present invention. The surface mount type I is inserted into the opening (6) provided in the substrate (1).
C (4b) is mounted in the opposite manner to the original mounting method, and another surface real device C (4a) is mounted one on top of the other in the normal direction.
この採番こして実装した場合、理論的には実装密度は通
常の２倍になる。また、この様にして実装した場合、
Ｉ Ｃ（４ａ）の下部Ｉ Ｃ（４ｂ）との間隔（７）は
通常の実装方法より広くなり、熱の放熱性はよくなる。If this numbering is used for packaging, theoretically the packaging density will be twice that of normal packaging. Also, if implemented in this way,
The distance (7) between the IC (4a) and the lower IC (4b) is wider than that in a normal mounting method, and heat dissipation is improved.
なお、上記第１の実施例では基板（１）＃こ開孔（６）
を設けた場合について示したが、基板（１） ｌこ凹部
（８）を設けてもよい。＠２図Ａ、Ｂ、Ｃに基板ｃ１）
＃こ凹部（８）を設けた場合の＠２の実施例を示す。In addition, in the first embodiment, the substrate (1) #hole (6)
Although the case is shown in which a recess (8) is provided in the substrate (1), a recess (8) may also be provided in the substrate (1). @2 Figures A, B, and C are board c1)
An example of @2 is shown in which a recessed portion (8) is provided.
また、上記実施例では基板（１）の開孔（６）父は凹部
（８）８利用して、同−場所醤こ２個のＩ Ｃ＜４）を
実装した場合を示したが実装される１Ｃ（４）の大きさ
、形状は限定されない。また、個数も限定されない。In addition, in the above embodiment, the hole (6) and the recess (8) of the substrate (1) are used to mount two ICs (IC<4) in the same place. The size and shape of 1C (4) are not limited. Moreover, the number is not limited either.
′＠３図Ａ、Ｂ、Ｃ１こ基板（１）の開孔（６）を利用
し、さらに、基板（１）裏面上にある配線（２ｃ） ｆ
こＩ Ｃ（４ｃ）を接続することにより、同一場所に３
個のＩＣ（４）を実装した＠３の実施例を示す。'@3 Figures A, B, C1 Using the openings (6) on the board (1), further connect the wiring (2c) on the back side of the board (1) f
By connecting this IC (4c), 3
An example of @3 is shown in which four ICs (4) are mounted.
上記各実施例ではＩＣ（４）の放熱は空気等熱媒体によ
り行なわれるが、基板（１）の一部に放熱板（９）を９
鵬？Ｊ 山昌 密 ノ開 Ａ ｎ ハＩｆ
豐（ハｈへ部に放熱板（９）を設けた場合の第４の
実施例を示す。In each of the above embodiments, heat dissipation from the IC (4) is carried out by a heat medium such as air, but a heat dissipation plate (9) is provided on a part of the substrate (1).
Peng? J Yamasho Secret Open A n Ha If
A fourth embodiment is shown in which a heat dissipation plate (9) is provided at the bottom part.
以上のようｆこ、この発明發こよれば基板の一部ｆこ開
孔又は凹部を設けることにより、半導体の実装密度が向
上する。As described above, according to the present invention, by providing an opening or a recess in a portion of the substrate, the packaging density of semiconductors can be improved.
第１図、第２図、第３図及び＠４図はそれぞれこの発明
の＠１ 、 ＠２ 、 ＠３及び第４の実施例を示し、
各図とも図Ａは嶋該実施例基板とＩＣの実装状況とを示
す斜視図１図Ｂ及びＣはそれぞれその実装状態を示す部
分断面図及び部分側面図である。第５図は従来の電子回
路基板とＩＣの実装状況を示す斜視図である。
図において、（１）は基板、（２）は配線およびパッド
部、（４）はＩＣ等の本体部、（５）はＩＣ等のリード
部、（６）は開孔、（８）は凹部、（９）は放熱板であ
る。
なお１図中同一符号は同一、または相当部分を示す。1, 2, 3 and 4 respectively show @1, @2, @3 and fourth embodiments of the present invention,
In each figure, Figure A is a perspective view showing the mounting state of the IC on the substrate of this embodiment. Figures B and C are a partial sectional view and a partial side view, respectively, showing the mounted state. FIG. 5 is a perspective view showing a conventional electronic circuit board and an IC mounting situation. In the figure, (1) is the board, (2) is the wiring and pad part, (4) is the main body of the IC, (5) is the lead part of the IC, (6) is the opening, and (8) is the recess. , (9) is a heat sink. Note that the same reference numerals in Figure 1 indicate the same or equivalent parts.
Claims (3)
の如き装着部品（以下「ＩＣ等」という）を実装する電
子回路基板において、 上記基板の一部に上記ＩＣ等の本体部分より大きい開口
を有する凹部または開孔と 上記開口の周縁部に複数個の上記ＩＣ等との電気的接続
のための所要の配線部及びパッド部とを備えたことを特
徴とする電子回路基板。(1) Surface-mounted integrated circuit device (hereinafter referred to as "IC")
In an electronic circuit board on which mounting parts such as (hereinafter referred to as "IC, etc.") are mounted, a recess or aperture having an opening larger than the main body of the IC, etc. is formed in a part of the board, and a plurality of recesses or apertures are formed on the periphery of the opening. An electronic circuit board comprising a necessary wiring section and pad section for electrical connection with the above-mentioned IC or the like.
本体部分が開口内へ没入するように実装し、第２のＩＣ
等を通常の実装方向で上記第１のＩＣ等と各本体部分が
重なるように実装するようにしたことを特徴とする特許
請求の範囲第１項記載の電子回路基板。(2) Mount the first IC, etc. upside down from the normal mounting direction so that the main body part is inserted into the opening, and then
2. The electronic circuit board according to claim 1, wherein the first IC and the like are mounted in a normal mounting direction so that each main body portion overlaps the first IC and the like.
せてなり、上記基板の一部に装着すべき２個のＩＣ等を
上記基板の表及び裏から各本体部分が上記放熱板に接す
るように実装するようにしたことを特徴とする特許請求
の範囲第１項記載の電子回路基板。(3) The board is made by pasting insulating plates on both sides via a heat sink, and the two ICs etc. to be mounted on a part of the board are attached to the heat sink from the front and back of the board. The electronic circuit board according to claim 1, characterized in that the electronic circuit board is mounted so that they are in contact with each other.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61220144A JPS6373694A (en) | 1986-09-17 | 1986-09-17 | Electronic circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61220144A JPS6373694A (en) | 1986-09-17 | 1986-09-17 | Electronic circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6373694A true JPS6373694A (en) | 1988-04-04 |
Family
ID=16746585
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61220144A Pending JPS6373694A (en) | 1986-09-17 | 1986-09-17 | Electronic circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6373694A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0653628A (en) * | 1991-12-26 | 1994-02-25 | Samsung Electron Co Ltd | Circuit board with surface mount device |
| JPH06177501A (en) * | 1992-09-01 | 1994-06-24 | Samsung Electron Co Ltd | Memory module |
| JPH08316606A (en) * | 1995-05-24 | 1996-11-29 | Nec Corp | Mounting structure of lsi package |
| US5744862A (en) * | 1996-03-29 | 1998-04-28 | Mitsubishi Denki Kabushiki Kaisha | Reduced thickness semiconductor device with IC packages mounted in openings on substrate |
| US6777798B2 (en) | 2001-02-05 | 2004-08-17 | Renesas Technology Corp. | Stacked semiconductor device structure |
| WO2023085073A1 (en) * | 2021-11-10 | 2023-05-19 | オムロン株式会社 | Mounting board, and electric apparatus equipped with mounting board |
-
1986
- 1986-09-17 JP JP61220144A patent/JPS6373694A/en active Pending
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0653628A (en) * | 1991-12-26 | 1994-02-25 | Samsung Electron Co Ltd | Circuit board with surface mount device |
| JPH06177501A (en) * | 1992-09-01 | 1994-06-24 | Samsung Electron Co Ltd | Memory module |
| JPH08316606A (en) * | 1995-05-24 | 1996-11-29 | Nec Corp | Mounting structure of lsi package |
| US5744862A (en) * | 1996-03-29 | 1998-04-28 | Mitsubishi Denki Kabushiki Kaisha | Reduced thickness semiconductor device with IC packages mounted in openings on substrate |
| US6777798B2 (en) | 2001-02-05 | 2004-08-17 | Renesas Technology Corp. | Stacked semiconductor device structure |
| WO2023085073A1 (en) * | 2021-11-10 | 2023-05-19 | オムロン株式会社 | Mounting board, and electric apparatus equipped with mounting board |
| JP2023071115A (en) * | 2021-11-10 | 2023-05-22 | オムロン株式会社 | Mounting substrates and electrical equipment mounted with mounting substrates |
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